1 #ifndef __ASM_ARM_ARM64_PROCESSOR_H 2 #define __ASM_ARM_ARM64_PROCESSOR_H 3 4 #include <xen/stringify.h> 5 6 #include <asm/arm64/sysregs.h> 7 8 #ifndef __ASSEMBLY__ 9 10 /* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */ 11 12 #define __DECL_REG(n64, n32) union { \ 13 uint64_t n64; \ 14 uint32_t n32; \ 15 } 16 17 /* On stack VCPU state */ 18 struct cpu_user_regs 19 { 20 /* 21 * The mapping AArch64 <-> AArch32 is based on D1.20.1 in ARM DDI 22 * 0487A.d. 23 * 24 * AArch64 AArch32 25 */ 26 __DECL_REG(x0, r0/*_usr*/); 27 __DECL_REG(x1, r1/*_usr*/); 28 __DECL_REG(x2, r2/*_usr*/); 29 __DECL_REG(x3, r3/*_usr*/); 30 __DECL_REG(x4, r4/*_usr*/); 31 __DECL_REG(x5, r5/*_usr*/); 32 __DECL_REG(x6, r6/*_usr*/); 33 __DECL_REG(x7, r7/*_usr*/); 34 __DECL_REG(x8, r8/*_usr*/); 35 __DECL_REG(x9, r9/*_usr*/); 36 __DECL_REG(x10, r10/*_usr*/); 37 __DECL_REG(x11 , r11/*_usr*/); 38 __DECL_REG(x12, r12/*_usr*/); 39 40 __DECL_REG(x13, /* r13_usr */ sp_usr); 41 __DECL_REG(x14, /* r14_usr */ lr_usr); 42 43 __DECL_REG(x15, /* r13_hyp */ __unused_sp_hyp); 44 45 __DECL_REG(x16, /* r14_irq */ lr_irq); 46 __DECL_REG(x17, /* r13_irq */ sp_irq); 47 48 __DECL_REG(x18, /* r14_svc */ lr_svc); 49 __DECL_REG(x19, /* r13_svc */ sp_svc); 50 51 __DECL_REG(x20, /* r14_abt */ lr_abt); 52 __DECL_REG(x21, /* r13_abt */ sp_abt); 53 54 __DECL_REG(x22, /* r14_und */ lr_und); 55 __DECL_REG(x23, /* r13_und */ sp_und); 56 57 __DECL_REG(x24, r8_fiq); 58 __DECL_REG(x25, r9_fiq); 59 __DECL_REG(x26, r10_fiq); 60 __DECL_REG(x27, r11_fiq); 61 __DECL_REG(x28, r12_fiq); 62 __DECL_REG(/* x29 */ fp, /* r13_fiq */ sp_fiq); 63 64 __DECL_REG(/* x30 */ lr, /* r14_fiq */ lr_fiq); 65 66 register_t sp; /* Valid for hypervisor frames */ 67 68 /* Return address and mode */ 69 __DECL_REG(pc, pc32); /* ELR_EL2 */ 70 uint32_t cpsr; /* SPSR_EL2 */ 71 uint32_t hsr; /* ESR_EL2 */ 72 73 /* Outer guest frame only from here on... */ 74 75 union { 76 uint32_t spsr_el1; /* AArch64 */ 77 uint32_t spsr_svc; /* AArch32 */ 78 }; 79 80 uint32_t pad1; /* Doubleword-align the user half of the frame */ 81 82 /* AArch32 guests only */ 83 uint32_t spsr_fiq, spsr_irq, spsr_und, spsr_abt; 84 85 /* AArch64 guests only */ 86 uint64_t sp_el0; 87 uint64_t sp_el1, elr_el1; 88 }; 89 90 #undef __DECL_REG 91 92 /* Access to system registers */ 93 94 #define READ_SYSREG32(name) ({ \ 95 uint32_t _r; \ 96 asm volatile("mrs %0, "__stringify(name) : "=r" (_r)); \ 97 _r; }) 98 #define WRITE_SYSREG32(v, name) do { \ 99 uint32_t _r = v; \ 100 asm volatile("msr "__stringify(name)", %0" : : "r" (_r)); \ 101 } while (0) 102 103 #define WRITE_SYSREG64(v, name) do { \ 104 uint64_t _r = v; \ 105 asm volatile("msr "__stringify(name)", %0" : : "r" (_r)); \ 106 } while (0) 107 #define READ_SYSREG64(name) ({ \ 108 uint64_t _r; \ 109 asm volatile("mrs %0, "__stringify(name) : "=r" (_r)); \ 110 _r; }) 111 112 #define READ_SYSREG(name) READ_SYSREG64(name) 113 #define WRITE_SYSREG(v, name) WRITE_SYSREG64(v, name) 114 115 #endif /* __ASSEMBLY__ */ 116 117 #endif /* __ASM_ARM_ARM64_PROCESSOR_H */ 118 /* 119 * Local variables: 120 * mode: C 121 * c-file-style: "BSD" 122 * c-basic-offset: 4 123 * indent-tabs-mode: nil 124 * End: 125 */ 126