Lines Matching refs:NAND
7 title: NAND Chip and NAND Controller Generic Binding
14 The NAND controller should be represented with its own DT node, and
15 all NAND chips attached to this controller should be defined as
16 children nodes of the NAND controller. This representation should be
47 NAND controller (even if they are not used). As many additional
49 lines. 'reg' entries of the NAND chip subnodes become indexes of
66 1/ The ECC engine is part of the NAND controller, in this
68 2/ The ECC engine is part of the NAND part (on-die), in this
99 Bus width to the NAND chip
136 want to make your NAND as reliable as possible.
141 Whether or not the NAND chip is a boot medium. Drivers might
154 Ready/Busy pins. Active state refers to the NAND ready state and
160 Regions in the NAND chip which are protected using a secure element