Lines Matching refs:gcc
7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
12 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
240 clocks = <&gcc GCC_CRYPTO_CLK>,
241 <&gcc GCC_CRYPTO_AXI_CLK>,
242 <&gcc GCC_CRYPTO_AHB_CLK>;
429 clocks = <&gcc GCC_PRNG_AHB_CLK>;
926 gcc: clock-controller@1800000 { label
927 compatible = "qcom,gcc-msm8916";
952 power-domains = <&gcc MDSS_GDSC>;
954 clocks = <&gcc GCC_MDSS_AHB_CLK>,
955 <&gcc GCC_MDSS_AXI_CLK>,
956 <&gcc GCC_MDSS_VSYNC_CLK>;
978 clocks = <&gcc GCC_MDSS_AHB_CLK>,
979 <&gcc GCC_MDSS_AXI_CLK>,
980 <&gcc GCC_MDSS_MDP_CLK>,
981 <&gcc GCC_MDSS_VSYNC_CLK>;
1010 assigned-clocks = <&gcc BYTE0_CLK_SRC>,
1011 <&gcc PCLK0_CLK_SRC>;
1015 clocks = <&gcc GCC_MDSS_MDP_CLK>,
1016 <&gcc GCC_MDSS_AHB_CLK>,
1017 <&gcc GCC_MDSS_AXI_CLK>,
1018 <&gcc GCC_MDSS_BYTE0_CLK>,
1019 <&gcc GCC_MDSS_PCLK0_CLK>,
1020 <&gcc GCC_MDSS_ESC0_CLK>;
1064 clocks = <&gcc GCC_MDSS_AHB_CLK>,
1102 power-domains = <&gcc VFE_GDSC>;
1103 clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
1104 <&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
1105 <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
1106 <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
1107 <&gcc GCC_CAMSS_CSI0_AHB_CLK>,
1108 <&gcc GCC_CAMSS_CSI0_CLK>,
1109 <&gcc GCC_CAMSS_CSI0PHY_CLK>,
1110 <&gcc GCC_CAMSS_CSI0PIX_CLK>,
1111 <&gcc GCC_CAMSS_CSI0RDI_CLK>,
1112 <&gcc GCC_CAMSS_CSI1_AHB_CLK>,
1113 <&gcc GCC_CAMSS_CSI1_CLK>,
1114 <&gcc GCC_CAMSS_CSI1PHY_CLK>,
1115 <&gcc GCC_CAMSS_CSI1PIX_CLK>,
1116 <&gcc GCC_CAMSS_CSI1RDI_CLK>,
1117 <&gcc GCC_CAMSS_AHB_CLK>,
1118 <&gcc GCC_CAMSS_VFE0_CLK>,
1119 <&gcc GCC_CAMSS_CSI_VFE0_CLK>,
1120 <&gcc GCC_CAMSS_VFE_AHB_CLK>,
1121 <&gcc GCC_CAMSS_VFE_AXI_CLK>;
1155 clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
1156 <&gcc GCC_CAMSS_CCI_AHB_CLK>,
1157 <&gcc GCC_CAMSS_CCI_CLK>,
1158 <&gcc GCC_CAMSS_AHB_CLK>;
1161 assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
1162 <&gcc GCC_CAMSS_CCI_CLK>;
1190 <&gcc GCC_OXILI_GFX3D_CLK>,
1191 <&gcc GCC_OXILI_AHB_CLK>,
1192 <&gcc GCC_OXILI_GMEM_CLK>,
1193 <&gcc GCC_BIMC_GFX_CLK>,
1194 <&gcc GCC_BIMC_GPU_CLK>,
1195 <&gcc GFX3D_CLK_SRC>;
1196 power-domains = <&gcc OXILI_GDSC>;
1216 power-domains = <&gcc VENUS_GDSC>;
1217 clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
1218 <&gcc GCC_VENUS0_AHB_CLK>,
1219 <&gcc GCC_VENUS0_AXI_CLK>;
1241 clocks = <&gcc GCC_SMMU_CFG_CLK>,
1242 <&gcc GCC_APSS_TCU_CLK>;
1274 clocks = <&gcc GCC_SMMU_CFG_CLK>,
1275 <&gcc GCC_GFX_TCU_CLK>;
1331 clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
1332 <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>,
1333 <&gcc GCC_BOOT_ROM_AHB_CLK>,
1396 clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>,
1397 <&gcc GCC_ULTAUDIO_PCNOC_MPORT_CLK>,
1398 <&gcc GCC_ULTAUDIO_PCNOC_SWAY_CLK>,
1399 <&gcc GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK>,
1400 <&gcc GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK>,
1401 <&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
1402 <&gcc GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK>;
1425 clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>,
1426 <&gcc GCC_CODEC_DIGCODEC_CLK>;
1439 clocks = <&gcc GCC_SDCC1_APPS_CLK>,
1440 <&gcc GCC_SDCC1_AHB_CLK>,
1457 clocks = <&gcc GCC_SDCC2_APPS_CLK>,
1458 <&gcc GCC_SDCC2_AHB_CLK>,
1469 clocks = <&gcc GCC_BLSP1_AHB_CLK>;
1480 clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
1494 clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
1508 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
1509 <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;
1523 clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
1524 <&gcc GCC_BLSP1_AHB_CLK>;
1540 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
1541 <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
1555 clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
1556 <&gcc GCC_BLSP1_AHB_CLK>;
1572 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
1573 <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
1587 clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>,
1588 <&gcc GCC_BLSP1_AHB_CLK>;
1604 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
1605 <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
1619 clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
1620 <&gcc GCC_BLSP1_AHB_CLK>;
1636 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
1637 <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>;
1651 clocks = <&gcc GCC_BLSP1_QUP5_SPI_APPS_CLK>,
1652 <&gcc GCC_BLSP1_AHB_CLK>;
1668 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
1669 <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
1683 clocks = <&gcc GCC_BLSP1_QUP6_SPI_APPS_CLK>,
1684 <&gcc GCC_BLSP1_AHB_CLK>;
1702 clocks = <&gcc GCC_USB_HS_AHB_CLK>,
1703 <&gcc GCC_USB_HS_SYSTEM_CLK>;
1705 assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
1707 resets = <&gcc GCC_USB_HS_BCR>;
1725 clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
1727 resets = <&gcc GCC_USB2A_PHY_BCR>, <&usb 0>;
1814 clocks = <&a53pll>, <&gcc GPLL0_VOTE>;