Lines Matching refs:control
259 vmcb->control.clean = 0; in vmcb_mark_all_dirty()
264 vmcb->control.clean = VMCB_ALL_CLEAN_MASK in vmcb_mark_all_clean()
270 return (vmcb->control.clean & (1 << bit)); in vmcb_is_clean()
275 vmcb->control.clean &= ~(1 << bit); in vmcb_mark_dirty()
280 return !test_bit(bit, (unsigned long *)&vmcb->control.clean); in vmcb_is_dirty()
288 static inline void vmcb_set_intercept(struct vmcb_control_area *control, u32 bit) in vmcb_set_intercept() argument
291 __set_bit(bit, (unsigned long *)&control->intercepts); in vmcb_set_intercept()
294 static inline void vmcb_clr_intercept(struct vmcb_control_area *control, u32 bit) in vmcb_clr_intercept() argument
297 __clear_bit(bit, (unsigned long *)&control->intercepts); in vmcb_clr_intercept()
300 static inline bool vmcb_is_intercept(struct vmcb_control_area *control, u32 bit) in vmcb_is_intercept() argument
303 return test_bit(bit, (unsigned long *)&control->intercepts); in vmcb_is_intercept()
311 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR0_READ); in set_dr_intercepts()
312 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR1_READ); in set_dr_intercepts()
313 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR2_READ); in set_dr_intercepts()
314 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR3_READ); in set_dr_intercepts()
315 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR4_READ); in set_dr_intercepts()
316 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR5_READ); in set_dr_intercepts()
317 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR6_READ); in set_dr_intercepts()
318 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR0_WRITE); in set_dr_intercepts()
319 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR1_WRITE); in set_dr_intercepts()
320 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR2_WRITE); in set_dr_intercepts()
321 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR3_WRITE); in set_dr_intercepts()
322 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR4_WRITE); in set_dr_intercepts()
323 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR5_WRITE); in set_dr_intercepts()
324 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR6_WRITE); in set_dr_intercepts()
327 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_READ); in set_dr_intercepts()
328 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_WRITE); in set_dr_intercepts()
337 vmcb->control.intercepts[INTERCEPT_DR] = 0; in clr_dr_intercepts()
341 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_READ); in clr_dr_intercepts()
342 vmcb_set_intercept(&vmcb->control, INTERCEPT_DR7_WRITE); in clr_dr_intercepts()
353 vmcb_set_intercept(&vmcb->control, INTERCEPT_EXCEPTION_OFFSET + bit); in set_exception_intercept()
363 vmcb_clr_intercept(&vmcb->control, INTERCEPT_EXCEPTION_OFFSET + bit); in clr_exception_intercept()
372 vmcb_set_intercept(&vmcb->control, bit); in svm_set_intercept()
381 vmcb_clr_intercept(&vmcb->control, bit); in svm_clr_intercept()
388 return vmcb_is_intercept(&svm->vmcb->control, bit); in svm_is_intercept()
393 return !!(svm->vmcb->control.int_ctl & V_GIF_ENABLE_MASK); in vgif_enabled()
399 svm->vmcb->control.int_ctl |= V_GIF_MASK; in enable_gif()
407 svm->vmcb->control.int_ctl &= ~V_GIF_MASK; in disable_gif()
415 return !!(svm->vmcb->control.int_ctl & V_GIF_MASK); in gif_set()
484 svm->vmcb->control.exit_code = exit_code; in nested_svm_simple_vmexit()
485 svm->vmcb->control.exit_info_1 = 0; in nested_svm_simple_vmexit()
486 svm->vmcb->control.exit_info_2 = 0; in nested_svm_simple_vmexit()
498 struct vmcb_control_area *control);