Lines Matching refs:GENMASK_ULL
89 se_bank = (*pos & GENMASK_ULL(33, 24)) >> 24; in amdgpu_debugfs_process_reg_op()
90 sh_bank = (*pos & GENMASK_ULL(43, 34)) >> 34; in amdgpu_debugfs_process_reg_op()
91 instance_bank = (*pos & GENMASK_ULL(53, 44)) >> 44; in amdgpu_debugfs_process_reg_op()
102 me = (*pos & GENMASK_ULL(33, 24)) >> 24; in amdgpu_debugfs_process_reg_op()
103 pipe = (*pos & GENMASK_ULL(43, 34)) >> 34; in amdgpu_debugfs_process_reg_op()
104 queue = (*pos & GENMASK_ULL(53, 44)) >> 44; in amdgpu_debugfs_process_reg_op()
105 vmid = (*pos & GENMASK_ULL(58, 54)) >> 54; in amdgpu_debugfs_process_reg_op()
897 offset = (*pos & GENMASK_ULL(6, 0)); in amdgpu_debugfs_wave_read()
898 se = (*pos & GENMASK_ULL(14, 7)) >> 7; in amdgpu_debugfs_wave_read()
899 sh = (*pos & GENMASK_ULL(22, 15)) >> 15; in amdgpu_debugfs_wave_read()
900 cu = (*pos & GENMASK_ULL(30, 23)) >> 23; in amdgpu_debugfs_wave_read()
901 wave = (*pos & GENMASK_ULL(36, 31)) >> 31; in amdgpu_debugfs_wave_read()
902 simd = (*pos & GENMASK_ULL(44, 37)) >> 37; in amdgpu_debugfs_wave_read()
989 offset = (*pos & GENMASK_ULL(11, 0)) >> 2; in amdgpu_debugfs_gpr_read()
990 se = (*pos & GENMASK_ULL(19, 12)) >> 12; in amdgpu_debugfs_gpr_read()
991 sh = (*pos & GENMASK_ULL(27, 20)) >> 20; in amdgpu_debugfs_gpr_read()
992 cu = (*pos & GENMASK_ULL(35, 28)) >> 28; in amdgpu_debugfs_gpr_read()
993 wave = (*pos & GENMASK_ULL(43, 36)) >> 36; in amdgpu_debugfs_gpr_read()
994 simd = (*pos & GENMASK_ULL(51, 44)) >> 44; in amdgpu_debugfs_gpr_read()
995 thread = (*pos & GENMASK_ULL(59, 52)) >> 52; in amdgpu_debugfs_gpr_read()
996 bank = (*pos & GENMASK_ULL(61, 60)) >> 60; in amdgpu_debugfs_gpr_read()