Lines Matching refs:gfx
565 adev->gfx.rlc.funcs && in amdgpu_mm_wreg_mmio_rlc()
566 adev->gfx.rlc.funcs->is_rlcg_access_range) { in amdgpu_mm_wreg_mmio_rlc()
567 if (adev->gfx.rlc.funcs->is_rlcg_access_range(adev, reg)) in amdgpu_mm_wreg_mmio_rlc()
568 return adev->gfx.rlc.funcs->sriov_wreg(adev, reg, v, 0, 0); in amdgpu_mm_wreg_mmio_rlc()
2010 adev->gfx.config.max_shader_engines = le32_to_cpu(gpu_info_fw->gc_num_se); in amdgpu_device_parse_gpu_info_fw()
2011 adev->gfx.config.max_cu_per_sh = le32_to_cpu(gpu_info_fw->gc_num_cu_per_sh); in amdgpu_device_parse_gpu_info_fw()
2012 adev->gfx.config.max_sh_per_se = le32_to_cpu(gpu_info_fw->gc_num_sh_per_se); in amdgpu_device_parse_gpu_info_fw()
2013 adev->gfx.config.max_backends_per_se = le32_to_cpu(gpu_info_fw->gc_num_rb_per_se); in amdgpu_device_parse_gpu_info_fw()
2014 adev->gfx.config.max_texture_channel_caches = in amdgpu_device_parse_gpu_info_fw()
2016 adev->gfx.config.max_gprs = le32_to_cpu(gpu_info_fw->gc_num_gprs); in amdgpu_device_parse_gpu_info_fw()
2017 adev->gfx.config.max_gs_threads = le32_to_cpu(gpu_info_fw->gc_num_max_gs_thds); in amdgpu_device_parse_gpu_info_fw()
2018 adev->gfx.config.gs_vgt_table_depth = le32_to_cpu(gpu_info_fw->gc_gs_table_depth); in amdgpu_device_parse_gpu_info_fw()
2019 adev->gfx.config.gs_prim_buffer_depth = le32_to_cpu(gpu_info_fw->gc_gsprim_buff_depth); in amdgpu_device_parse_gpu_info_fw()
2020 adev->gfx.config.double_offchip_lds_buf = in amdgpu_device_parse_gpu_info_fw()
2022 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gpu_info_fw->gc_wave_size); in amdgpu_device_parse_gpu_info_fw()
2023 adev->gfx.cu_info.max_waves_per_simd = in amdgpu_device_parse_gpu_info_fw()
2025 adev->gfx.cu_info.max_scratch_slots_per_cu = in amdgpu_device_parse_gpu_info_fw()
2027 adev->gfx.cu_info.lds_size = le32_to_cpu(gpu_info_fw->gc_lds_size); in amdgpu_device_parse_gpu_info_fw()
2032 adev->gfx.config.num_sc_per_sh = in amdgpu_device_parse_gpu_info_fw()
2034 adev->gfx.config.num_packer_per_sc = in amdgpu_device_parse_gpu_info_fw()
2797 container_of(work, struct amdgpu_device, gfx.gfx_off_delay_work.work); in amdgpu_device_delay_enable_gfx_off()
2799 WARN_ON_ONCE(adev->gfx.gfx_off_state); in amdgpu_device_delay_enable_gfx_off()
2800 WARN_ON_ONCE(adev->gfx.gfx_off_req_count); in amdgpu_device_delay_enable_gfx_off()
2803 adev->gfx.gfx_off_state = true; in amdgpu_device_delay_enable_gfx_off()
3424 bitmap_zero(adev->gfx.pipe_reserve_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); in amdgpu_device_init()
3451 mutex_init(&adev->gfx.gpu_clock_mutex); in amdgpu_device_init()
3453 mutex_init(&adev->gfx.pipe_reserve_mutex); in amdgpu_device_init()
3454 mutex_init(&adev->gfx.gfx_off_mutex); in amdgpu_device_init()
3489 INIT_DELAYED_WORK(&adev->gfx.gfx_off_delay_work, in amdgpu_device_init()
3494 adev->gfx.gfx_off_req_count = 1; in amdgpu_device_init()
3679 adev->gfx.config.max_shader_engines, in amdgpu_device_init()
3680 adev->gfx.config.max_sh_per_se, in amdgpu_device_init()
3681 adev->gfx.config.max_cu_per_sh, in amdgpu_device_init()
3682 adev->gfx.cu_info.number); in amdgpu_device_init()