Lines Matching refs:afb
678 static int convert_tiling_flags_to_modifier(struct amdgpu_framebuffer *afb) in convert_tiling_flags_to_modifier() argument
680 struct amdgpu_device *adev = drm_to_adev(afb->base.dev); in convert_tiling_flags_to_modifier()
683 if (!afb->tiling_flags || !AMDGPU_TILING_GET(afb->tiling_flags, SWIZZLE_MODE)) { in convert_tiling_flags_to_modifier()
686 int swizzle = AMDGPU_TILING_GET(afb->tiling_flags, SWIZZLE_MODE); in convert_tiling_flags_to_modifier()
695 uint32_t dcc_offset = AMDGPU_TILING_GET(afb->tiling_flags, DCC_OFFSET_256B); in convert_tiling_flags_to_modifier()
730 if (!has_xor && afb->base.format->cpp[0] != 4) in convert_tiling_flags_to_modifier()
759 AMD_FMT_MOD_SET(TILE, AMDGPU_TILING_GET(afb->tiling_flags, SWIZZLE_MODE)) | in convert_tiling_flags_to_modifier()
766 bool dcc_i64b = AMDGPU_TILING_GET(afb->tiling_flags, DCC_INDEPENDENT_64B) != 0; in convert_tiling_flags_to_modifier()
786 afb->base.offsets[1] = dcc_offset * 256 + afb->base.offsets[0]; in convert_tiling_flags_to_modifier()
787 afb->base.pitches[1] = in convert_tiling_flags_to_modifier()
788 AMDGPU_TILING_GET(afb->tiling_flags, DCC_PITCH_MAX) + 1; in convert_tiling_flags_to_modifier()
798 if (extract_render_dcc_offset(adev, afb->base.obj[0], in convert_tiling_flags_to_modifier()
801 render_dcc_offset != afb->base.offsets[1] && in convert_tiling_flags_to_modifier()
806 afb->base.offsets[2] = render_dcc_offset; in convert_tiling_flags_to_modifier()
822 dcc_block_bits -= ilog2(afb->base.format->cpp[0]); in convert_tiling_flags_to_modifier()
823 afb->base.pitches[2] = ALIGN(afb->base.width, in convert_tiling_flags_to_modifier()
826 format_info = amdgpu_lookup_format_info(afb->base.format->format, in convert_tiling_flags_to_modifier()
831 afb->base.format = format_info; in convert_tiling_flags_to_modifier()
835 afb->base.modifier = modifier; in convert_tiling_flags_to_modifier()
836 afb->base.flags |= DRM_MODE_FB_MODIFIERS; in convert_tiling_flags_to_modifier()
841 static int check_tiling_flags_gfx6(struct amdgpu_framebuffer *afb) in check_tiling_flags_gfx6() argument
846 if (AMDGPU_TILING_GET(afb->tiling_flags, SWIZZLE_MODE) == 0) in check_tiling_flags_gfx6()
849 micro_tile_mode = AMDGPU_TILING_GET(afb->tiling_flags, MICRO_TILE_MODE); in check_tiling_flags_gfx6()
855 drm_dbg_kms(afb->base.dev, in check_tiling_flags_gfx6()