Lines Matching refs:PACKET3
3593 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); in gfx10_kiq_set_resources()
3612 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); in gfx10_kiq_map_queues()
3638 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4)); in gfx10_kiq_unmap_queues()
3665 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_QUERY_STATUS, 5)); in gfx10_kiq_query_status()
3683 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0)); in gfx10_kiq_invalidate_tlbs()
3813 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v10_0_write_data_to_reg()
3826 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v10_0_wait_reg_mem()
3867 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1)); in gfx_v10_0_ring_test_ring()
3912 ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3); in gfx_v10_0_ring_test_ib()
4403 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v10_0_get_csb_buffer()
4406 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_get_csb_buffer()
4414 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v10_0_get_csb_buffer()
4427 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1)); in gfx_v10_0_get_csb_buffer()
4431 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v10_0_get_csb_buffer()
4434 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v10_0_get_csb_buffer()
6231 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v10_0_cp_gfx_start()
6234 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_cp_gfx_start()
6242 PACKET3(PACKET3_SET_CONTEXT_REG, in gfx_v10_0_cp_gfx_start()
6254 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 1)); in gfx_v10_0_cp_gfx_start()
6258 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v10_0_cp_gfx_start()
6261 amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v10_0_cp_gfx_start()
6264 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); in gfx_v10_0_cp_gfx_start()
6281 amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v10_0_cp_gfx_start()
8589 header = PACKET3(PACKET3_INDIRECT_BUFFER_CNST, 2); in gfx_v10_0_ring_emit_ib_gfx()
8591 header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); in gfx_v10_0_ring_emit_ib_gfx()
8636 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); in gfx_v10_0_ring_emit_ib_compute()
8641 amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); in gfx_v10_0_ring_emit_ib_compute()
8659 amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6)); in gfx_v10_0_ring_emit_fence()
8703 amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); in gfx_v10_0_ring_emit_vm_flush()
8717 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v10_0_ring_emit_fence_kiq()
8726 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v10_0_ring_emit_fence_kiq()
8737 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); in gfx_v10_0_ring_emit_sb()
8770 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v10_0_ring_emit_cntxcntl()
8779 amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3)); in gfx_v10_0_ring_emit_init_cond_exec()
8859 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); in gfx_v10_0_ring_emit_ce_meta()
8893 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); in gfx_v10_0_ring_emit_de_meta()
8918 amdgpu_ring_write(ring, PACKET3(PACKET3_FRAME_CONTROL, 0)); in gfx_v10_0_ring_emit_frame_cntl()
8927 amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4)); in gfx_v10_0_ring_emit_rreg()
8955 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v10_0_ring_emit_wreg()
9336 amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 6)); in gfx_v10_0_emit_mem_sync()
9367 .nop = PACKET3(PACKET3_NOP, 0x3FFF),
9422 .nop = PACKET3(PACKET3_NOP, 0x3FFF),
9458 .nop = PACKET3(PACKET3_NOP, 0x3FFF),