Lines Matching refs:ib
454 struct amdgpu_ib *ib, in sdma_v5_0_ring_emit_ib() argument
473 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v5_0_ring_emit_ib()
474 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v5_0_ring_emit_ib()
475 amdgpu_ring_write(ring, ib->length_dw); in sdma_v5_0_ring_emit_ib()
1045 struct amdgpu_ib ib; in sdma_v5_0_ring_test_ib() local
1061 memset(&ib, 0, sizeof(ib)); in sdma_v5_0_ring_test_ib()
1063 AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v5_0_ring_test_ib()
1069 ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v5_0_ring_test_ib()
1071 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v5_0_ring_test_ib()
1072 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v5_0_ring_test_ib()
1073 ib.ptr[3] = SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(0); in sdma_v5_0_ring_test_ib()
1074 ib.ptr[4] = 0xDEADBEEF; in sdma_v5_0_ring_test_ib()
1075 ib.ptr[5] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v5_0_ring_test_ib()
1076 ib.ptr[6] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v5_0_ring_test_ib()
1077 ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v5_0_ring_test_ib()
1078 ib.length_dw = 8; in sdma_v5_0_ring_test_ib()
1080 r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); in sdma_v5_0_ring_test_ib()
1100 amdgpu_ib_free(adev, &ib, NULL); in sdma_v5_0_ring_test_ib()
1118 static void sdma_v5_0_vm_copy_pte(struct amdgpu_ib *ib, in sdma_v5_0_vm_copy_pte() argument
1124 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v5_0_vm_copy_pte()
1126 ib->ptr[ib->length_dw++] = bytes - 1; in sdma_v5_0_vm_copy_pte()
1127 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v5_0_vm_copy_pte()
1128 ib->ptr[ib->length_dw++] = lower_32_bits(src); in sdma_v5_0_vm_copy_pte()
1129 ib->ptr[ib->length_dw++] = upper_32_bits(src); in sdma_v5_0_vm_copy_pte()
1130 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v5_0_vm_copy_pte()
1131 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v5_0_vm_copy_pte()
1146 static void sdma_v5_0_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe, in sdma_v5_0_vm_write_pte() argument
1152 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v5_0_vm_write_pte()
1154 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v5_0_vm_write_pte()
1155 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v5_0_vm_write_pte()
1156 ib->ptr[ib->length_dw++] = ndw - 1; in sdma_v5_0_vm_write_pte()
1158 ib->ptr[ib->length_dw++] = lower_32_bits(value); in sdma_v5_0_vm_write_pte()
1159 ib->ptr[ib->length_dw++] = upper_32_bits(value); in sdma_v5_0_vm_write_pte()
1176 static void sdma_v5_0_vm_set_pte_pde(struct amdgpu_ib *ib, in sdma_v5_0_vm_set_pte_pde() argument
1182 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_PTEPDE); in sdma_v5_0_vm_set_pte_pde()
1183 ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */ in sdma_v5_0_vm_set_pte_pde()
1184 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v5_0_vm_set_pte_pde()
1185 ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */ in sdma_v5_0_vm_set_pte_pde()
1186 ib->ptr[ib->length_dw++] = upper_32_bits(flags); in sdma_v5_0_vm_set_pte_pde()
1187 ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */ in sdma_v5_0_vm_set_pte_pde()
1188 ib->ptr[ib->length_dw++] = upper_32_bits(addr); in sdma_v5_0_vm_set_pte_pde()
1189 ib->ptr[ib->length_dw++] = incr; /* increment size */ in sdma_v5_0_vm_set_pte_pde()
1190 ib->ptr[ib->length_dw++] = 0; in sdma_v5_0_vm_set_pte_pde()
1191 ib->ptr[ib->length_dw++] = count - 1; /* number of entries */ in sdma_v5_0_vm_set_pte_pde()
1201 static void sdma_v5_0_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) in sdma_v5_0_ring_pad_ib() argument
1207 pad_count = (-ib->length_dw) & 0x7; in sdma_v5_0_ring_pad_ib()
1210 ib->ptr[ib->length_dw++] = in sdma_v5_0_ring_pad_ib()
1214 ib->ptr[ib->length_dw++] = in sdma_v5_0_ring_pad_ib()
1773 static void sdma_v5_0_emit_copy_buffer(struct amdgpu_ib *ib, in sdma_v5_0_emit_copy_buffer() argument
1779 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v5_0_emit_copy_buffer()
1782 ib->ptr[ib->length_dw++] = byte_count - 1; in sdma_v5_0_emit_copy_buffer()
1783 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v5_0_emit_copy_buffer()
1784 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset); in sdma_v5_0_emit_copy_buffer()
1785 ib->ptr[ib->length_dw++] = upper_32_bits(src_offset); in sdma_v5_0_emit_copy_buffer()
1786 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in sdma_v5_0_emit_copy_buffer()
1787 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in sdma_v5_0_emit_copy_buffer()
1800 static void sdma_v5_0_emit_fill_buffer(struct amdgpu_ib *ib, in sdma_v5_0_emit_fill_buffer() argument
1805 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL); in sdma_v5_0_emit_fill_buffer()
1806 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in sdma_v5_0_emit_fill_buffer()
1807 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in sdma_v5_0_emit_fill_buffer()
1808 ib->ptr[ib->length_dw++] = src_data; in sdma_v5_0_emit_fill_buffer()
1809 ib->ptr[ib->length_dw++] = byte_count - 1; in sdma_v5_0_emit_fill_buffer()