Lines Matching refs:dmc
242 return i915->dmc.dmc_info[DMC_FW_MAIN].payload; in intel_dmc_has_payload()
274 struct intel_dmc *dmc = &dev_priv->dmc; in intel_dmc_load_program() local
283 if (!dev_priv->dmc.dmc_info[DMC_FW_MAIN].payload) { in intel_dmc_load_program()
294 for (i = 0; i < dmc->dmc_info[id].dmc_fw_size; i++) { in intel_dmc_load_program()
296 DMC_PROGRAM(dmc->dmc_info[id].start_mmioaddr, i), in intel_dmc_load_program()
297 dmc->dmc_info[id].payload[i]); in intel_dmc_load_program()
304 for (i = 0; i < dmc->dmc_info[id].mmio_count; i++) { in intel_dmc_load_program()
305 intel_de_write(dev_priv, dmc->dmc_info[id].mmioaddr[i], in intel_dmc_load_program()
306 dmc->dmc_info[id].mmiodata[i]); in intel_dmc_load_program()
310 dev_priv->dmc.dc_state = 0; in intel_dmc_load_program()
336 static void dmc_set_fw_offset(struct intel_dmc *dmc, in dmc_set_fw_offset() argument
344 struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc); in dmc_set_fw_offset()
358 if (dmc->dmc_info[id].present) in dmc_set_fw_offset()
362 dmc->dmc_info[id].present = true; in dmc_set_fw_offset()
363 dmc->dmc_info[id].dmc_offset = fw_info[i].offset; in dmc_set_fw_offset()
368 static u32 parse_dmc_fw_header(struct intel_dmc *dmc, in parse_dmc_fw_header() argument
372 struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc); in parse_dmc_fw_header()
373 struct dmc_fw_info *dmc_info = &dmc->dmc_info[dmc_id]; in parse_dmc_fw_header()
451 if (payload_size > dmc->max_fw_size) { in parse_dmc_fw_header()
472 parse_dmc_fw_package(struct intel_dmc *dmc, in parse_dmc_fw_package() argument
477 struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc); in parse_dmc_fw_package()
515 dmc_set_fw_offset(dmc, fw_info, num_entries, si, in parse_dmc_fw_package()
527 static u32 parse_dmc_fw_css(struct intel_dmc *dmc, in parse_dmc_fw_css() argument
531 struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc); in parse_dmc_fw_css()
546 if (dmc->required_version && in parse_dmc_fw_css()
547 css_header->version != dmc->required_version) { in parse_dmc_fw_css()
552 DMC_VERSION_MAJOR(dmc->required_version), in parse_dmc_fw_css()
553 DMC_VERSION_MINOR(dmc->required_version)); in parse_dmc_fw_css()
557 dmc->version = css_header->version; in parse_dmc_fw_css()
568 struct intel_dmc *dmc = &dev_priv->dmc; in parse_dmc_fw() local
580 r = parse_dmc_fw_css(dmc, css_header, fw->size); in parse_dmc_fw()
588 r = parse_dmc_fw_package(dmc, package_header, si, fw->size - readcount); in parse_dmc_fw()
595 if (!dev_priv->dmc.dmc_info[id].present) in parse_dmc_fw()
598 offset = readcount + dmc->dmc_info[id].dmc_offset * 4; in parse_dmc_fw()
605 parse_dmc_fw_header(dmc, dmc_header, fw->size - offset, id); in parse_dmc_fw()
611 drm_WARN_ON(&dev_priv->drm, dev_priv->dmc.wakeref); in intel_dmc_runtime_pm_get()
612 dev_priv->dmc.wakeref = in intel_dmc_runtime_pm_get()
619 fetch_and_zero(&dev_priv->dmc.wakeref); in intel_dmc_runtime_pm_put()
627 struct intel_dmc *dmc; in dmc_load_work_fn() local
630 dev_priv = container_of(work, typeof(*dev_priv), dmc.work); in dmc_load_work_fn()
631 dmc = &dev_priv->dmc; in dmc_load_work_fn()
633 request_firmware(&fw, dev_priv->dmc.fw_path, dev_priv->drm.dev); in dmc_load_work_fn()
642 dev_priv->dmc.fw_path, DMC_VERSION_MAJOR(dmc->version), in dmc_load_work_fn()
643 DMC_VERSION_MINOR(dmc->version)); in dmc_load_work_fn()
648 dmc->fw_path); in dmc_load_work_fn()
665 struct intel_dmc *dmc = &dev_priv->dmc; in intel_dmc_ucode_init() local
667 INIT_WORK(&dev_priv->dmc.work, dmc_load_work_fn); in intel_dmc_ucode_init()
683 dmc->fw_path = ADLP_DMC_PATH; in intel_dmc_ucode_init()
684 dmc->required_version = ADLP_DMC_VERSION_REQUIRED; in intel_dmc_ucode_init()
685 dmc->max_fw_size = GEN12_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
687 dmc->fw_path = ADLS_DMC_PATH; in intel_dmc_ucode_init()
688 dmc->required_version = ADLS_DMC_VERSION_REQUIRED; in intel_dmc_ucode_init()
689 dmc->max_fw_size = GEN12_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
691 dmc->fw_path = DG1_DMC_PATH; in intel_dmc_ucode_init()
692 dmc->required_version = DG1_DMC_VERSION_REQUIRED; in intel_dmc_ucode_init()
693 dmc->max_fw_size = GEN12_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
695 dmc->fw_path = RKL_DMC_PATH; in intel_dmc_ucode_init()
696 dmc->required_version = RKL_DMC_VERSION_REQUIRED; in intel_dmc_ucode_init()
697 dmc->max_fw_size = GEN12_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
699 dmc->fw_path = TGL_DMC_PATH; in intel_dmc_ucode_init()
700 dmc->required_version = TGL_DMC_VERSION_REQUIRED; in intel_dmc_ucode_init()
701 dmc->max_fw_size = GEN12_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
703 dmc->fw_path = ICL_DMC_PATH; in intel_dmc_ucode_init()
704 dmc->required_version = ICL_DMC_VERSION_REQUIRED; in intel_dmc_ucode_init()
705 dmc->max_fw_size = ICL_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
707 dmc->fw_path = GLK_DMC_PATH; in intel_dmc_ucode_init()
708 dmc->required_version = GLK_DMC_VERSION_REQUIRED; in intel_dmc_ucode_init()
709 dmc->max_fw_size = GLK_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
713 dmc->fw_path = KBL_DMC_PATH; in intel_dmc_ucode_init()
714 dmc->required_version = KBL_DMC_VERSION_REQUIRED; in intel_dmc_ucode_init()
715 dmc->max_fw_size = KBL_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
717 dmc->fw_path = SKL_DMC_PATH; in intel_dmc_ucode_init()
718 dmc->required_version = SKL_DMC_VERSION_REQUIRED; in intel_dmc_ucode_init()
719 dmc->max_fw_size = SKL_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
721 dmc->fw_path = BXT_DMC_PATH; in intel_dmc_ucode_init()
722 dmc->required_version = BXT_DMC_VERSION_REQUIRED; in intel_dmc_ucode_init()
723 dmc->max_fw_size = BXT_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
728 dmc->fw_path = NULL; in intel_dmc_ucode_init()
734 dmc->fw_path = dev_priv->params.dmc_firmware_path; in intel_dmc_ucode_init()
736 dmc->required_version = 0; in intel_dmc_ucode_init()
739 if (!dmc->fw_path) { in intel_dmc_ucode_init()
745 drm_dbg_kms(&dev_priv->drm, "Loading %s\n", dmc->fw_path); in intel_dmc_ucode_init()
746 schedule_work(&dev_priv->dmc.work); in intel_dmc_ucode_init()
762 flush_work(&dev_priv->dmc.work); in intel_dmc_ucode_suspend()
804 drm_WARN_ON(&dev_priv->drm, dev_priv->dmc.wakeref); in intel_dmc_ucode_fini()
807 kfree(dev_priv->dmc.dmc_info[id].payload); in intel_dmc_ucode_fini()