Lines Matching refs:mdata
197 static void mtk_spi_reset(struct mtk_spi *mdata) in mtk_spi_reset() argument
202 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_reset()
204 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_reset()
206 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_reset()
208 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_reset()
213 struct mtk_spi *mdata = spi_master_get_devdata(spi->master); in mtk_spi_set_hw_cs_timing() local
224 setup = (delay * DIV_ROUND_UP(mdata->spi_clk_hz, 1000000)) / 1000; in mtk_spi_set_hw_cs_timing()
229 hold = (delay * DIV_ROUND_UP(mdata->spi_clk_hz, 1000000)) / 1000; in mtk_spi_set_hw_cs_timing()
234 inactive = (delay * DIV_ROUND_UP(mdata->spi_clk_hz, 1000000)) / 1000; in mtk_spi_set_hw_cs_timing()
237 reg_val = readl(mdata->base + SPI_CFG0_REG); in mtk_spi_set_hw_cs_timing()
238 if (mdata->dev_comp->enhance_timing) { in mtk_spi_set_hw_cs_timing()
264 writel(reg_val, mdata->base + SPI_CFG0_REG); in mtk_spi_set_hw_cs_timing()
269 reg_val = readl(mdata->base + SPI_CFG1_REG); in mtk_spi_set_hw_cs_timing()
272 writel(reg_val, mdata->base + SPI_CFG1_REG); in mtk_spi_set_hw_cs_timing()
285 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_prepare_message() local
290 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_prepare_message()
318 if (mdata->dev_comp->enhance_timing) { in mtk_spi_prepare_message()
340 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_prepare_message()
343 if (mdata->dev_comp->need_pad_sel) in mtk_spi_prepare_message()
344 writel(mdata->pad_sel[spi->chip_select], in mtk_spi_prepare_message()
345 mdata->base + SPI_PAD_SEL_REG); in mtk_spi_prepare_message()
348 reg_val = readl(mdata->base + SPI_CFG1_REG); in mtk_spi_prepare_message()
352 writel(reg_val, mdata->base + SPI_CFG1_REG); in mtk_spi_prepare_message()
362 struct mtk_spi *mdata = spi_master_get_devdata(spi->master); in mtk_spi_set_cs() local
367 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_set_cs()
370 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_set_cs()
373 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_set_cs()
374 mdata->state = MTK_SPI_IDLE; in mtk_spi_set_cs()
375 mtk_spi_reset(mdata); in mtk_spi_set_cs()
383 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_prepare_transfer() local
385 if (xfer->speed_hz < mdata->spi_clk_hz / 2) in mtk_spi_prepare_transfer()
386 div = DIV_ROUND_UP(mdata->spi_clk_hz, xfer->speed_hz); in mtk_spi_prepare_transfer()
392 if (mdata->dev_comp->enhance_timing) { in mtk_spi_prepare_transfer()
393 reg_val = readl(mdata->base + SPI_CFG2_REG); in mtk_spi_prepare_transfer()
400 writel(reg_val, mdata->base + SPI_CFG2_REG); in mtk_spi_prepare_transfer()
402 reg_val = readl(mdata->base + SPI_CFG0_REG); in mtk_spi_prepare_transfer()
408 writel(reg_val, mdata->base + SPI_CFG0_REG); in mtk_spi_prepare_transfer()
415 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_setup_packet() local
417 packet_size = min_t(u32, mdata->xfer_len, MTK_SPI_PACKET_SIZE); in mtk_spi_setup_packet()
418 packet_loop = mdata->xfer_len / packet_size; in mtk_spi_setup_packet()
420 reg_val = readl(mdata->base + SPI_CFG1_REG); in mtk_spi_setup_packet()
424 writel(reg_val, mdata->base + SPI_CFG1_REG); in mtk_spi_setup_packet()
430 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_enable_transfer() local
432 cmd = readl(mdata->base + SPI_CMD_REG); in mtk_spi_enable_transfer()
433 if (mdata->state == MTK_SPI_IDLE) in mtk_spi_enable_transfer()
437 writel(cmd, mdata->base + SPI_CMD_REG); in mtk_spi_enable_transfer()
455 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_update_mdata_len() local
457 if (mdata->tx_sgl_len && mdata->rx_sgl_len) { in mtk_spi_update_mdata_len()
458 if (mdata->tx_sgl_len > mdata->rx_sgl_len) { in mtk_spi_update_mdata_len()
459 mult_delta = mtk_spi_get_mult_delta(mdata->rx_sgl_len); in mtk_spi_update_mdata_len()
460 mdata->xfer_len = mdata->rx_sgl_len - mult_delta; in mtk_spi_update_mdata_len()
461 mdata->rx_sgl_len = mult_delta; in mtk_spi_update_mdata_len()
462 mdata->tx_sgl_len -= mdata->xfer_len; in mtk_spi_update_mdata_len()
464 mult_delta = mtk_spi_get_mult_delta(mdata->tx_sgl_len); in mtk_spi_update_mdata_len()
465 mdata->xfer_len = mdata->tx_sgl_len - mult_delta; in mtk_spi_update_mdata_len()
466 mdata->tx_sgl_len = mult_delta; in mtk_spi_update_mdata_len()
467 mdata->rx_sgl_len -= mdata->xfer_len; in mtk_spi_update_mdata_len()
469 } else if (mdata->tx_sgl_len) { in mtk_spi_update_mdata_len()
470 mult_delta = mtk_spi_get_mult_delta(mdata->tx_sgl_len); in mtk_spi_update_mdata_len()
471 mdata->xfer_len = mdata->tx_sgl_len - mult_delta; in mtk_spi_update_mdata_len()
472 mdata->tx_sgl_len = mult_delta; in mtk_spi_update_mdata_len()
473 } else if (mdata->rx_sgl_len) { in mtk_spi_update_mdata_len()
474 mult_delta = mtk_spi_get_mult_delta(mdata->rx_sgl_len); in mtk_spi_update_mdata_len()
475 mdata->xfer_len = mdata->rx_sgl_len - mult_delta; in mtk_spi_update_mdata_len()
476 mdata->rx_sgl_len = mult_delta; in mtk_spi_update_mdata_len()
483 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_setup_dma_addr() local
485 if (mdata->tx_sgl) { in mtk_spi_setup_dma_addr()
487 mdata->base + SPI_TX_SRC_REG); in mtk_spi_setup_dma_addr()
489 if (mdata->dev_comp->dma_ext) in mtk_spi_setup_dma_addr()
491 mdata->base + SPI_TX_SRC_REG_64); in mtk_spi_setup_dma_addr()
495 if (mdata->rx_sgl) { in mtk_spi_setup_dma_addr()
497 mdata->base + SPI_RX_DST_REG); in mtk_spi_setup_dma_addr()
499 if (mdata->dev_comp->dma_ext) in mtk_spi_setup_dma_addr()
501 mdata->base + SPI_RX_DST_REG_64); in mtk_spi_setup_dma_addr()
512 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_fifo_transfer() local
514 mdata->cur_transfer = xfer; in mtk_spi_fifo_transfer()
515 mdata->xfer_len = min(MTK_SPI_MAX_FIFO_SIZE, xfer->len); in mtk_spi_fifo_transfer()
516 mdata->num_xfered = 0; in mtk_spi_fifo_transfer()
522 iowrite32_rep(mdata->base + SPI_TX_DATA_REG, xfer->tx_buf, cnt); in mtk_spi_fifo_transfer()
527 writel(reg_val, mdata->base + SPI_TX_DATA_REG); in mtk_spi_fifo_transfer()
541 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_dma_transfer() local
543 mdata->tx_sgl = NULL; in mtk_spi_dma_transfer()
544 mdata->rx_sgl = NULL; in mtk_spi_dma_transfer()
545 mdata->tx_sgl_len = 0; in mtk_spi_dma_transfer()
546 mdata->rx_sgl_len = 0; in mtk_spi_dma_transfer()
547 mdata->cur_transfer = xfer; in mtk_spi_dma_transfer()
548 mdata->num_xfered = 0; in mtk_spi_dma_transfer()
552 cmd = readl(mdata->base + SPI_CMD_REG); in mtk_spi_dma_transfer()
557 writel(cmd, mdata->base + SPI_CMD_REG); in mtk_spi_dma_transfer()
560 mdata->tx_sgl = xfer->tx_sg.sgl; in mtk_spi_dma_transfer()
562 mdata->rx_sgl = xfer->rx_sg.sgl; in mtk_spi_dma_transfer()
564 if (mdata->tx_sgl) { in mtk_spi_dma_transfer()
565 xfer->tx_dma = sg_dma_address(mdata->tx_sgl); in mtk_spi_dma_transfer()
566 mdata->tx_sgl_len = sg_dma_len(mdata->tx_sgl); in mtk_spi_dma_transfer()
568 if (mdata->rx_sgl) { in mtk_spi_dma_transfer()
569 xfer->rx_dma = sg_dma_address(mdata->rx_sgl); in mtk_spi_dma_transfer()
570 mdata->rx_sgl_len = sg_dma_len(mdata->rx_sgl); in mtk_spi_dma_transfer()
603 struct mtk_spi *mdata = spi_master_get_devdata(spi->master); in mtk_spi_setup() local
608 if (mdata->dev_comp->need_pad_sel && gpio_is_valid(spi->cs_gpio)) in mtk_spi_setup()
618 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_interrupt() local
619 struct spi_transfer *trans = mdata->cur_transfer; in mtk_spi_interrupt()
621 reg_val = readl(mdata->base + SPI_STATUS0_REG); in mtk_spi_interrupt()
623 mdata->state = MTK_SPI_PAUSED; in mtk_spi_interrupt()
625 mdata->state = MTK_SPI_IDLE; in mtk_spi_interrupt()
629 cnt = mdata->xfer_len / 4; in mtk_spi_interrupt()
630 ioread32_rep(mdata->base + SPI_RX_DATA_REG, in mtk_spi_interrupt()
631 trans->rx_buf + mdata->num_xfered, cnt); in mtk_spi_interrupt()
632 remainder = mdata->xfer_len % 4; in mtk_spi_interrupt()
634 reg_val = readl(mdata->base + SPI_RX_DATA_REG); in mtk_spi_interrupt()
636 mdata->num_xfered + in mtk_spi_interrupt()
643 mdata->num_xfered += mdata->xfer_len; in mtk_spi_interrupt()
644 if (mdata->num_xfered == trans->len) { in mtk_spi_interrupt()
649 len = trans->len - mdata->num_xfered; in mtk_spi_interrupt()
650 mdata->xfer_len = min(MTK_SPI_MAX_FIFO_SIZE, len); in mtk_spi_interrupt()
653 cnt = mdata->xfer_len / 4; in mtk_spi_interrupt()
654 iowrite32_rep(mdata->base + SPI_TX_DATA_REG, in mtk_spi_interrupt()
655 trans->tx_buf + mdata->num_xfered, cnt); in mtk_spi_interrupt()
657 remainder = mdata->xfer_len % 4; in mtk_spi_interrupt()
661 trans->tx_buf + (cnt * 4) + mdata->num_xfered, in mtk_spi_interrupt()
663 writel(reg_val, mdata->base + SPI_TX_DATA_REG); in mtk_spi_interrupt()
671 if (mdata->tx_sgl) in mtk_spi_interrupt()
672 trans->tx_dma += mdata->xfer_len; in mtk_spi_interrupt()
673 if (mdata->rx_sgl) in mtk_spi_interrupt()
674 trans->rx_dma += mdata->xfer_len; in mtk_spi_interrupt()
676 if (mdata->tx_sgl && (mdata->tx_sgl_len == 0)) { in mtk_spi_interrupt()
677 mdata->tx_sgl = sg_next(mdata->tx_sgl); in mtk_spi_interrupt()
678 if (mdata->tx_sgl) { in mtk_spi_interrupt()
679 trans->tx_dma = sg_dma_address(mdata->tx_sgl); in mtk_spi_interrupt()
680 mdata->tx_sgl_len = sg_dma_len(mdata->tx_sgl); in mtk_spi_interrupt()
683 if (mdata->rx_sgl && (mdata->rx_sgl_len == 0)) { in mtk_spi_interrupt()
684 mdata->rx_sgl = sg_next(mdata->rx_sgl); in mtk_spi_interrupt()
685 if (mdata->rx_sgl) { in mtk_spi_interrupt()
686 trans->rx_dma = sg_dma_address(mdata->rx_sgl); in mtk_spi_interrupt()
687 mdata->rx_sgl_len = sg_dma_len(mdata->rx_sgl); in mtk_spi_interrupt()
691 if (!mdata->tx_sgl && !mdata->rx_sgl) { in mtk_spi_interrupt()
693 cmd = readl(mdata->base + SPI_CMD_REG); in mtk_spi_interrupt()
696 writel(cmd, mdata->base + SPI_CMD_REG); in mtk_spi_interrupt()
713 struct mtk_spi *mdata; in mtk_spi_probe() local
717 master = spi_alloc_master(&pdev->dev, sizeof(*mdata)); in mtk_spi_probe()
741 mdata = spi_master_get_devdata(master); in mtk_spi_probe()
742 mdata->dev_comp = of_id->data; in mtk_spi_probe()
744 if (mdata->dev_comp->enhance_timing) in mtk_spi_probe()
747 if (mdata->dev_comp->must_tx) in mtk_spi_probe()
750 if (mdata->dev_comp->need_pad_sel) { in mtk_spi_probe()
751 mdata->pad_num = of_property_count_u32_elems( in mtk_spi_probe()
754 if (mdata->pad_num < 0) { in mtk_spi_probe()
761 mdata->pad_sel = devm_kmalloc_array(&pdev->dev, mdata->pad_num, in mtk_spi_probe()
763 if (!mdata->pad_sel) { in mtk_spi_probe()
768 for (i = 0; i < mdata->pad_num; i++) { in mtk_spi_probe()
771 i, &mdata->pad_sel[i]); in mtk_spi_probe()
772 if (mdata->pad_sel[i] > MT8173_SPI_MAX_PAD_SEL) { in mtk_spi_probe()
774 i, mdata->pad_sel[i]); in mtk_spi_probe()
782 mdata->base = devm_platform_ioremap_resource(pdev, 0); in mtk_spi_probe()
783 if (IS_ERR(mdata->base)) { in mtk_spi_probe()
784 ret = PTR_ERR(mdata->base); in mtk_spi_probe()
804 mdata->parent_clk = devm_clk_get(&pdev->dev, "parent-clk"); in mtk_spi_probe()
805 if (IS_ERR(mdata->parent_clk)) { in mtk_spi_probe()
806 ret = PTR_ERR(mdata->parent_clk); in mtk_spi_probe()
811 mdata->sel_clk = devm_clk_get(&pdev->dev, "sel-clk"); in mtk_spi_probe()
812 if (IS_ERR(mdata->sel_clk)) { in mtk_spi_probe()
813 ret = PTR_ERR(mdata->sel_clk); in mtk_spi_probe()
818 mdata->spi_clk = devm_clk_get(&pdev->dev, "spi-clk"); in mtk_spi_probe()
819 if (IS_ERR(mdata->spi_clk)) { in mtk_spi_probe()
820 ret = PTR_ERR(mdata->spi_clk); in mtk_spi_probe()
825 ret = clk_prepare_enable(mdata->spi_clk); in mtk_spi_probe()
831 ret = clk_set_parent(mdata->sel_clk, mdata->parent_clk); in mtk_spi_probe()
834 clk_disable_unprepare(mdata->spi_clk); in mtk_spi_probe()
838 mdata->spi_clk_hz = clk_get_rate(mdata->spi_clk); in mtk_spi_probe()
840 if (mdata->dev_comp->no_need_unprepare) in mtk_spi_probe()
841 clk_disable(mdata->spi_clk); in mtk_spi_probe()
843 clk_disable_unprepare(mdata->spi_clk); in mtk_spi_probe()
847 if (mdata->dev_comp->need_pad_sel) { in mtk_spi_probe()
848 if (mdata->pad_num != master->num_chipselect) { in mtk_spi_probe()
851 mdata->pad_num, master->num_chipselect); in mtk_spi_probe()
877 if (mdata->dev_comp->dma_ext) in mtk_spi_probe()
905 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_remove() local
909 mtk_spi_reset(mdata); in mtk_spi_remove()
911 if (mdata->dev_comp->no_need_unprepare) in mtk_spi_remove()
912 clk_unprepare(mdata->spi_clk); in mtk_spi_remove()
922 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_suspend() local
929 clk_disable_unprepare(mdata->spi_clk); in mtk_spi_suspend()
938 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_resume() local
941 ret = clk_prepare_enable(mdata->spi_clk); in mtk_spi_resume()
950 clk_disable_unprepare(mdata->spi_clk); in mtk_spi_resume()
960 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_runtime_suspend() local
962 if (mdata->dev_comp->no_need_unprepare) in mtk_spi_runtime_suspend()
963 clk_disable(mdata->spi_clk); in mtk_spi_runtime_suspend()
965 clk_disable_unprepare(mdata->spi_clk); in mtk_spi_runtime_suspend()
973 struct mtk_spi *mdata = spi_master_get_devdata(master); in mtk_spi_runtime_resume() local
976 if (mdata->dev_comp->no_need_unprepare) in mtk_spi_runtime_resume()
977 ret = clk_enable(mdata->spi_clk); in mtk_spi_runtime_resume()
979 ret = clk_prepare_enable(mdata->spi_clk); in mtk_spi_runtime_resume()