Lines Matching refs:dpcd
1531 const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
1534 const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
1737 drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_max_link_rate()
1739 return drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]); in drm_dp_max_link_rate()
1743 drm_dp_max_lane_count(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_max_lane_count()
1745 return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; in drm_dp_max_lane_count()
1749 drm_dp_enhanced_frame_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_enhanced_frame_cap()
1751 return dpcd[DP_DPCD_REV] >= 0x11 && in drm_dp_enhanced_frame_cap()
1752 (dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP); in drm_dp_enhanced_frame_cap()
1756 drm_dp_fast_training_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_fast_training_cap()
1758 return dpcd[DP_DPCD_REV] >= 0x11 && in drm_dp_fast_training_cap()
1759 (dpcd[DP_MAX_DOWNSPREAD] & DP_NO_AUX_HANDSHAKE_LINK_TRAINING); in drm_dp_fast_training_cap()
1763 drm_dp_tps3_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_tps3_supported()
1765 return dpcd[DP_DPCD_REV] >= 0x12 && in drm_dp_tps3_supported()
1766 dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED; in drm_dp_tps3_supported()
1770 drm_dp_tps4_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_tps4_supported()
1772 return dpcd[DP_DPCD_REV] >= 0x14 && in drm_dp_tps4_supported()
1773 dpcd[DP_MAX_DOWNSPREAD] & DP_TPS4_SUPPORTED; in drm_dp_tps4_supported()
1777 drm_dp_training_pattern_mask(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_training_pattern_mask()
1779 return (dpcd[DP_DPCD_REV] >= 0x14) ? DP_TRAINING_PATTERN_MASK_1_4 : in drm_dp_training_pattern_mask()
1784 drm_dp_is_branch(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_is_branch()
1786 return dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT; in drm_dp_is_branch()
1828 drm_dp_channel_coding_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_channel_coding_supported()
1830 return dpcd[DP_MAIN_LINK_CHANNEL_CODING] & DP_CAP_ANSI_8B10B; in drm_dp_channel_coding_supported()
1834 drm_dp_alternate_scrambler_reset_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_alternate_scrambler_reset_cap()
1836 return dpcd[DP_EDP_CONFIGURATION_CAP] & in drm_dp_alternate_scrambler_reset_cap()
1842 drm_dp_sink_can_do_video_without_timing_msa(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_sink_can_do_video_without_timing_msa()
1844 return dpcd[DP_DOWN_STREAM_PORT_COUNT] & in drm_dp_sink_can_do_video_without_timing_msa()
2060 u8 dpcd[DP_RECEIVER_CAP_SIZE]);
2073 const u8 dpcd[DP_RECEIVER_CAP_SIZE],
2075 bool drm_dp_downstream_is_type(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
2077 bool drm_dp_downstream_is_tmds(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
2080 int drm_dp_downstream_max_dotclock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
2082 int drm_dp_downstream_max_tmds_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
2085 int drm_dp_downstream_min_tmds_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
2088 int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
2091 bool drm_dp_downstream_420_passthrough(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
2093 bool drm_dp_downstream_444_to_420_conversion(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
2096 const u8 dpcd[DP_RECEIVER_CAP_SIZE],
2100 const u8 dpcd[DP_RECEIVER_CAP_SIZE],
2105 drm_dp_subconnector_type(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
2109 const u8 *dpcd,
2114 const u8 dpcd[DP_RECEIVER_CAP_SIZE],
2317 int drm_dp_get_pcon_max_frl_bw(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
2339 bool drm_dp_downstream_rgb_to_ycbcr_conversion(const u8 dpcd[DP_RECEIVER_CAP_SIZE],