Lines Matching refs:R4
43 #define R4 BPF_REG_4 macro
652 i += __bpf_ld_imm64(&insn[i], R4, val); in __bpf_fill_alu_shift()
653 insn[i++] = BPF_JMP_REG(BPF_JEQ, R1, R4, 1); in __bpf_fill_alu_shift()
1621 i += __bpf_ld_imm64(&insns[i], R4, fetch); in __bpf_emit_atomic64()
1631 insns[i++] = BPF_JMP_REG(BPF_JEQ, R2, R4, 1); in __bpf_emit_atomic64()
1668 i += __bpf_ld_imm64(&insns[i], R4, fetch); in __bpf_emit_atomic32()
1678 insns[i++] = BPF_JMP_REG(BPF_JEQ, R2, R4, 1); in __bpf_emit_atomic32()
3781 BPF_ALU64_IMM(BPF_MOV, R4, 4),
3791 BPF_ALU64_IMM(BPF_ADD, R4, 20),
3801 BPF_ALU64_IMM(BPF_SUB, R4, 10),
3811 BPF_ALU64_REG(BPF_ADD, R0, R4),
3823 BPF_ALU64_REG(BPF_ADD, R1, R4),
3835 BPF_ALU64_REG(BPF_ADD, R2, R4),
3847 BPF_ALU64_REG(BPF_ADD, R3, R4),
3855 BPF_ALU64_REG(BPF_ADD, R4, R0),
3856 BPF_ALU64_REG(BPF_ADD, R4, R1),
3857 BPF_ALU64_REG(BPF_ADD, R4, R2),
3858 BPF_ALU64_REG(BPF_ADD, R4, R3),
3859 BPF_ALU64_REG(BPF_ADD, R4, R4),
3860 BPF_ALU64_REG(BPF_ADD, R4, R5),
3861 BPF_ALU64_REG(BPF_ADD, R4, R6),
3862 BPF_ALU64_REG(BPF_ADD, R4, R7),
3863 BPF_ALU64_REG(BPF_ADD, R4, R8),
3864 BPF_ALU64_REG(BPF_ADD, R4, R9), /* R4 == 12177 */
3865 BPF_JMP_IMM(BPF_JEQ, R4, 12177, 1),
3871 BPF_ALU64_REG(BPF_ADD, R5, R4),
3883 BPF_ALU64_REG(BPF_ADD, R6, R4),
3895 BPF_ALU64_REG(BPF_ADD, R7, R4),
3907 BPF_ALU64_REG(BPF_ADD, R8, R4),
3919 BPF_ALU64_REG(BPF_ADD, R9, R4),
3939 BPF_ALU32_IMM(BPF_MOV, R4, 4),
3948 BPF_ALU64_IMM(BPF_ADD, R4, 10),
3957 BPF_ALU32_REG(BPF_ADD, R0, R4),
3969 BPF_ALU32_REG(BPF_ADD, R1, R4),
3981 BPF_ALU32_REG(BPF_ADD, R2, R4),
3993 BPF_ALU32_REG(BPF_ADD, R3, R4),
4001 BPF_ALU32_REG(BPF_ADD, R4, R0),
4002 BPF_ALU32_REG(BPF_ADD, R4, R1),
4003 BPF_ALU32_REG(BPF_ADD, R4, R2),
4004 BPF_ALU32_REG(BPF_ADD, R4, R3),
4005 BPF_ALU32_REG(BPF_ADD, R4, R4),
4006 BPF_ALU32_REG(BPF_ADD, R4, R5),
4007 BPF_ALU32_REG(BPF_ADD, R4, R6),
4008 BPF_ALU32_REG(BPF_ADD, R4, R7),
4009 BPF_ALU32_REG(BPF_ADD, R4, R8),
4010 BPF_ALU32_REG(BPF_ADD, R4, R9), /* R4 == 12177 */
4011 BPF_JMP_IMM(BPF_JEQ, R4, 12177, 1),
4017 BPF_ALU32_REG(BPF_ADD, R5, R4),
4029 BPF_ALU32_REG(BPF_ADD, R6, R4),
4041 BPF_ALU32_REG(BPF_ADD, R7, R4),
4053 BPF_ALU32_REG(BPF_ADD, R8, R4),
4065 BPF_ALU32_REG(BPF_ADD, R9, R4),
4085 BPF_ALU64_IMM(BPF_MOV, R4, 4),
4095 BPF_ALU64_REG(BPF_SUB, R0, R4),
4107 BPF_ALU64_REG(BPF_SUB, R1, R4),
4117 BPF_ALU64_REG(BPF_SUB, R2, R4),
4127 BPF_ALU64_REG(BPF_SUB, R3, R4),
4134 BPF_ALU64_REG(BPF_SUB, R4, R0),
4135 BPF_ALU64_REG(BPF_SUB, R4, R1),
4136 BPF_ALU64_REG(BPF_SUB, R4, R2),
4137 BPF_ALU64_REG(BPF_SUB, R4, R3),
4138 BPF_ALU64_REG(BPF_SUB, R4, R5),
4139 BPF_ALU64_REG(BPF_SUB, R4, R6),
4140 BPF_ALU64_REG(BPF_SUB, R4, R7),
4141 BPF_ALU64_REG(BPF_SUB, R4, R8),
4142 BPF_ALU64_REG(BPF_SUB, R4, R9),
4143 BPF_ALU64_IMM(BPF_SUB, R4, 10),
4148 BPF_ALU64_REG(BPF_SUB, R5, R4),
4158 BPF_ALU64_REG(BPF_SUB, R6, R4),
4168 BPF_ALU64_REG(BPF_SUB, R7, R4),
4178 BPF_ALU64_REG(BPF_SUB, R8, R4),
4188 BPF_ALU64_REG(BPF_SUB, R9, R4),
4199 BPF_ALU64_REG(BPF_SUB, R0, R4),
4231 BPF_ALU64_REG(BPF_XOR, R4, R4),
4234 BPF_JMP_REG(BPF_JEQ, R3, R4, 1),
4236 BPF_ALU64_REG(BPF_SUB, R4, R4),
4240 BPF_JMP_REG(BPF_JEQ, R5, R4, 1),
4284 BPF_ALU64_IMM(BPF_MOV, R4, 4),
4294 BPF_ALU64_REG(BPF_MUL, R0, R4),
4306 BPF_ALU64_REG(BPF_MUL, R1, R4),
4324 BPF_ALU64_REG(BPF_MUL, R2, R4),
4346 BPF_MOV64_REG(R4, R3),
4347 BPF_MOV64_REG(R5, R4),
4356 BPF_ALU64_IMM(BPF_MOV, R4, 0),
4366 BPF_ALU64_REG(BPF_ADD, R0, R4),
4386 BPF_MOV64_REG(R4, R3),
4387 BPF_MOV64_REG(R5, R4),
4396 BPF_ALU32_IMM(BPF_MOV, R4, 0),
4406 BPF_ALU64_REG(BPF_ADD, R0, R4),
4426 BPF_MOV64_REG(R4, R3),
4427 BPF_MOV64_REG(R5, R4),
4436 BPF_LD_IMM64(R4, 0x0LL),
4446 BPF_ALU64_REG(BPF_ADD, R0, R4),
4489 BPF_MOV32_IMM(R4, -1234),
4490 BPF_JMP_REG(BPF_JEQ, R0, R4, 1),
4492 BPF_ALU64_IMM(BPF_AND, R4, 63),
4493 BPF_ALU64_REG(BPF_LSH, R0, R4), /* R0 <= 46 */
4499 BPF_ALU64_REG(BPF_LSH, R4, R2), /* R4 = 46 << 1 */
4500 BPF_JMP_IMM(BPF_JEQ, R4, 92, 1),
4502 BPF_MOV64_IMM(R4, 4),
4503 BPF_ALU64_REG(BPF_LSH, R4, R4), /* R4 = 4 << 4 */
4504 BPF_JMP_IMM(BPF_JEQ, R4, 64, 1),
4506 BPF_MOV64_IMM(R4, 5),
4507 BPF_ALU32_REG(BPF_LSH, R4, R4), /* R4 = 5 << 5 */
4508 BPF_JMP_IMM(BPF_JEQ, R4, 160, 1),
5879 BPF_LD_IMM64(R4, 0xffffffffffffffffLL),
5881 BPF_ALU64_REG(BPF_DIV, R2, R4),
11152 BPF_ALU32_IMM(BPF_MOV, R4, 0xfefb0000),
11156 BPF_JMP_REG(BPF_JNE, R2, R4, 1),
11296 BPF_ALU64_IMM(BPF_MOV, R4, R4), \
11308 BPF_JMP_IMM(BPF_JNE, R4, R4, 6), \
11422 BPF_ALU64_IMM(BPF_MOV, R4, 4), \
11436 BPF_JMP_IMM(BPF_JNE, R4, 4, 6), \