Lines Matching refs:power
136 Defines the total number of nodes in the power domain topology
137 tree at all the power domain levels used by the platform.
139 data structures to represent power domain topology.
143 Defines the maximum power domain level that the power management operations
144 should apply to. More often, but not always, the power domain level
146 to know the highest power domain level that it should consider for power
149 number of CPUs and it reports the maximum power domain level as 1.
153 Defines the local power state corresponding to the deepest power down
154 possible at every power domain level in the platform. The local power
157 value to initialize the local power states of the power domain nodes and
158 to specify the requested power state for a PSCI_CPU_OFF call.
162 Defines the local power state corresponding to the deepest retention state
163 possible at every power domain level in the platform. This macro should be
165 PSCI implementation to distinguish between retention and power down local
166 power states within PSCI_CPU_SUSPEND call.
170 Defines the maximum number of local power states per power domain level
172 most platforms just support a maximum of two local power states at each
173 power domain level (power-down and retention). If the platform needs to
174 account for more local power states, then it must redefine this macro.
821 This function plays a crucial role in the power domain topology framework in
836 be invoked by BL31 after the power domain topology is initialized and can
838 represents the power domain topology and how this relates to the linear CPU
1042 present) during a cluster power down sequence. The default weak implementation
1043 doesn't do anything. Since this API is called during the power down sequence,
1866 - Initialize the power controller device.
1869 power controller device.
2111 *power domain*. A *power domain* is a CPU or a logical group of CPUs which
2112 share some state on which power management operations can be performed as
2115 *power domains* are arranged in a hierarchical tree structure and each
2116 *power domain* can be identified in a system by the cpu index of any CPU that
2117 is part of that domain and a *power domain level*. A processing element (for
2118 example, a CPU) is at level 0. If the *power domain* node above a CPU is a
2121 example, the system). More details on the power domain topology and its
2125 power management operations required for the PSCI implementation to function
2128 power management operations on the power domains. For example, the target
2130 handler (if present) is called for the CPU power domain.
2132 The ``power-state`` parameter of a PSCI ``CPU_SUSPEND`` call can be used to
2133 describe composite power states specific to a platform. The PSCI implementation
2134 defines a generic representation of the power-state parameter, which is an
2135 array of local power states where each index corresponds to a power domain
2136 level. Each entry contains the local power state the power domain at that power
2138 convert the power-state parameter (possibly encoding a composite power state)
2152 accounting before entering a low power state. The ``pwr_domain_state`` field of
2155 index 0 (CPU power level) in the ``pwr_domain_state`` array indicates a power down
2170 accounting after exiting from a low power state. The ``pwr_domain_state`` field
2173 index 0 (CPU power level) in the ``pwr_domain_state`` array indicates a power down
2187 This is an optional interface that is is invoked after resuming from a low power
2188 state and provides the time spent resident in that low power state by the power
2189 domain at a particular power domain level. When a CPU wakes up from suspend,
2190 all its parent power domain levels are also woken up. The generic PSCI code
2191 invokes this function for each parent power domain that is resumed and it
2193 argument) describes the low power state that the power domain has resumed from.
2194 The current CPU is the first CPU in the power domain to resume from the low
2195 power state and the ``last_cpu_idx`` (third parameter) is the index of the last
2196 CPU in the power domain to suspend and may be needed to calculate the residency
2197 for that power domain.
2208 state coordination during a power management operation. The function is passed
2209 a pointer to an array of platform specific local power state ``states`` (second
2210 argument) which contains the requested power state for each CPU at a particular
2211 power domain level ``lvl`` (first argument) within the power domain. The function
2213 a coordinated target power state by the comparing all the requested power
2214 states. The target power state should not be deeper than any of the requested
2215 power states.
2219 of the power state i.e. for two power states X & Y, if X < Y
2220 then X represents a shallower power state than Y. As a result, the
2221 coordinated target local power state for a power domain will be the minimum
2222 of the requested local power state values.
2232 This function returns a pointer to the byte array containing the power domain
2236 statically or dynamically, to initialize the power domain topology tree. In case
2257 platform-specific psci power management actions by populating the passed
2276 the suspend state type specified in the ``power-state`` parameter should be
2277 STANDBY and the target power domain level specified should be the CPU. The
2278 handler should put the CPU into a low power retention state (usually by
2285 Perform the platform specific actions to power on a CPU, specified
2292 Perform the platform specific actions to prepare to power off the calling CPU
2293 and its higher parent power domain levels as indicated by the ``target_state``
2296 The ``target_state`` encodes the platform coordinated target local power states
2297 for the CPU power domain and its parent power domain levels. The handler
2298 needs to perform power management operation corresponding to the local state
2299 at each power level.
2301 For this handler, the local power state for the CPU power domain will be a
2302 power down state where as it could be either power down, retention or run state
2303 for the higher power domain levels depending on the result of state
2312 calls this function when suspending to a power down state, and it guarantees
2317 power down state and it is safe to perform some or all of the platform
2327 CPU and its higher parent power domain levels as indicated by the
2333 target local power states for the CPU power domain and its parent
2334 power domain levels. The handler needs to perform power management operation
2335 corresponding to the local state at each power level. The generic code
2338 The difference between turning a power domain off versus suspending it is that
2339 in the former case, the power domain is expected to re-initialize its state
2341 case, the power domain is expected to save enough state so that it can resume
2345 When suspending a core, the platform can also choose to power off the GICv3
2374 operation and it encodes the platform coordinated target local power states for
2375 the CPU power domain and its parent power domain levels. This function must
2379 implementation invokes ``psci_power_down_wfi()`` for power down.
2390 The ``target_state`` (first argument) is the prior state of the power domains
2391 immediately before the CPU was turned on. It indicates which power domains
2393 low power states. The generic code expects the handler to succeed.
2445 populate it in ``req_state`` (second argument) array as power domain level
2463 call to get the ``req_state`` parameter from platform which encodes the power
2476 supports more than two local power states at each power domain level, that is
2478 local power states.
2484 (second argument) parameter of the PSCI API corresponding to a target power
2485 domain. The target power domain is identified by using both ``MPIDR`` (first
2486 argument) and the power domain level encoded in ``power_state``. The power domain
2491 targeted power domain. If the ``power_state`` is invalid for the targeted power
2497 power state encoding for ``power_state`` parameter of PSCI_STAT_COUNT/RESIDENCY
2504 the power state of a node (identified by the first parameter, the ``MPIDR``) in
2505 the power domain topology (identified by the second parameter, ``power_level``),
2506 as retrieved from a power controller or equivalent component on the platform.