Lines Matching refs:priv
2460 int compute_ddr_phy(struct ddr_info *priv) in compute_ddr_phy() argument
2462 const unsigned long clk = priv->clk; in compute_ddr_phy()
2463 const struct memctl_opt *popts = &priv->opt; in compute_ddr_phy()
2464 const struct ddr_conf *conf = &priv->conf; in compute_ddr_phy()
2465 const struct dimm_params *dimm_param = &priv->dimm; in compute_ddr_phy()
2466 struct ddr_cfg_regs *regs = &priv->ddr_reg; in compute_ddr_phy()
2567 ret = c_init_phy_config(priv->phy, priv->ip_rev, &input, &msg_1d); in compute_ddr_phy()
2573 debug("Warm boot flag value %0x\n", priv->warm_boot_flag); in compute_ddr_phy()
2574 if (priv->warm_boot_flag == DDR_WARM_BOOT) { in compute_ddr_phy()
2577 ret = restore_phy_training_values(priv->phy, in compute_ddr_phy()
2579 priv->num_ctlrs, in compute_ddr_phy()
2589 ret = load_fw(priv->phy, &input, 0, &msg_1d, in compute_ddr_phy()
2590 sizeof(struct ddr4u1d), priv->phy_gen2_fw_img_buf, in compute_ddr_phy()
2591 priv->img_loadr, priv->warm_boot_flag); in compute_ddr_phy()
2598 ret = g_exec_fw(priv->phy, 0, &input); in compute_ddr_phy()
2609 get_cdd_val(priv->phy, rank, input.basic.frequency, in compute_ddr_phy()
2619 ret = load_fw(priv->phy, &input, 1, &msg_2d, in compute_ddr_phy()
2621 priv->phy_gen2_fw_img_buf, in compute_ddr_phy()
2622 priv->img_loadr, in compute_ddr_phy()
2623 priv->warm_boot_flag); in compute_ddr_phy()
2628 ret = g_exec_fw(priv->phy, 1, &input); in compute_ddr_phy()
2636 if (priv->warm_boot_flag != DDR_WRM_BOOT_NT_SUPPORTED && in compute_ddr_phy()
2640 ret = save_phy_training_values(priv->phy, in compute_ddr_phy()
2642 priv->num_ctlrs, in compute_ddr_phy()
2654 i_load_pie(priv->phy, &input, &msg_1d); in compute_ddr_phy()