Lines Matching refs:n
75 #define SYS_REG_ENC_ROW_3_4(n, ch) ((n) << (30 + (ch))) argument
76 #define SYS_REG_DEC_ROW_3_4(n, ch) (((n) >> (30 + (ch))) & 0x1) argument
78 #define SYS_REG_DEC_CHINFO(n, ch) (((n) >> (28 + (ch))) & 0x1) argument
79 #define SYS_REG_ENC_DDRTYPE(n) ((n) << 13) argument
80 #define SYS_REG_DEC_DDRTYPE(n) (((n) >> 13) & 0x7) argument
81 #define SYS_REG_ENC_NUM_CH(n) (((n) - 1) << 12) argument
82 #define SYS_REG_DEC_NUM_CH(n) (1 + (((n) >> 12) & 0x1)) argument
83 #define SYS_REG_ENC_RANK(n, ch) (((n) - 1) << (11 + (ch) * 16)) argument
84 #define SYS_REG_DEC_RANK(n, ch) (1 + (((n) >> (11 + (ch) * 16)) & 0x1)) argument
85 #define SYS_REG_ENC_COL(n, ch) (((n) - 9) << (9 + (ch) * 16)) argument
86 #define SYS_REG_DEC_COL(n, ch) (9 + (((n) >> (9 + (ch) * 16)) & 0x3)) argument
87 #define SYS_REG_ENC_BK(n, ch) (((n) == 3 ? 0 : 1) << (8 + (ch) * 16)) argument
88 #define SYS_REG_DEC_BK(n, ch) (3 - (((n) >> (8 + (ch) * 16)) & 0x1)) argument
89 #define SYS_REG_ENC_CS0_ROW(n, ch) (((n) - 13) << (6 + (ch) * 16)) argument
90 #define SYS_REG_DEC_CS0_ROW(n, ch) (13 + (((n) >> (6 + (ch) * 16)) & 0x3)) argument
91 #define SYS_REG_ENC_CS1_ROW(n, ch) (((n) - 13) << (4 + (ch) * 16)) argument
92 #define SYS_REG_DEC_CS1_ROW(n, ch) (13 + (((n) >> (4 + (ch) * 16)) & 0x3)) argument
93 #define SYS_REG_ENC_BW(n, ch) ((2 >> (n)) << (2 + (ch) * 16)) argument
94 #define SYS_REG_DEC_BW(n, ch) (2 >> (((n) >> (2 + (ch) * 16)) & 0x3)) argument
95 #define SYS_REG_ENC_DBW(n, ch) ((2 >> (n)) << (0 + (ch) * 16)) argument
96 #define SYS_REG_DEC_DBW(n, ch) (2 >> (((n) >> (0 + (ch) * 16)) & 0x3)) argument
97 #define DDR_STRIDE(n) mmio_write_32(SGRF_BASE + SGRF_SOC_CON3_7(4), \ argument
98 (0x1f<<(10+16))|((n)<<10))