Lines Matching refs:interface_params
193 if (tm->interface_params[0]. in ddr3_tip_pad_inv()
205 if (tm->interface_params[0].as_bus_params[sphy]. in ddr3_tip_pad_inv()
289 data = (tm->interface_params[if_id].bus_width == in ddr3_tip_configure_cs()
295 mem_index = tm->interface_params[if_id].memory_size; in ddr3_tip_configure_cs()
354 enum mv_ddr_freq freq = tm->interface_params[0].memory_freq; in hws_ddr3_tip_init_controller()
376 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()
388 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()
476 (tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()
485 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()
514 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()
517 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()
556 ((tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()
593 timing = tm->interface_params[if_id].timing; in hws_ddr3_tip_init_controller()
687 data_value |= tm->interface_params[if_id].as_bus_params[bus_cnt]. in ddr3_tip_rev2_rank_control()
690 if (tm->interface_params[if_id].as_bus_params[bus_cnt]. in ddr3_tip_rev2_rank_control()
696 if ((tm->interface_params[if_id].as_bus_params[bus_cnt]. in ddr3_tip_rev2_rank_control()
698 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev2_rank_control()
703 if ((tm->interface_params[if_id].as_bus_params[bus_cnt]. in ddr3_tip_rev2_rank_control()
705 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev2_rank_control()
710 if ((tm->interface_params[if_id].as_bus_params[bus_cnt]. in ddr3_tip_rev2_rank_control()
712 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev2_rank_control()
717 if ((tm->interface_params[if_id].as_bus_params[bus_cnt]. in ddr3_tip_rev2_rank_control()
719 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev2_rank_control()
741 if ((tm->interface_params[if_id]. in ddr3_tip_rev3_rank_control()
743 tm->interface_params[if_id]. in ddr3_tip_rev3_rank_control()
745 (tm->interface_params[if_id]. in ddr3_tip_rev3_rank_control()
747 tm->interface_params[if_id]. in ddr3_tip_rev3_rank_control()
754 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev3_rank_control()
756 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev3_rank_control()
1218 enum mv_ddr_timing timing = tm->interface_params[if_id].timing; in ddr3_tip_freq_set()
1256 tm->interface_params[if_id].speed_bin_index; in ddr3_tip_freq_set()
1257 if (tm->interface_params[if_id].memory_freq == in ddr3_tip_freq_set()
1260 tm->interface_params[if_id].cas_l; in ddr3_tip_freq_set()
1262 tm->interface_params[if_id].cas_wl; in ddr3_tip_freq_set()
1296 tm->interface_params[if_id]. in ddr3_tip_freq_set()
1638 speed_bin_index = tm->interface_params[if_id].speed_bin_index; in ddr3_tip_set_timing()
1639 memory_size = tm->interface_params[if_id].memory_size; in ddr3_tip_set_timing()
1640 page_size = mv_ddr_page_size_get(tm->interface_params[if_id].bus_width, memory_size); in ddr3_tip_set_timing()
1645 t_refi = (tm->interface_params[if_id].interface_temp == MV_DDR_TEMP_HIGH) ? TREFI_HIGH : TREFI_LOW; in ddr3_tip_set_timing()
1781 tm->interface_params[if_id]. in ddr3_tip_write_cs_result()
2017 enum mv_ddr_freq freq = tm->interface_params[0].memory_freq; in ddr3_tip_ddr3_training_main_flow()
2293 interface_params[first_active_if]. in ddr3_tip_ddr3_training_main_flow()
2297 tm->interface_params[first_active_if]. in ddr3_tip_ddr3_training_main_flow()
2343 interface_params[first_active_if]. in ddr3_tip_ddr3_training_main_flow()
2359 ret = mv_ddr_rl_dqs_burst(0, 0, tm->interface_params[0].memory_freq); in ddr3_tip_ddr3_training_main_flow()
2571 tm->interface_params[if_id]. in ddr3_tip_enable_init_sequence()
2666 return (tm->interface_params[if_id].bus_width == in hws_ddr3_get_device_width()
2674 if (tm->interface_params[if_id].memory_size >= in hws_ddr3_get_device_size()
2678 tm->interface_params[if_id].memory_size)); in hws_ddr3_get_device_size()
2681 return 1 << tm->interface_params[if_id].memory_size; in hws_ddr3_get_device_size()
2735 physical_mem_size = mem_size[tm->interface_params[0].memory_size]; in hws_ddr3_cs_base_adr_calc()