Lines Matching refs:lmc_wr
287 lmc_wr(priv, CVMX_LMCX_DLL_CTL2(if_num), dll_ctl2.u64); in cn78xx_lmc_dreset_init()
310 lmc_wr(priv, CVMX_LMCX_DLL_CTL2(if_num), dll_ctl2.u64); in cn78xx_lmc_dreset_init()
333 lmc_wr(priv, CVMX_LMCX_DLL_CTL2(if_num), dll_ctl2.u64); in cn78xx_lmc_dreset_init()
355 lmc_wr(priv, CVMX_LMCX_DLL_CTL2(if_num), dll_ctl2.u64); in cn78xx_lmc_dreset_init()
388 lmc_wr(priv, CVMX_LMCX_RESET_CTL(i), in initialize_ddr_clock()
549 lmc_wr(priv, CVMX_LMCX_DLL_CTL2(i), dll_ctl2.u64); in initialize_ddr_clock()
612 lmc_wr(priv, CVMX_LMCX_DDR_PLL_CTL(0), ddr_pll_ctl.u64); in initialize_ddr_clock()
666 lmc_wr(priv, CVMX_LMCX_DDR_PLL_CTL(1), ddr_pll_ctl.u64); in initialize_ddr_clock()
692 lmc_wr(priv, CVMX_LMCX_RESET_CTL(i), reset_ctl.u64); in initialize_ddr_clock()
854 lmc_wr(priv, CVMX_LMCX_DDR_PLL_CTL(i), ddr_pll_ctl.u64); in initialize_ddr_clock()
890 lmc_wr(priv, CVMX_LMCX_DDR_PLL_CTL(i), ddr_pll_ctl.u64); in initialize_ddr_clock()
939 lmc_wr(priv, CVMX_LMCX_DDR_PLL_CTL(i), ddr_pll_ctl.u64); in initialize_ddr_clock()
951 lmc_wr(priv, CVMX_LMCX_DDR_PLL_CTL(i), ddr_pll_ctl.u64); in initialize_ddr_clock()
1043 lmc_wr(priv, CVMX_LMCX_COMP_CTL2(i), comp_ctl2.u64); in initialize_ddr_clock()
1067 lmc_wr(priv, CVMX_LMCX_DDR_PLL_CTL(i), ddr_pll_ctl.u64); in initialize_ddr_clock()
1099 lmc_wr(priv, CVMX_LMCX_DLL_CTL2(i), dll_ctl2.u64); in initialize_ddr_clock()
1118 lmc_wr(priv, CVMX_LMCX_DDR_PLL_CTL(i), ddr_pll_ctl.u64); in initialize_ddr_clock()
1236 lmc_wr(priv, in initialize_ddr_clock()
1256 lmc_wr(priv, in initialize_ddr_clock()
1279 lmc_wr(priv, CVMX_LMCX_DLL_CTL3(2), ddr_dll_ctl3.u64); in initialize_ddr_clock()
1289 lmc_wr(priv, CVMX_LMCX_DLL_CTL3(3), ddr_dll_ctl3.u64); in initialize_ddr_clock()
1311 lmc_wr(priv, CVMX_LMCX_DLL_CTL3(2), ddr_dll_ctl3.u64); in initialize_ddr_clock()
1327 lmc_wr(priv, CVMX_LMCX_DLL_CTL3(3), ddr_dll_ctl3.u64); in initialize_ddr_clock()
1368 lmc_wr(priv, CVMX_LMCX_DLL_CTL3(0), ddr_dll_ctl3.u64); in initialize_ddr_clock()
1371 lmc_wr(priv, CVMX_LMCX_DLL_CTL3(1), ddr_dll_ctl3.u64); in initialize_ddr_clock()
1380 lmc_wr(priv, CVMX_LMCX_DLL_CTL3(i), ddr_dll_ctl3.u64); in initialize_ddr_clock()
1412 lmc_wr(priv, CVMX_LMCX_PHY_CTL(i), in initialize_ddr_clock()
1445 lmc_wr(priv, CVMX_LMCX_MEM_CFG0(if_num), mem_cfg0.u64); in initialize_ddr_clock()
1544 lmc_wr(priv, CVMX_LMCX_RLEVEL_CTL(if_num), rlevel_ctl.u64); in lmc_ddr3_rl_dbg_read()
1558 lmc_wr(priv, CVMX_LMCX_WLEVEL_DBG(if_num), wlevel_dbg.u64); in lmc_ddr3_wl_dbg_read()
1992 lmc_wr(priv, CVMX_LMCX_CONTROL(if_num), lmc_control.u64); in oct2_ddr3_seq()
2006 lmc_wr(priv, CVMX_LMCX_CONFIG(if_num), lmc_config.u64); in oct2_ddr3_seq()
2011 lmc_wr(priv, CVMX_LMCX_CONTROL(if_num), lmc_control.u64); in oct2_ddr3_seq()
2037 lmc_wr(priv, CVMX_LMCX_DLL_CTL3(if_num), ddr_dll_ctl3.u64); in change_dll_offset_enable()
2058 lmc_wr(priv, CVMX_LMCX_DLL_CTL3(if_num), ddr_dll_ctl3.u64); in load_dll_offset()
2066 lmc_wr(priv, CVMX_LMCX_DLL_CTL3(if_num), ddr_dll_ctl3.u64); in load_dll_offset()
2070 lmc_wr(priv, CVMX_LMCX_DLL_CTL3(if_num), ddr_dll_ctl3.u64); in load_dll_offset()
2437 lmc_wr(priv, CVMX_LMCX_DDR_PLL_CTL(0), in octeon_ddr_initialize()
2448 lmc_wr(priv, CVMX_LMCX_DDR_PLL_CTL(0), in octeon_ddr_initialize()