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:term:`SVE`”h]”h)”}”(hŒ:term:`SVE`”h]”h)”}”(hj h]”hŒSVE”…””}”(hhh!j ubah"}”(h$]”h&]”(h(Œstd”Œstd-term”eh+]”h-]”h/]”uh1hh!j ubah"}”(h$]”h&]”h+]”h-]”h/]”Œrefdoc”h9Œ refdomain”j Œreftype”Œterm”Œrefexplicit”‰Œrefwarn”ˆh?ŒSVE”uh1hhAhBhCK6h!j ubah"}”(h$]”h&]”h+]”ŒSVE”ah-]”h/]”uh1h hAhBhCK6h!hhhubh)”}”(hŒ.. |TBB| replace:: :term:`TBB`”h]”h)”}”(hŒ:term:`TBB`”h]”h)”}”(hj8 h]”hŒTBB”…””}”(hhh!j: ubah"}”(h$]”h&]”(h(Œstd”Œstd-term”eh+]”h-]”h/]”uh1hh!j6 ubah"}”(h$]”h&]”h+]”h-]”h/]”Œrefdoc”h9Œ refdomain”jD Œreftype”Œterm”Œrefexplicit”‰Œrefwarn”ˆh?ŒTBB”uh1hhAhBhCK7h!j2 ubah"}”(h$]”h&]”h+]”ŒTBB”ah-]”h/]”uh1h hAhBhCK7h!hhhubh)”}”(hŒ .. |TBBR| replace:: :term:`TBBR`”h]”h)”}”(hŒ:term:`TBBR`”h]”h)”}”(hjc h]”hŒTBBR”…””}”(hhh!je ubah"}”(h$]”h&]”(h(Œstd”Œstd-term”eh+]”h-]”h/]”uh1hh!ja ubah"}”(h$]”h&]”h+]”h-]”h/]”Œrefdoc”h9Œ refdomain”jo Œreftype”Œterm”Œrefexplicit”‰Œrefwarn”ˆh?ŒTBBR”uh1hhAhBhCK8h!j] ubah"}”(h$]”h&]”h+]”ŒTBBR”ah-]”h/]”uh1h hAhBhCK8h!hhhubh)”}”(hŒ.. |TEE| replace:: :term:`TEE`”h]”h)”}”(hŒ:term:`TEE`”h]”h)”}”(hjŽ h]”hŒTEE”…””}”(hhh!j ubah"}”(h$]”h&]”(h(Œstd”Œstd-term”eh+]”h-]”h/]”uh1hh!jŒ ubah"}”(h$]”h&]”h+]”h-]”h/]”Œrefdoc”h9Œ refdomain”jš Œreftype”Œterm”Œrefexplicit”‰Œrefwarn”ˆh?ŒTEE”uh1hhAhBhCK9h!jˆ ubah"}”(h$]”h&]”h+]”ŒTEE”ah-]”h/]”uh1h hAhBhCK9h!hhhubh)”}”(hŒ .. |TF-A| replace:: :term:`TF-A`”h]”h)”}”(hŒ:term:`TF-A`”h]”h)”}”(hj¹ h]”hŒTF-A”…””}”(hhh!j» ubah"}”(h$]”h&]”(h(Œstd”Œstd-term”eh+]”h-]”h/]”uh1hh!j· ubah"}”(h$]”h&]”h+]”h-]”h/]”Œrefdoc”h9Œ refdomain”jÅ Œreftype”Œterm”Œrefexplicit”‰Œrefwarn”ˆh?ŒTF-A”uh1hhAhBhCK:h!j³ ubah"}”(h$]”h&]”h+]”ŒTF-A”ah-]”h/]”uh1h hAhBhCK:h!hhhubh)”}”(hŒ .. |TF-M| replace:: :term:`TF-M`”h]”h)”}”(hŒ:term:`TF-M`”h]”h)”}”(hjä h]”hŒTF-M”…””}”(hhh!jæ ubah"}”(h$]”h&]”(h(Œstd”Œstd-term”eh+]”h-]”h/]”uh1hh!jâ ubah"}”(h$]”h&]”h+]”h-]”h/]”Œrefdoc”h9Œ refdomain”jð Œreftype”Œterm”Œrefexplicit”‰Œrefwarn”ˆh?ŒTF-M”uh1hhAhBhCK;h!jÞ ubah"}”(h$]”h&]”h+]”ŒTF-M”ah-]”h/]”uh1h hAhBhCK;h!hhhubh)”}”(hŒ.. |TLB| replace:: :term:`TLB`”h]”h)”}”(hŒ:term:`TLB`”h]”h)”}”(hj h]”hŒTLB”…””}”(hhh!j ubah"}”(h$]”h&]”(h(Œstd”Œstd-term”eh+]”h-]”h/]”uh1hh!j ubah"}”(h$]”h&]”h+]”h-]”h/]”Œrefdoc”h9Œ refdomain”j Œreftype”Œterm”Œrefexplicit”‰Œrefwarn”ˆh?ŒTLB”uh1hhAhBhCKh!j_ ubah"}”(h$]”h&]”h+]”ŒTRNG”ah-]”h/]”uh1h hAhBhCK>h!hhhubh)”}”(hŒ.. |TSP| replace:: :term:`TSP`”h]”h)”}”(hŒ:term:`TSP`”h]”h)”}”(hj h]”hŒTSP”…””}”(hhh!j’ ubah"}”(h$]”h&]”(h(Œstd”Œstd-term”eh+]”h-]”h/]”uh1hh!jŽ ubah"}”(h$]”h&]”h+]”h-]”h/]”Œrefdoc”h9Œ refdomain”jœ Œreftype”Œterm”Œrefexplicit”‰Œrefwarn”ˆh?ŒTSP”uh1hhAhBhCK?h!jŠ ubah"}”(h$]”h&]”h+]”ŒTSP”ah-]”h/]”uh1h hAhBhCK?h!hhhubh)”}”(hŒ.. |TZC| replace:: :term:`TZC`”h]”h)”}”(hŒ:term:`TZC`”h]”h)”}”(hj» h]”hŒTZC”…””}”(hhh!j½ ubah"}”(h$]”h&]”(h(Œstd”Œstd-term”eh+]”h-]”h/]”uh1hh!j¹ ubah"}”(h$]”h&]”h+]”h-]”h/]”Œrefdoc”h9Œ refdomain”jÇ Œreftype”Œterm”Œrefexplicit”‰Œrefwarn”ˆh?ŒTZC”uh1hhAhBhCK@h!jµ ubah"}”(h$]”h&]”h+]”ŒTZC”ah-]”h/]”uh1h hAhBhCK@h!hhhubh)”}”(hŒ".. |UBSAN| replace:: :term:`UBSAN`”h]”h)”}”(hŒ :term:`UBSAN`”h]”h)”}”(hjæ h]”hŒUBSAN”…””}”(hhh!jè ubah"}”(h$]”h&]”(h(Œstd”Œstd-term”eh+]”h-]”h/]”uh1hh!jä ubah"}”(h$]”h&]”h+]”h-]”h/]”Œrefdoc”h9Œ refdomain”jò Œreftype”Œterm”Œrefexplicit”‰Œrefwarn”ˆh?ŒUBSAN”uh1hhAhBhCKAh!jà ubah"}”(h$]”h&]”h+]”ŒUBSAN”ah-]”h/]”uh1h hAhBhCKAh!hhhubh)”}”(hŒ .. |UEFI| replace:: :term:`UEFI`”h]”h)”}”(hŒ:term:`UEFI`”h]”h)”}”(hjh]”hŒUEFI”…””}”(hhh!jubah"}”(h$]”h&]”(h(Œstd”Œstd-term”eh+]”h-]”h/]”uh1hh!jubah"}”(h$]”h&]”h+]”h-]”h/]”Œrefdoc”h9Œ refdomain”jŒreftype”Œterm”Œrefexplicit”‰Œrefwarn”ˆh?ŒUEFI”uh1hhAhBhCKBh!jubah"}”(h$]”h&]”h+]”ŒUEFI”ah-]”h/]”uh1h hAhBhCKBh!hhhubh)”}”(hŒ .. |WDOG| replace:: :term:`WDOG`”h]”h)”}”(hŒ:term:`WDOG`”h]”h)”}”(hj<h]”hŒWDOG”…””}”(hhh!j>ubah"}”(h$]”h&]”(h(Œstd”Œstd-term”eh+]”h-]”h/]”uh1hh!j:ubah"}”(h$]”h&]”h+]”h-]”h/]”Œrefdoc”h9Œ refdomain”jHŒreftype”Œterm”Œrefexplicit”‰Œrefwarn”ˆh?ŒWDOG”uh1hhAhBhCKCh!j6ubah"}”(h$]”h&]”h+]”ŒWDOG”ah-]”h/]”uh1h hAhBhCKCh!hhhubh)”}”(hŒ!.. |XLAT| replace:: :term:`XLAT` ”h]”h)”}”(hŒ:term:`XLAT`”h]”h)”}”(hjgh]”hŒXLAT”…””}”(hhh!jiubah"}”(h$]”h&]”(h(Œstd”Œstd-term”eh+]”h-]”h/]”uh1hh!jeubah"}”(h$]”h&]”h+]”h-]”h/]”Œrefdoc”h9Œ refdomain”jsŒreftype”Œterm”Œrefexplicit”‰Œrefwarn”ˆh?ŒXLAT”uh1hhAhBhCKDh!jaubah"}”(h$]”h&]”h+]”ŒXLAT”ah-]”h/]”uh1h hAhBhCKDh!hhhubh Œsection”“”)”}”(hhh]”(h Œtitle”“”)”}”(hŒ:PSCI Library Integration guide for Armv8-A AArch32 systems”h]”hŒ:PSCI Library Integration guide for Armv8-A AArch32 systems”…””}”(hj•h!j“hhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j‘h!jŽhhhAŒk/home/test/workspace/code/optee_3.16/trusted-firmware-a/docs/getting_started/psci-lib-integration-guide.rst”hCKubh Œ paragraph”“”)”}”(hXöThis document describes the PSCI library interface with a focus on how to integrate with a suitable Trusted OS for an Armv8-A AArch32 system. The PSCI Library implements the PSCI Standard as described in `PSCI spec`_ and is meant to be integrated with EL3 Runtime Software which invokes the PSCI Library interface appropriately. **EL3 Runtime Software** refers to software executing at the highest secure privileged mode, which is EL3 in AArch64 or Secure SVC/ Monitor mode in AArch32, and provides runtime services to the non-secure world. The runtime service request is made via SMC (Secure Monitor Call) and the call must adhere to `SMCCC`_. In AArch32, EL3 Runtime Software may additionally include Trusted OS functionality. A minimal AArch32 Secure Payload, SP-MIN, is provided in Trusted Firmware-A (TF-A) to illustrate the usage and integration of the PSCI library. The description of PSCI library interface and its integration with EL3 Runtime Software in this document is targeted towards AArch32 systems.”h]”(hŒÌThis document describes the PSCI library interface with a focus on how to integrate with a suitable Trusted OS for an Armv8-A AArch32 system. The PSCI Library implements the PSCI Standard as described in ”…””}”(hŒÌThis document describes the PSCI library interface with a focus on how to integrate with a suitable Trusted OS for an Armv8-A AArch32 system. The PSCI Library implements the PSCI Standard as described in ”h!j¤hhhANhCNubh Œ reference”“”)”}”(hŒ`PSCI spec`_”h]”hŒ PSCI spec”…””}”(hŒ PSCI spec”h!j¯ubah"}”(h$]”h&]”h+]”h-]”h/]”Œname”Œ PSCI spec”Œrefuri”Œihttp://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interface.pdf”uh1jh!j¤Œresolved”KubhŒq and is meant to be integrated with EL3 Runtime Software which invokes the PSCI Library interface appropriately. ”…””}”(hŒq and is meant to be integrated with EL3 Runtime Software which invokes the PSCI Library interface appropriately. ”h!j¤hhhANhCNubh Œstrong”“”)”}”(hŒ**EL3 Runtime Software**”h]”hŒEL3 Runtime Software”…””}”(hhh!jÊubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jÈh!j¤ubhX refers to software executing at the highest secure privileged mode, which is EL3 in AArch64 or Secure SVC/ Monitor mode in AArch32, and provides runtime services to the non-secure world. The runtime service request is made via SMC (Secure Monitor Call) and the call must adhere to ”…””}”(hX refers to software executing at the highest secure privileged mode, which is EL3 in AArch64 or Secure SVC/ Monitor mode in AArch32, and provides runtime services to the non-secure world. The runtime service request is made via SMC (Secure Monitor Call) and the call must adhere to ”h!j¤hhhANhCNubj®)”}”(hŒ`SMCCC`_”h]”hŒSMCCC”…””}”(hŒSMCCC”h!jÝubah"}”(h$]”h&]”h+]”h-]”h/]”Œname”jåjÀŒ-https://developer.arm.com/docs/den0028/latest”uh1jh!j¤jÂKubhXs. In AArch32, EL3 Runtime Software may additionally include Trusted OS functionality. A minimal AArch32 Secure Payload, SP-MIN, is provided in Trusted Firmware-A (TF-A) to illustrate the usage and integration of the PSCI library. The description of PSCI library interface and its integration with EL3 Runtime Software in this document is targeted towards AArch32 systems.”…””}”(hXs. In AArch32, EL3 Runtime Software may additionally include Trusted OS functionality. A minimal AArch32 Secure Payload, SP-MIN, is provided in Trusted Firmware-A (TF-A) to illustrate the usage and integration of the PSCI library. The description of PSCI library interface and its integration with EL3 Runtime Software in this document is targeted towards AArch32 systems.”h!j¤hhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCKh!jŽhhubj)”}”(hhh]”(j’)”}”(hŒ:Generic call sequence for PSCI Library interface (AArch32)”h]”hŒ:Generic call sequence for PSCI Library interface (AArch32)”…””}”(hjþh!jühhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j‘h!jùhhhAj¡hCKubj£)”}”(hŒ‹The generic call sequence of PSCI Library interfaces (see `PSCI Library Interface`_) during cold boot in AArch32 system is described below:”h]”(hŒ:The generic call sequence of PSCI Library interfaces (see ”…””}”(hŒ:The generic call sequence of PSCI Library interfaces (see ”h!j hhhANhCNubj®)”}”(hŒ`PSCI Library Interface`_”h]”hŒPSCI Library Interface”…””}”(hŒPSCI Library Interface”h!jubah"}”(h$]”h&]”h+]”h-]”h/]”Œname”ŒPSCI Library Interface”Œrefid”Œpsci-library-interface”uh1jh!j jÂKubhŒ8) during cold boot in AArch32 system is described below:”…””}”(hŒ8) during cold boot in AArch32 system is described below:”h!j hhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCKh!jùhhubh Œenumerated_list”“”)”}”(hhh]”(h Œ list_item”“”)”}”(hŒÊAfter cold reset, the EL3 Runtime Software performs its cold boot initialization including the PSCI library pre-requisites mentioned in `PSCI Library Interface`_, and also the necessary platform setup. ”h]”j£)”}”(hŒÉAfter cold reset, the EL3 Runtime Software performs its cold boot initialization including the PSCI library pre-requisites mentioned in `PSCI Library Interface`_, and also the necessary platform setup.”h]”(hŒˆAfter cold reset, the EL3 Runtime Software performs its cold boot initialization including the PSCI library pre-requisites mentioned in ”…””}”(hŒˆAfter cold reset, the EL3 Runtime Software performs its cold boot initialization including the PSCI library pre-requisites mentioned in ”h!j<ubj®)”}”(hŒ`PSCI Library Interface`_”h]”hŒPSCI Library Interface”…””}”(hŒPSCI Library Interface”h!jEubah"}”(h$]”h&]”h+]”h-]”h/]”Œname”ŒPSCI Library Interface”j$j%uh1jh!j<jÂKubhŒ(, and also the necessary platform setup.”…””}”(hŒ(, and also the necessary platform setup.”h!j<ubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCKh!j8ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!j3hhhAj¡hCNubj7)”}”(hŒ'Call ``psci_setup()`` in Monitor mode. ”h]”j£)”}”(hŒ&Call ``psci_setup()`` in Monitor mode.”h]”(hŒCall ”…””}”(hŒCall ”h!jkubh Œliteral”“”)”}”(hŒ``psci_setup()``”h]”hŒpsci_setup()”…””}”(hhh!jvubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jkubhŒ in Monitor mode.”…””}”(hŒ in Monitor mode.”h!jkubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCKh!jgubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!j3hhhAj¡hCNubj7)”}”(hŒŽOptionally call ``psci_register_spd_pm_hook()`` to register callbacks to do bookkeeping for the EL3 Runtime Software during power management. ”h]”j£)”}”(hŒOptionally call ``psci_register_spd_pm_hook()`` to register callbacks to do bookkeeping for the EL3 Runtime Software during power management.”h]”(hŒOptionally call ”…””}”(hŒOptionally call ”h!j™ubju)”}”(hŒ``psci_register_spd_pm_hook()``”h]”hŒpsci_register_spd_pm_hook()”…””}”(hhh!j¢ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j™ubhŒ^ to register callbacks to do bookkeeping for the EL3 Runtime Software during power management.”…””}”(hŒ^ to register callbacks to do bookkeeping for the EL3 Runtime Software during power management.”h!j™ubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCK!h!j•ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!j3hhhAj¡hCNubj7)”}”(hŒVCall ``psci_prepare_next_non_secure_ctx()`` to initialize the non-secure CPU context. ”h]”j£)”}”(hŒUCall ``psci_prepare_next_non_secure_ctx()`` to initialize the non-secure CPU context.”h]”(hŒCall ”…””}”(hŒCall ”h!jÅubju)”}”(hŒ&``psci_prepare_next_non_secure_ctx()``”h]”hŒ"psci_prepare_next_non_secure_ctx()”…””}”(hhh!jÎubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jÅubhŒ* to initialize the non-secure CPU context.”…””}”(hŒ* to initialize the non-secure CPU context.”h!jÅubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCK$h!jÁubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!j3hhhAj¡hCNubj7)”}”(hXÊGet the non-secure ``cpu_context_t`` for the current CPU by calling ``cm_get_context()`` , then programming the registers in the non-secure context and exiting to non-secure world. If the EL3 Runtime Software needs additional configuration to be set for non-secure context, like routing FIQs to the secure world, the values of the registers can be modified prior to programming. See `PSCI CPU context management`_ for more details on CPU context management. ”h]”j£)”}”(hXÉGet the non-secure ``cpu_context_t`` for the current CPU by calling ``cm_get_context()`` , then programming the registers in the non-secure context and exiting to non-secure world. If the EL3 Runtime Software needs additional configuration to be set for non-secure context, like routing FIQs to the secure world, the values of the registers can be modified prior to programming. See `PSCI CPU context management`_ for more details on CPU context management.”h]”(hŒGet the non-secure ”…””}”(hŒGet the non-secure ”h!jñubju)”}”(hŒ``cpu_context_t``”h]”hŒ cpu_context_t”…””}”(hhh!júubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jñubhŒ for the current CPU by calling ”…””}”(hŒ for the current CPU by calling ”h!jñubju)”}”(hŒ``cm_get_context()``”h]”hŒcm_get_context()”…””}”(hhh!j ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jñubhX' , then programming the registers in the non-secure context and exiting to non-secure world. If the EL3 Runtime Software needs additional configuration to be set for non-secure context, like routing FIQs to the secure world, the values of the registers can be modified prior to programming. See ”…””}”(hX' , then programming the registers in the non-secure context and exiting to non-secure world. If the EL3 Runtime Software needs additional configuration to be set for non-secure context, like routing FIQs to the secure world, the values of the registers can be modified prior to programming. See ”h!jñubj®)”}”(hŒ`PSCI CPU context management`_”h]”hŒPSCI CPU context management”…””}”(hŒPSCI CPU context management”h!j ubah"}”(h$]”h&]”h+]”h-]”h/]”Œname”ŒPSCI CPU context management”j$Œpsci-cpu-context-management”uh1jh!jñjÂKubhŒ, for more details on CPU context management.”…””}”(hŒ, for more details on CPU context management.”h!jñubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCK'h!jíubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!j3hhhAj¡hCNubeh"}”(h$]”h&]”h+]”h-]”h/]”Œenumtype”Œarabic”Œprefix”hŒsuffix”Œ.”uh1j1h!jùhhhAj¡hCKubj£)”}”(hŒlThe generic call sequence of PSCI library interfaces during warm boot in AArch32 systems is described below:”h]”hŒlThe generic call sequence of PSCI library interfaces during warm boot in AArch32 systems is described below:”…””}”(hjP h!jN hhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCK/h!jùhhubj2)”}”(hhh]”(j7)”}”(hŒàAfter warm reset, the EL3 Runtime Software performs the necessary warm boot initialization including the PSCI library pre-requisites mentioned in `PSCI Library Interface`_ (Note that the Data cache **must not** be enabled). ”h]”j£)”}”(hŒßAfter warm reset, the EL3 Runtime Software performs the necessary warm boot initialization including the PSCI library pre-requisites mentioned in `PSCI Library Interface`_ (Note that the Data cache **must not** be enabled).”h]”(hŒ’After warm reset, the EL3 Runtime Software performs the necessary warm boot initialization including the PSCI library pre-requisites mentioned in ”…””}”(hŒ’After warm reset, the EL3 Runtime Software performs the necessary warm boot initialization including the PSCI library pre-requisites mentioned in ”h!jc ubj®)”}”(hŒ`PSCI Library Interface`_”h]”hŒPSCI Library Interface”…””}”(hŒPSCI Library Interface”h!jl ubah"}”(h$]”h&]”h+]”h-]”h/]”Œname”ŒPSCI Library Interface”j$j%uh1jh!jc jÂKubhŒ (Note that the Data cache ”…””}”(hŒ (Note that the Data cache ”h!jc ubjÉ)”}”(hŒ**must not**”h]”hŒmust not”…””}”(hhh!j‚ ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jÈh!jc ubhŒ be enabled).”…””}”(hŒ be enabled).”h!jc ubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCK2h!j_ ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!j\ hhhAj¡hCNubj7)”}”(hŒ}Call ``psci_warmboot_entrypoint()`` in Monitor mode. This interface initializes/restores the non-secure CPU context as well. ”h]”j£)”}”(hŒ|Call ``psci_warmboot_entrypoint()`` in Monitor mode. This interface initializes/restores the non-secure CPU context as well.”h]”(hŒCall ”…””}”(hŒCall ”h!j¥ ubju)”}”(hŒ``psci_warmboot_entrypoint()``”h]”hŒpsci_warmboot_entrypoint()”…””}”(hhh!j® ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j¥ ubhŒY in Monitor mode. This interface initializes/restores the non-secure CPU context as well.”…””}”(hŒY in Monitor mode. This interface initializes/restores the non-secure CPU context as well.”h!j¥ ubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCK7h!j¡ ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!j\ hhhAj¡hCNubj7)”}”(hŒ:Do step 5 of the cold boot call sequence described above. ”h]”j£)”}”(hŒ9Do step 5 of the cold boot call sequence described above.”h]”hŒ9Do step 5 of the cold boot call sequence described above.”…””}”(hjÓ h!jÑ ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCK:h!jÍ ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!j\ hhhAj¡hCNubeh"}”(h$]”h&]”h+]”h-]”h/]”jI jJ jK hjL jM uh1j1h!jùhhhAj¡hCK2ubj£)”}”(hŒvThe generic call sequence of PSCI library interfaces on receipt of a PSCI SMC on an AArch32 system is described below:”h]”hŒvThe generic call sequence of PSCI library interfaces on receipt of a PSCI SMC on an AArch32 system is described below:”…””}”(hjí h!jë hhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCKArgument : entry_point_info_t *next_image_info Return : void”h]”hŒ>Argument : entry_point_info_t *next_image_info Return : void”…””}”(hhh!jÀubah"}”(h$]”h&]”h+]”h-]”h/]”jžjŸuh1j‹hAj¡hCKÖh!j¯hhubj£)”}”(hXñAfter ``psci_setup()`` and prior to exit to the non-secure world, this function must be called by the EL3 Runtime Software to initialize the non-secure world context. The non-secure world entrypoint information ``next_image_info`` (first argument) will be used to determine the non-secure context. After this function returns, the EL3 Runtime Software must retrieve the ``cpu_context_t`` (using cm_get_context()) for the current CPU and program the registers prior to exit to the non-secure world.”h]”(hŒAfter ”…””}”(hŒAfter ”h!jÎhhhANhCNubju)”}”(hŒ``psci_setup()``”h]”hŒpsci_setup()”…””}”(hhh!j×ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jÎubhŒ½ and prior to exit to the non-secure world, this function must be called by the EL3 Runtime Software to initialize the non-secure world context. The non-secure world entrypoint information ”…””}”(hŒ½ and prior to exit to the non-secure world, this function must be called by the EL3 Runtime Software to initialize the non-secure world context. The non-secure world entrypoint information ”h!jÎhhhANhCNubju)”}”(hŒ``next_image_info``”h]”hŒnext_image_info”…””}”(hhh!jêubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jÎubhŒŒ (first argument) will be used to determine the non-secure context. After this function returns, the EL3 Runtime Software must retrieve the ”…””}”(hŒŒ (first argument) will be used to determine the non-secure context. After this function returns, the EL3 Runtime Software must retrieve the ”h!jÎhhhANhCNubju)”}”(hŒ``cpu_context_t``”h]”hŒ cpu_context_t”…””}”(hhh!jýubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jÎubhŒn (using cm_get_context()) for the current CPU and program the registers prior to exit to the non-secure world.”…””}”(hŒn (using cm_get_context()) for the current CPU and program the registers prior to exit to the non-secure world.”h!jÎhhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCKÙh!j¯hhubeh"}”(h$]”Œ*interface-psci-prepare-next-non-secure-ctx”ah&]”h+]”Œ.interface : psci_prepare_next_non_secure_ctx()”ah-]”h/]”uh1jŒh!jBhhhAj¡hCKÒubj)”}”(hhh]”(j’)”}”(hŒ'Interface : psci_register_spd_pm_hook()”h]”hŒ'Interface : psci_register_spd_pm_hook()”…””}”(hj#h!j!hhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j‘h!jhhhAj¡hCKâubjŒ)”}”(hŒ/Argument : const spd_pm_ops_t * Return : void”h]”hŒ/Argument : const spd_pm_ops_t * Return : void”…””}”(hhh!j/ubah"}”(h$]”h&]”h+]”h-]”h/]”jžjŸuh1j‹hAj¡hCKæh!jhhubj£)”}”(hXÑAs explained in `Secure payload power management callback`_, the EL3 Runtime Software may want to perform some bookkeeping during power management operations. This function is used to register the ``spd_pm_ops_t`` (first argument) callbacks with the PSCI library which will be called appropriately during power management. Calling this function is optional and need to be called by the primary CPU during the cold boot sequence after ``psci_setup()`` has completed.”h]”(hŒAs explained in ”…””}”(hŒAs explained in ”h!j=hhhANhCNubj®)”}”(hŒ+`Secure payload power management callback`_”h]”hŒ(Secure payload power management callback”…””}”(hŒ(Secure payload power management callback”h!jFubah"}”(h$]”h&]”h+]”h-]”h/]”Œname”Œ(Secure payload power management callback”j$Œ(secure-payload-power-management-callback”uh1jh!j=jÂKubhŒŠ, the EL3 Runtime Software may want to perform some bookkeeping during power management operations. This function is used to register the ”…””}”(hŒŠ, the EL3 Runtime Software may want to perform some bookkeeping during power management operations. This function is used to register the ”h!j=hhhANhCNubju)”}”(hŒ``spd_pm_ops_t``”h]”hŒspd_pm_ops_t”…””}”(hhh!j]ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j=ubhŒÝ (first argument) callbacks with the PSCI library which will be called appropriately during power management. Calling this function is optional and need to be called by the primary CPU during the cold boot sequence after ”…””}”(hŒÝ (first argument) callbacks with the PSCI library which will be called appropriately during power management. Calling this function is optional and need to be called by the primary CPU during the cold boot sequence after ”h!j=hhhANhCNubju)”}”(hŒ``psci_setup()``”h]”hŒpsci_setup()”…””}”(hhh!jpubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j=ubhŒ has completed.”…””}”(hŒ has completed.”h!j=hhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCKéh!jhhubeh"}”(h$]”Œ#interface-psci-register-spd-pm-hook”ah&]”h+]”Œ'interface : psci_register_spd_pm_hook()”ah-]”h/]”uh1jŒh!jBhhhAj¡hCKâubj)”}”(hhh]”(j’)”}”(hŒInterface : psci_smc_handler()”h]”hŒInterface : psci_smc_handler()”…””}”(hj–h!j”hhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j‘h!j‘hhhAj¡hCKòubjŒ)”}”(hŒÈArgument : uint32_t smc_fid, u_register_t x1, u_register_t x2, u_register_t x3, u_register_t x4, void *cookie, void *handle, u_register_t flags Return : u_register_t”h]”hŒÈArgument : uint32_t smc_fid, u_register_t x1, u_register_t x2, u_register_t x3, u_register_t x4, void *cookie, void *handle, u_register_t flags Return : u_register_t”…””}”(hhh!j¢ubah"}”(h$]”h&]”h+]”h-]”h/]”jžjŸuh1j‹hAj¡hCKöh!j‘hhubj£)”}”(hX¤This function is the top level handler for SMCs which fall within the PSCI service range specified in `SMCCC`_. The function ID ``smc_fid`` (first argument) determines the PSCI API to be called. The ``x1`` to ``x4`` (2nd to 5th arguments), are the values of the registers r1 - r4 (in AArch32) or x1 - x4 (in AArch64) when the SMC is received. These are the arguments to PSCI API as described in `PSCI spec`_. The 'flags' (8th argument) is a bit field parameter and is detailed in 'smccc.h' header. It includes whether the call is from the secure or non-secure world. The ``cookie`` (6th argument) and the ``handle`` (7th argument) are not used and are reserved for future use.”h]”(hŒfThis function is the top level handler for SMCs which fall within the PSCI service range specified in ”…””}”(hŒfThis function is the top level handler for SMCs which fall within the PSCI service range specified in ”h!j°hhhANhCNubj®)”}”(hŒ`SMCCC`_”h]”hŒSMCCC”…””}”(hŒSMCCC”h!j¹ubah"}”(h$]”h&]”h+]”h-]”h/]”Œname”jÁjÀjíuh1jh!j°jÂKubhŒ. The function ID ”…””}”(hŒ. The function ID ”h!j°hhhANhCNubju)”}”(hŒ``smc_fid``”h]”hŒsmc_fid”…””}”(hhh!jÎubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j°ubhŒ< (first argument) determines the PSCI API to be called. The ”…””}”(hŒ< (first argument) determines the PSCI API to be called. The ”h!j°hhhANhCNubju)”}”(hŒ``x1``”h]”hŒx1”…””}”(hhh!jáubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j°ubhŒ to ”…””}”(hŒ to ”h!j°hhhANhCNubju)”}”(hŒ``x4``”h]”hŒx4”…””}”(hhh!jôubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j°ubhŒ´ (2nd to 5th arguments), are the values of the registers r1 - r4 (in AArch32) or x1 - x4 (in AArch64) when the SMC is received. These are the arguments to PSCI API as described in ”…””}”(hŒ´ (2nd to 5th arguments), are the values of the registers r1 - r4 (in AArch32) or x1 - x4 (in AArch64) when the SMC is received. These are the arguments to PSCI API as described in ”h!j°hhhANhCNubj®)”}”(hŒ`PSCI spec`_”h]”hŒ PSCI spec”…””}”(hŒ PSCI spec”h!jubah"}”(h$]”h&]”h+]”h-]”h/]”Œname”Œ PSCI spec”jÀjÁuh1jh!j°jÂKubhŒ¬. The â€˜flagsâ€™ (8th argument) is a bit field parameter and is detailed in â€˜smccc.hâ€™ header. It includes whether the call is from the secure or non-secure world. The ”…””}”(hŒ¤. The 'flags' (8th argument) is a bit field parameter and is detailed in 'smccc.h' header. It includes whether the call is from the secure or non-secure world. The ”h!j°hhhANhCNubju)”}”(hŒ ``cookie``”h]”hŒcookie”…””}”(hhh!jubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j°ubhŒ (6th argument) and the ”…””}”(hŒ (6th argument) and the ”h!j°hhhANhCNubju)”}”(hŒ ``handle``”h]”hŒhandle”…””}”(hhh!j0ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j°ubhŒ= (7th argument) are not used and are reserved for future use.”…””}”(hŒ= (7th argument) are not used and are reserved for future use.”h!j°hhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCKüh!j‘hhubj£)”}”(hX'The return value from this interface is the return value from the underlying PSCI API corresponding to ``smc_fid``. This function may not return back to the caller if PSCI API causes power down of the CPU. In this case, when the CPU wakes up, it will start execution from the warm reset address.”h]”(hŒgThe return value from this interface is the return value from the underlying PSCI API corresponding to ”…””}”(hŒgThe return value from this interface is the return value from the underlying PSCI API corresponding to ”h!jIhhhANhCNubju)”}”(hŒ``smc_fid``”h]”hŒsmc_fid”…””}”(hhh!jRubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jIubhŒµ. This function may not return back to the caller if PSCI API causes power down of the CPU. In this case, when the CPU wakes up, it will start execution from the warm reset address.”…””}”(hŒµ. This function may not return back to the caller if PSCI API causes power down of the CPU. In this case, when the CPU wakes up, it will start execution from the warm reset address.”h!jIhhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMh!j‘hhubeh"}”(h$]”Œinterface-psci-smc-handler”ah&]”h+]”Œinterface : psci_smc_handler()”ah-]”h/]”uh1jŒh!jBhhhAj¡hCKòubj)”}”(hhh]”(j’)”}”(hŒ&Interface : psci_warmboot_entrypoint()”h]”hŒ&Interface : psci_warmboot_entrypoint()”…””}”(hjxh!jvhhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j‘h!jshhhAj¡hCMubjŒ)”}”(hŒArgument : void Return : void”h]”hŒArgument : void Return : void”…””}”(hhh!j„ubah"}”(h$]”h&]”h+]”h-]”h/]”jžjŸuh1j‹hAj¡hCMh!jshhubj£)”}”(hXÛThis function performs the warm boot initialization/restoration as mandated by `PSCI spec`_. For AArch32, on wakeup from power down the CPU resets to secure SVC mode and the EL3 Runtime Software must perform the prerequisite initializations mentioned at top of this section. This function must be called with Data cache disabled (unless build option ``HW_ASSISTED_COHERENCY`` is enabled) but with MMU initialized and enabled. The major actions performed by this function are:”h]”(hŒOThis function performs the warm boot initialization/restoration as mandated by ”…””}”(hŒOThis function performs the warm boot initialization/restoration as mandated by ”h!j’hhhANhCNubj®)”}”(hŒ`PSCI spec`_”h]”hŒ PSCI spec”…””}”(hŒ PSCI spec”h!j›ubah"}”(h$]”h&]”h+]”h-]”h/]”Œname”Œ PSCI spec”jÀjÁuh1jh!j’jÂKubhX. For AArch32, on wakeup from power down the CPU resets to secure SVC mode and the EL3 Runtime Software must perform the prerequisite initializations mentioned at top of this section. This function must be called with Data cache disabled (unless build option ”…””}”(hX. For AArch32, on wakeup from power down the CPU resets to secure SVC mode and the EL3 Runtime Software must perform the prerequisite initializations mentioned at top of this section. This function must be called with Data cache disabled (unless build option ”h!j’hhhANhCNubju)”}”(hŒ``HW_ASSISTED_COHERENCY``”h]”hŒHW_ASSISTED_COHERENCY”…””}”(hhh!j±ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j’ubhŒd is enabled) but with MMU initialized and enabled. The major actions performed by this function are:”…””}”(hŒd is enabled) but with MMU initialized and enabled. The major actions performed by this function are:”h!j’hhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMh!jshhubj)”}”(hhh]”(j7)”}”(hŒ1Invalidates the stack and enables the data cache.”h]”j£)”}”(hjÏh]”hŒ1Invalidates the stack and enables the data cache.”…””}”(hjÏh!jÑubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMh!jÍubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jÊhhhAj¡hCNubj7)”}”(hŒ5Initializes architecture and PSCI state coordination.”h]”j£)”}”(hjæh]”hŒ5Initializes architecture and PSCI state coordination.”…””}”(hjæh!jèubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMh!jäubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jÊhhhAj¡hCNubj7)”}”(hŒkRestores/Initializes the peripheral drivers to the required state via appropriate ``plat_psci_ops_t`` hooks”h]”j£)”}”(hŒkRestores/Initializes the peripheral drivers to the required state via appropriate ``plat_psci_ops_t`` hooks”h]”(hŒRRestores/Initializes the peripheral drivers to the required state via appropriate ”…””}”(hŒRRestores/Initializes the peripheral drivers to the required state via appropriate ”h!jÿubju)”}”(hŒ``plat_psci_ops_t``”h]”hŒplat_psci_ops_t”…””}”(hhh!jubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jÿubhŒ hooks”…””}”(hŒ hooks”h!jÿubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMh!jûubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jÊhhhAj¡hCNubj7)”}”(hŒURestores the EL3 Runtime Software context via appropriate ``spd_pm_ops_t`` callbacks.”h]”j£)”}”(hŒURestores the EL3 Runtime Software context via appropriate ``spd_pm_ops_t`` callbacks.”h]”(hŒ:Restores the EL3 Runtime Software context via appropriate ”…””}”(hŒ:Restores the EL3 Runtime Software context via appropriate ”h!j+ubju)”}”(hŒ``spd_pm_ops_t``”h]”hŒspd_pm_ops_t”…””}”(hhh!j4ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j+ubhŒ callbacks.”…””}”(hŒ callbacks.”h!j+ubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMh!j'ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jÊhhhAj¡hCNubj7)”}”(hŒeRestores/Initializes the non-secure context and populates the ``cpu_context_t`` for the current CPU. ”h]”j£)”}”(hŒdRestores/Initializes the non-secure context and populates the ``cpu_context_t`` for the current CPU.”h]”(hŒ>Restores/Initializes the non-secure context and populates the ”…””}”(hŒ>Restores/Initializes the non-secure context and populates the ”h!jWubju)”}”(hŒ``cpu_context_t``”h]”hŒ cpu_context_t”…””}”(hhh!j`ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jWubhŒ for the current CPU.”…””}”(hŒ for the current CPU.”h!jWubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM h!jSubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jÊhhhAj¡hCNubeh"}”(h$]”h&]”h+]”h-]”h/]”jÓjÔuh1jhAj¡hCMh!jshhubj£)”}”(hŒÅUpon the return of this function, the EL3 Runtime Software must retrieve the non-secure ``cpu_context_t`` using ``cm_get_context()`` and program the registers prior to exit to the non-secure world.”h]”(hŒXUpon the return of this function, the EL3 Runtime Software must retrieve the non-secure ”…””}”(hŒXUpon the return of this function, the EL3 Runtime Software must retrieve the non-secure ”h!j…hhhANhCNubju)”}”(hŒ``cpu_context_t``”h]”hŒ cpu_context_t”…””}”(hhh!jŽubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j…ubhŒ using ”…””}”(hŒ using ”h!j…hhhANhCNubju)”}”(hŒ``cm_get_context()``”h]”hŒcm_get_context()”…””}”(hhh!j¡ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j…ubhŒA and program the registers prior to exit to the non-secure world.”…””}”(hŒA and program the registers prior to exit to the non-secure world.”h!j…hhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM#h!jshhubeh"}”(h$]”Œ"interface-psci-warmboot-entrypoint”ah&]”h+]”Œ&interface : psci_warmboot_entrypoint()”ah-]”h/]”uh1jŒh!jBhhhAj¡hCMubeh"}”(h$]”j%ah&]”h+]”Œpsci library interface”ah-]”h/]”uh1jŒh!jŽhhhAj¡hCKyjAKubj)”}”(hhh]”(j’)”}”(hŒ!EL3 Runtime Software dependencies”h]”hŒ!EL3 Runtime Software dependencies”…””}”(hjÎh!jÌhhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j‘h!jÉhhhAj¡hCM(ubj£)”}”(hX[The PSCI Library includes supporting frameworks like context management, cpu operations (cpu_ops) and per-cpu data framework. Other helper library functions like bakery locks and spin locks are also included in the library. The dependencies which must be fulfilled by the EL3 Runtime Software for integration with PSCI library are described below.”h]”hX[The PSCI Library includes supporting frameworks like context management, cpu operations (cpu_ops) and per-cpu data framework. Other helper library functions like bakery locks and spin locks are also included in the library. The dependencies which must be fulfilled by the EL3 Runtime Software for integration with PSCI library are described below.”…””}”(hjÜh!jÚhhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM*h!jÉhhubj)”}”(hhh]”(j’)”}”(hŒGeneral dependencies”h]”hŒGeneral dependencies”…””}”(hjíh!jëhhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j‘h!jèhhhAj¡hCM1ubj£)”}”(hŒªThe PSCI library being a Multiprocessor (MP) implementation, EL3 Runtime Software must provide an SMC handling framework capable of MP adhering to `SMCCC`_ specification.”h]”(hŒ“The PSCI library being a Multiprocessor (MP) implementation, EL3 Runtime Software must provide an SMC handling framework capable of MP adhering to ”…””}”(hŒ“The PSCI library being a Multiprocessor (MP) implementation, EL3 Runtime Software must provide an SMC handling framework capable of MP adhering to ”h!jùhhhANhCNubj®)”}”(hŒ`SMCCC`_”h]”hŒSMCCC”…””}”(hŒSMCCC”h!jubah"}”(h$]”h&]”h+]”h-]”h/]”Œname”j jÀjíuh1jh!jùjÂKubhŒ specification.”…””}”(hŒ specification.”h!jùhhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM3h!jèhhubj£)”}”(hXThe EL3 Runtime Software must also export cache maintenance primitives and some helper utilities for assert, print and memory operations as listed below. The TF-A source tree provides implementations for all these functions but the EL3 Runtime Software may use its own implementation.”h]”hXThe EL3 Runtime Software must also export cache maintenance primitives and some helper utilities for assert, print and memory operations as listed below. The TF-A source tree provides implementations for all these functions but the EL3 Runtime Software may use its own implementation.”…””}”(hjh!jhhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM7h!jèhhubj£)”}”(hŒ6**Functions : assert(), memcpy(), memset(), printf()**”h]”jÉ)”}”(hj-h]”hŒ2Functions : assert(), memcpy(), memset(), printf()”…””}”(hhh!j/ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jÈh!j+ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMh!jèhhubj£)”}”(hŒ#**Function : flush_dcache_range()**”h]”jÉ)”}”(hjRh]”hŒFunction : flush_dcache_range()”…””}”(hhh!jTubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jÈh!jPubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM@h!jèhhubjŒ)”}”(hŒ6Argument : uintptr_t addr, size_t size Return : void”h]”hŒ6Argument : uintptr_t addr, size_t size Return : void”…””}”(hhh!jgubah"}”(h$]”h&]”h+]”h-]”h/]”jžjŸuh1j‹hAj¡hCMDh!jèhhubj£)”}”(hŒThis function cleans and invalidates (flushes) the data cache for memory at address ``addr`` (first argument) address and of size ``size`` (second argument).”h]”(hŒTThis function cleans and invalidates (flushes) the data cache for memory at address ”…””}”(hŒTThis function cleans and invalidates (flushes) the data cache for memory at address ”h!juhhhANhCNubju)”}”(hŒ``addr``”h]”hŒaddr”…””}”(hhh!j~ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!juubhŒ& (first argument) address and of size ”…””}”(hŒ& (first argument) address and of size ”h!juhhhANhCNubju)”}”(hŒ``size``”h]”hŒsize”…””}”(hhh!j‘ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!juubhŒ (second argument).”…””}”(hŒ (second argument).”h!juhhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMGh!jèhhubj£)”}”(hŒ!**Function : inv_dcache_range()**”h]”jÉ)”}”(hj¬h]”hŒFunction : inv_dcache_range()”…””}”(hhh!j®ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jÈh!jªubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMJh!jèhhubjŒ)”}”(hŒ6Argument : uintptr_t addr, size_t size Return : void”h]”hŒ6Argument : uintptr_t addr, size_t size Return : void”…””}”(hhh!jÁubah"}”(h$]”h&]”h+]”h-]”h/]”jžjŸuh1j‹hAj¡hCMNh!jèhhubj£)”}”(hŒ’This function invalidates (flushes) the data cache for memory at address ``addr`` (first argument) address and of size ``size`` (second argument).”h]”(hŒIThis function invalidates (flushes) the data cache for memory at address ”…””}”(hŒIThis function invalidates (flushes) the data cache for memory at address ”h!jÏhhhANhCNubju)”}”(hŒ``addr``”h]”hŒaddr”…””}”(hhh!jØubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jÏubhŒ& (first argument) address and of size ”…””}”(hŒ& (first argument) address and of size ”h!jÏhhhANhCNubju)”}”(hŒ``size``”h]”hŒsize”…””}”(hhh!jëubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jÏubhŒ (second argument).”…””}”(hŒ (second argument).”h!jÏhhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMQh!jèhhubj£)”}”(hŒ**Function : do_panic()**”h]”jÉ)”}”(hjh]”hŒFunction : do_panic()”…””}”(hhh!jubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jÈh!jubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMTh!jèhhubjŒ)”}”(hŒArgument : void Return : void”h]”hŒArgument : void Return : void”…””}”(hhh!jubah"}”(h$]”h&]”h+]”h-]”h/]”jžjŸuh1j‹hAj¡hCMXh!jèhhubj£)”}”(hŒ•This function will be called by the PSCI library on encountering a critical failure that cannot be recovered from. This function **must not** return.”h]”(hŒThis function will be called by the PSCI library on encountering a critical failure that cannot be recovered from. This function ”…””}”(hŒThis function will be called by the PSCI library on encountering a critical failure that cannot be recovered from. This function ”h!j)hhhANhCNubjÉ)”}”(hŒ**must not**”h]”hŒmust not”…””}”(hhh!j2ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jÈh!j)ubhŒ return.”…””}”(hŒ return.”h!j)hhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM[h!jèhhubeh"}”(h$]”Œgeneral-dependencies”ah&]”h+]”Œgeneral dependencies”ah-]”h/]”uh1jŒh!jÉhhhAj¡hCM1ubj)”}”(hhh]”(j’)”}”(hŒCPU Context management API”h]”hŒCPU Context management API”…””}”(hjXh!jVhhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j‘h!jShhhAj¡hCM_ubj£)”}”(hX·The CPU context management data memory is statically allocated by PSCI library in BSS section. The PSCI library requires the EL3 Runtime Software to implement APIs to store and retrieve pointers to this CPU context data. SP-MIN demonstrates how these APIs can be implemented but the EL3 Runtime Software can choose a more optimal implementation (like dedicating the secure TPIDRPRW system register (in AArch32) for storing these pointers).”h]”hX·The CPU context management data memory is statically allocated by PSCI library in BSS section. The PSCI library requires the EL3 Runtime Software to implement APIs to store and retrieve pointers to this CPU context data. SP-MIN demonstrates how these APIs can be implemented but the EL3 Runtime Software can choose a more optimal implementation (like dedicating the secure TPIDRPRW system register (in AArch32) for storing these pointers).”…””}”(hjfh!jdhhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMah!jShhubj£)”}”(hŒ(**Function : cm_set_context_by_index()**”h]”jÉ)”}”(hjth]”hŒ$Function : cm_set_context_by_index()”…””}”(hhh!jvubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jÈh!jrubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMhh!jShhubjŒ)”}”(hŒ[Argument : unsigned int cpu_idx, void *context, unsigned int security_state Return : void”h]”hŒ[Argument : unsigned int cpu_idx, void *context, unsigned int security_state Return : void”…””}”(hhh!j‰ubah"}”(h$]”h&]”h+]”h-]”h/]”jžjŸuh1j‹hAj¡hCMlh!jShhubj£)”}”(hŒdThis function is called during cold boot when the ``psci_setup()`` PSCI library interface is called.”h]”(hŒ2This function is called during cold boot when the ”…””}”(hŒ2This function is called during cold boot when the ”h!j—hhhANhCNubju)”}”(hŒ``psci_setup()``”h]”hŒpsci_setup()”…””}”(hhh!j ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j—ubhŒ" PSCI library interface is called.”…””}”(hŒ" PSCI library interface is called.”h!j—hhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMoh!jShhubj£)”}”(hX½This function must store the pointer to the CPU context data, ``context`` (2nd argument), for the specified ``security_state`` (3rd argument) and CPU identified by ``cpu_idx`` (first argument). The ``security_state`` will always be non-secure when called by PSCI library and this argument is retained for compatibility with BL31. The ``cpu_idx`` will correspond to the index returned by the ``plat_core_pos_by_mpidr()`` for ``mpidr`` of the CPU.”h]”(hŒ>This function must store the pointer to the CPU context data, ”…””}”(hŒ>This function must store the pointer to the CPU context data, ”h!j¹hhhANhCNubju)”}”(hŒ``context``”h]”hŒcontext”…””}”(hhh!jÂubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j¹ubhŒ# (2nd argument), for the specified ”…””}”(hŒ# (2nd argument), for the specified ”h!j¹hhhANhCNubju)”}”(hŒ``security_state``”h]”hŒsecurity_state”…””}”(hhh!jÕubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j¹ubhŒ& (3rd argument) and CPU identified by ”…””}”(hŒ& (3rd argument) and CPU identified by ”h!j¹hhhANhCNubju)”}”(hŒ``cpu_idx``”h]”hŒcpu_idx”…””}”(hhh!jèubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j¹ubhŒ (first argument). The ”…””}”(hŒ (first argument). The ”h!j¹hhhANhCNubju)”}”(hŒ``security_state``”h]”hŒsecurity_state”…””}”(hhh!jûubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j¹ubhŒv will always be non-secure when called by PSCI library and this argument is retained for compatibility with BL31. The ”…””}”(hŒv will always be non-secure when called by PSCI library and this argument is retained for compatibility with BL31. The ”h!j¹hhhANhCNubju)”}”(hŒ``cpu_idx``”h]”hŒcpu_idx”…””}”(hhh!jubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j¹ubhŒ. will correspond to the index returned by the ”…””}”(hŒ. will correspond to the index returned by the ”h!j¹hhhANhCNubju)”}”(hŒ``plat_core_pos_by_mpidr()``”h]”hŒplat_core_pos_by_mpidr()”…””}”(hhh!j!ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j¹ubhŒ for ”…””}”(hŒ for ”h!j¹hhhANhCNubju)”}”(hŒ ``mpidr``”h]”hŒmpidr”…””}”(hhh!j4ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j¹ubhŒ of the CPU.”…””}”(hŒ of the CPU.”h!j¹hhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMrh!jShhubj£)”}”(hŒ¼The actual method of storing the ``context`` pointers is implementation specific. For example, SP-MIN stores the pointers in the array ``sp_min_cpu_ctx_ptr`` declared in ``sp_min_main.c``.”h]”(hŒ!The actual method of storing the ”…””}”(hŒ!The actual method of storing the ”h!jMhhhANhCNubju)”}”(hŒ``context``”h]”hŒcontext”…””}”(hhh!jVubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jMubhŒ[ pointers is implementation specific. For example, SP-MIN stores the pointers in the array ”…””}”(hŒ[ pointers is implementation specific. For example, SP-MIN stores the pointers in the array ”h!jMhhhANhCNubju)”}”(hŒ``sp_min_cpu_ctx_ptr``”h]”hŒsp_min_cpu_ctx_ptr”…””}”(hhh!jiubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jMubhŒ declared in ”…””}”(hŒ declared in ”h!jMhhhANhCNubju)”}”(hŒ``sp_min_main.c``”h]”hŒ sp_min_main.c”…””}”(hhh!j|ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jMubhŒ.”…””}”(hjM h!jMhhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMyh!jShhubj£)”}”(hŒ**Function : cm_get_context()**”h]”jÉ)”}”(hj–h]”hŒFunction : cm_get_context()”…””}”(hhh!j˜ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jÈh!j”ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM}h!jShhubjŒ)”}”(hŒ4Argument : uint32_t security_state Return : void *”h]”hŒ4Argument : uint32_t security_state Return : void *”…””}”(hhh!j«ubah"}”(h$]”h&]”h+]”h-]”h/]”jžjŸuh1j‹hAj¡hCMh!jShhubj£)”}”(hX¯This function must return the pointer to the ``cpu_context_t`` structure for the specified ``security_state`` (first argument) for the current CPU. The caller must ensure that ``cm_set_context_by_index`` is called first and the appropriate context pointers are stored prior to invoking this API. The ``security_state`` will always be non-secure when called by PSCI library and this argument is retained for compatibility with BL31.”h]”(hŒ-This function must return the pointer to the ”…””}”(hŒ-This function must return the pointer to the ”h!j¹hhhANhCNubju)”}”(hŒ``cpu_context_t``”h]”hŒ cpu_context_t”…””}”(hhh!jÂubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j¹ubhŒ structure for the specified ”…””}”(hŒ structure for the specified ”h!j¹hhhANhCNubju)”}”(hŒ``security_state``”h]”hŒsecurity_state”…””}”(hhh!jÕubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j¹ubhŒC (first argument) for the current CPU. The caller must ensure that ”…””}”(hŒC (first argument) for the current CPU. The caller must ensure that ”h!j¹hhhANhCNubju)”}”(hŒ``cm_set_context_by_index``”h]”hŒcm_set_context_by_index”…””}”(hhh!jèubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j¹ubhŒa is called first and the appropriate context pointers are stored prior to invoking this API. The ”…””}”(hŒa is called first and the appropriate context pointers are stored prior to invoking this API. The ”h!j¹hhhANhCNubju)”}”(hŒ``security_state``”h]”hŒsecurity_state”…””}”(hhh!jûubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j¹ubhŒq will always be non-secure when called by PSCI library and this argument is retained for compatibility with BL31.”…””}”(hŒq will always be non-secure when called by PSCI library and this argument is retained for compatibility with BL31.”h!j¹hhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM„h!jShhubj£)”}”(hŒ(**Function : cm_get_context_by_index()**”h]”jÉ)”}”(hjh]”hŒ$Function : cm_get_context_by_index()”…””}”(hhh!jubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jÈh!jubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM‹h!jShhubjŒ)”}”(hŒNArgument : unsigned int cpu_idx, unsigned int security_state Return : void *”h]”hŒNArgument : unsigned int cpu_idx, unsigned int security_state Return : void *”…””}”(hhh!j+ubah"}”(h$]”h&]”h+]”h-]”h/]”jžjŸuh1j‹hAj¡hCMh!jShhubj£)”}”(hXGThis function must return the pointer to the ``cpu_context_t`` structure for the specified ``security_state`` (second argument) for the CPU identified by ``cpu_idx`` (first argument). The caller must ensure that ``cm_set_context_by_index`` is called first and the appropriate context pointers are stored prior to invoking this API. The ``security_state`` will always be non-secure when called by PSCI library and this argument is retained for compatibility with BL31. The ``cpu_idx`` will correspond to the index returned by the ``plat_core_pos_by_mpidr()`` for ``mpidr`` of the CPU.”h]”(hŒ-This function must return the pointer to the ”…””}”(hŒ-This function must return the pointer to the ”h!j9hhhANhCNubju)”}”(hŒ``cpu_context_t``”h]”hŒ cpu_context_t”…””}”(hhh!jBubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j9ubhŒ structure for the specified ”…””}”(hŒ structure for the specified ”h!j9hhhANhCNubju)”}”(hŒ``security_state``”h]”hŒsecurity_state”…””}”(hhh!jUubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j9ubhŒ- (second argument) for the CPU identified by ”…””}”(hŒ- (second argument) for the CPU identified by ”h!j9hhhANhCNubju)”}”(hŒ``cpu_idx``”h]”hŒcpu_idx”…””}”(hhh!jhubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j9ubhŒ/ (first argument). The caller must ensure that ”…””}”(hŒ/ (first argument). The caller must ensure that ”h!j9hhhANhCNubju)”}”(hŒ``cm_set_context_by_index``”h]”hŒcm_set_context_by_index”…””}”(hhh!j{ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j9ubhŒa is called first and the appropriate context pointers are stored prior to invoking this API. The ”…””}”(hŒa is called first and the appropriate context pointers are stored prior to invoking this API. The ”h!j9hhhANhCNubju)”}”(hŒ``security_state``”h]”hŒsecurity_state”…””}”(hhh!jŽubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j9ubhŒv will always be non-secure when called by PSCI library and this argument is retained for compatibility with BL31. The ”…””}”(hŒv will always be non-secure when called by PSCI library and this argument is retained for compatibility with BL31. The ”h!j9hhhANhCNubju)”}”(hŒ``cpu_idx``”h]”hŒcpu_idx”…””}”(hhh!j¡ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j9ubhŒ. will correspond to the index returned by the ”…””}”(hŒ. will correspond to the index returned by the ”h!j9hhhANhCNubju)”}”(hŒ``plat_core_pos_by_mpidr()``”h]”hŒplat_core_pos_by_mpidr()”…””}”(hhh!j´ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j9ubhŒ for ”…””}”(hŒ for ”h!j9hhhANhCNubju)”}”(hŒ ``mpidr``”h]”hŒmpidr”…””}”(hhh!jÇubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j9ubhŒ of the CPU.”…””}”(hŒ of the CPU.”h!j9hhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM’h!jShhubeh"}”(h$]”j/ah&]”h+]”Œcpu context management api”ah-]”h/]”uh1jŒh!jÉhhhAj¡hCM_jAKubj)”}”(hhh]”(j’)”}”(hŒPlatform API”h]”hŒPlatform API”…””}”(hjìh!jêhhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j‘h!jçhhhAj¡hCMœubj£)”}”(hŒÏThe platform layer abstracts the platform-specific details from the generic PSCI library. The following platform APIs/macros must be defined by the EL3 Runtime Software for integration with the PSCI library.”h]”hŒÏThe platform layer abstracts the platform-specific details from the generic PSCI library. The following platform APIs/macros must be defined by the EL3 Runtime Software for integration with the PSCI library.”…””}”(hjúh!jøhhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMžh!jçhhubj£)”}”(hŒ The mandatory platform APIs are:”h]”hŒ The mandatory platform APIs are:”…””}”(hjh!jhhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM¢h!jçhhubj)”}”(hhh]”(j7)”}”(hŒplat_my_core_pos”h]”j£)”}”(hjh]”hŒplat_my_core_pos”…””}”(hjh!jubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM¤h!jubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jhhhAj¡hCNubj7)”}”(hŒplat_core_pos_by_mpidr”h]”j£)”}”(hj0h]”hŒplat_core_pos_by_mpidr”…””}”(hj0h!j2ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM¥h!j.ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jhhhAj¡hCNubj7)”}”(hŒplat_get_syscnt_freq2”h]”j£)”}”(hjGh]”hŒplat_get_syscnt_freq2”…””}”(hjGh!jIubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM¦h!jEubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jhhhAj¡hCNubj7)”}”(hŒplat_get_power_domain_tree_desc”h]”j£)”}”(hj^h]”hŒplat_get_power_domain_tree_desc”…””}”(hj^h!j`ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM§h!j\ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jhhhAj¡hCNubj7)”}”(hŒplat_setup_psci_ops”h]”j£)”}”(hjuh]”hŒplat_setup_psci_ops”…””}”(hjuh!jwubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM¨h!jsubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jhhhAj¡hCNubj7)”}”(hŒplat_reset_handler”h]”j£)”}”(hjŒh]”hŒplat_reset_handler”…””}”(hjŒh!jŽubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM©h!jŠubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jhhhAj¡hCNubj7)”}”(hŒplat_panic_handler”h]”j£)”}”(hj£h]”hŒplat_panic_handler”…””}”(hj£h!j¥ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMªh!j¡ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jhhhAj¡hCNubj7)”}”(hŒplat_get_my_stack ”h]”j£)”}”(hŒplat_get_my_stack”h]”hŒplat_get_my_stack”…””}”(hj¾h!j¼ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM«h!j¸ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jhhhAj¡hCNubeh"}”(h$]”h&]”h+]”h-]”h/]”jÓjÔuh1jhAj¡hCM¤h!jçhhubj£)”}”(hŒ"The mandatory platform macros are:”h]”hŒ"The mandatory platform macros are:”…””}”(hjØh!jÖhhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMh!jçhhubj)”}”(hhh]”(j7)”}”(hŒPLATFORM_CORE_COUNT”h]”j£)”}”(hjéh]”hŒPLATFORM_CORE_COUNT”…””}”(hjéh!jëubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM¯h!jçubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jähhhAj¡hCNubj7)”}”(hŒPLAT_MAX_PWR_LVL”h]”j£)”}”(hjh]”hŒPLAT_MAX_PWR_LVL”…””}”(hjh!jubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM°h!jþubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jähhhAj¡hCNubj7)”}”(hŒPLAT_NUM_PWR_DOMAINS”h]”j£)”}”(hjh]”hŒPLAT_NUM_PWR_DOMAINS”…””}”(hjh!jubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM±h!jubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jähhhAj¡hCNubj7)”}”(hŒCACHE_WRITEBACK_GRANULE”h]”j£)”}”(hj.h]”hŒCACHE_WRITEBACK_GRANULE”…””}”(hj.h!j0ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM²h!j,ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jähhhAj¡hCNubj7)”}”(hŒPLAT_MAX_OFF_STATE”h]”j£)”}”(hjEh]”hŒPLAT_MAX_OFF_STATE”…””}”(hjEh!jGubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM³h!jCubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jähhhAj¡hCNubj7)”}”(hŒPLAT_MAX_RET_STATE”h]”j£)”}”(hj\h]”hŒPLAT_MAX_RET_STATE”…””}”(hj\h!j^ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM´h!jZubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jähhhAj¡hCNubj7)”}”(hŒ"PLAT_MAX_PWR_LVL_STATES (optional)”h]”j£)”}”(hjsh]”hŒ"PLAT_MAX_PWR_LVL_STATES (optional)”…””}”(hjsh!juubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMµh!jqubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jähhhAj¡hCNubj7)”}”(hŒPLAT_PCPU_DATA_SIZE (optional) ”h]”j£)”}”(hŒPLAT_PCPU_DATA_SIZE (optional)”h]”hŒPLAT_PCPU_DATA_SIZE (optional)”…””}”(hjŽh!jŒubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM¶h!jˆubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jähhhAj¡hCNubeh"}”(h$]”h&]”h+]”h-]”h/]”jÓjÔuh1jhAj¡hCM¯h!jçhhubj£)”}”(hŒJThe details of these APIs/macros can be found in the :ref:`Porting Guide`.”h]”(hŒ5The details of these APIs/macros can be found in the ”…””}”(hŒ5The details of these APIs/macros can be found in the ”h!j¦hhhANhCNubh)”}”(hŒ:ref:`Porting Guide`”h]”h)”}”(hj±h]”hŒ Porting Guide”…””}”(hhh!j³ubah"}”(h$]”h&]”(h(Œstd”Œstd-ref”eh+]”h-]”h/]”uh1hh!j¯ubah"}”(h$]”h&]”h+]”h-]”h/]”Œrefdoc”h9Œ refdomain”j½Œreftype”Œref”Œrefexplicit”‰Œrefwarn”ˆh?Œ porting guide”uh1hhAj¡hCM¸h!j¦ubhŒ.”…””}”(hjM h!j¦hhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCM¸h!jçhhubj£)”}”(hX¥All platform specific operations for power management are done via ``plat_psci_ops_t`` callbacks registered by the platform when ``plat_setup_psci_ops()`` API is called. The description of each of the callbacks in ``plat_psci_ops_t`` can be found in PSCI section of the :ref:`Porting Guide`. If any these callbacks are not registered, then the PSCI API associated with that callback will not be supported by PSCI library.”h]”(hŒCAll platform specific operations for power management are done via ”…””}”(hŒCAll platform specific operations for power management are done via ”h!jÙhhhANhCNubju)”}”(hŒ``plat_psci_ops_t``”h]”hŒplat_psci_ops_t”…””}”(hhh!jâubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jÙubhŒ+ callbacks registered by the platform when ”…””}”(hŒ+ callbacks registered by the platform when ”h!jÙhhhANhCNubju)”}”(hŒ``plat_setup_psci_ops()``”h]”hŒplat_setup_psci_ops()”…””}”(hhh!jõubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jÙubhŒ< API is called. The description of each of the callbacks in ”…””}”(hŒ< API is called. The description of each of the callbacks in ”h!jÙhhhANhCNubju)”}”(hŒ``plat_psci_ops_t``”h]”hŒplat_psci_ops_t”…””}”(hhh!jubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jÙubhŒ% can be found in PSCI section of the ”…””}”(hŒ% can be found in PSCI section of the ”h!jÙhhhANhCNubh)”}”(hŒ:ref:`Porting Guide`”h]”h)”}”(hjh]”hŒ Porting Guide”…””}”(hhh!jubah"}”(h$]”h&]”(h(Œstd”Œstd-ref”eh+]”h-]”h/]”uh1hh!jubah"}”(h$]”h&]”h+]”h-]”h/]”Œrefdoc”h9Œ refdomain”j)Œreftype”Œref”Œrefexplicit”‰Œrefwarn”ˆh?Œ porting guide”uh1hhAj¡hCMºh!jÙubhŒƒ. If any these callbacks are not registered, then the PSCI API associated with that callback will not be supported by PSCI library.”…””}”(hŒƒ. If any these callbacks are not registered, then the PSCI API associated with that callback will not be supported by PSCI library.”h!jÙhhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMºh!jçhhubeh"}”(h$]”Œplatform-api”ah&]”h+]”Œplatform api”ah-]”h/]”uh1jŒh!jÉhhhAj¡hCMœubj)”}”(hhh]”(j’)”}”(hŒ(Secure payload power management callback”h]”hŒ(Secure payload power management callback”…””}”(hjSh!jQhhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j‘h!jNhhhAj¡hCMÃubj£)”}”(hXDuring PSCI power management operations, the EL3 Runtime Software may need to perform some bookkeeping, and PSCI library provides ``spd_pm_ops_t`` callbacks for this purpose. These hooks must be populated and registered by using ``psci_register_spd_pm_hook()`` PSCI library interface.”h]”(hŒ‚During PSCI power management operations, the EL3 Runtime Software may need to perform some bookkeeping, and PSCI library provides ”…””}”(hŒ‚During PSCI power management operations, the EL3 Runtime Software may need to perform some bookkeeping, and PSCI library provides ”h!j_hhhANhCNubju)”}”(hŒ``spd_pm_ops_t``”h]”hŒspd_pm_ops_t”…””}”(hhh!jhubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j_ubhŒS callbacks for this purpose. These hooks must be populated and registered by using ”…””}”(hŒS callbacks for this purpose. These hooks must be populated and registered by using ”h!j_hhhANhCNubju)”}”(hŒ``psci_register_spd_pm_hook()``”h]”hŒpsci_register_spd_pm_hook()”…””}”(hhh!j{ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j_ubhŒ PSCI library interface.”…””}”(hŒ PSCI library interface.”h!j_hhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMÅh!jNhhubj£)”}”(hXíTypical bookkeeping during PSCI power management calls include save/restore of the EL3 Runtime Software context. Also if the EL3 Runtime Software makes use of secure interrupts, then these interrupts must also be managed appropriately during CPU power down/power up. Any secure interrupt targeted to the current CPU must be disabled or re-targeted to other running CPU prior to power down of the current CPU. During power up, these interrupt can be enabled/re-targeted back to the current CPU.”h]”hXíTypical bookkeeping during PSCI power management calls include save/restore of the EL3 Runtime Software context. Also if the EL3 Runtime Software makes use of secure interrupts, then these interrupts must also be managed appropriately during CPU power down/power up. Any secure interrupt targeted to the current CPU must be disabled or re-targeted to other running CPU prior to power down of the current CPU. During power up, these interrupt can be enabled/re-targeted back to the current CPU.”…””}”(hj–h!j”hhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMËh!jNhhubjŒ)”}”(hXtypedef struct spd_pm_ops { void (*svc_on)(u_register_t target_cpu); int32_t (*svc_off)(u_register_t __unused); void (*svc_suspend)(u_register_t max_off_pwrlvl); void (*svc_on_finish)(u_register_t __unused); void (*svc_suspend_finish)(u_register_t max_off_pwrlvl); int32_t (*svc_migrate)(u_register_t from_cpu, u_register_t to_cpu); int32_t (*svc_migrate_info)(u_register_t *resident_cpu); void (*svc_system_off)(void); void (*svc_system_reset)(void); } spd_pm_ops_t;”h]”hXtypedef struct spd_pm_ops { void (*svc_on)(u_register_t target_cpu); int32_t (*svc_off)(u_register_t __unused); void (*svc_suspend)(u_register_t max_off_pwrlvl); void (*svc_on_finish)(u_register_t __unused); void (*svc_suspend_finish)(u_register_t max_off_pwrlvl); int32_t (*svc_migrate)(u_register_t from_cpu, u_register_t to_cpu); int32_t (*svc_migrate_info)(u_register_t *resident_cpu); void (*svc_system_off)(void); void (*svc_system_reset)(void); } spd_pm_ops_t;”…””}”(hhh!j¢ubah"}”(h$]”h&]”h+]”h-]”h/]”Œforce”‰Œhighlight_args”}”jžjŸj j¡uh1j‹hAj¡hCMÓh!jNhhubj£)”}”(hŒ4A brief description of each callback is given below:”h]”hŒ4A brief description of each callback is given below:”…””}”(hjµh!j³hhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMáh!jNhhubj)”}”(hhh]”(j7)”}”(hXsvc_on, svc_off, svc_on_finish The ``svc_on``, ``svc_off`` callbacks are called during PSCI_CPU_ON, PSCI_CPU_OFF APIs respectively. The ``svc_on_finish`` is called when the target CPU of PSCI_CPU_ON API powers up and executes the ``psci_warmboot_entrypoint()`` PSCI library interface. ”h]”(j£)”}”(hŒsvc_on, svc_off, svc_on_finish”h]”hŒsvc_on, svc_off, svc_on_finish”…””}”(hjÊh!jÈubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMãh!jÄubj£)”}”(hŒýThe ``svc_on``, ``svc_off`` callbacks are called during PSCI_CPU_ON, PSCI_CPU_OFF APIs respectively. The ``svc_on_finish`` is called when the target CPU of PSCI_CPU_ON API powers up and executes the ``psci_warmboot_entrypoint()`` PSCI library interface.”h]”(hŒThe ”…””}”(hŒThe ”h!jÖubju)”}”(hŒ ``svc_on``”h]”hŒsvc_on”…””}”(hhh!jßubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jÖubhŒ, ”…””}”(hŒ, ”h!jÖubju)”}”(hŒ``svc_off``”h]”hŒsvc_off”…””}”(hhh!jòubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jÖubhŒN callbacks are called during PSCI_CPU_ON, PSCI_CPU_OFF APIs respectively. The ”…””}”(hŒN callbacks are called during PSCI_CPU_ON, PSCI_CPU_OFF APIs respectively. The ”h!jÖubju)”}”(hŒ``svc_on_finish``”h]”hŒ svc_on_finish”…””}”(hhh!jubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jÖubhŒM is called when the target CPU of PSCI_CPU_ON API powers up and executes the ”…””}”(hŒM is called when the target CPU of PSCI_CPU_ON API powers up and executes the ”h!jÖubju)”}”(hŒ``psci_warmboot_entrypoint()``”h]”hŒpsci_warmboot_entrypoint()”…””}”(hhh!jubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jÖubhŒ PSCI library interface.”…””}”(hŒ PSCI library interface.”h!jÖubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMåh!jÄubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jÁhhhAj¡hCNubj7)”}”(hXžsvc_suspend, svc_suspend_finish The ``svc_suspend`` callback is called during power down bu either PSCI_SUSPEND or PSCI_SYSTEM_SUSPEND APIs. The ``svc_suspend_finish`` is called when the CPU wakes up from suspend and executes the ``psci_warmboot_entrypoint()`` PSCI library interface. The ``max_off_pwrlvl`` (first parameter) denotes the highest power domain level being powered down to or woken up from suspend. ”h]”(j£)”}”(hŒsvc_suspend, svc_suspend_finish”h]”hŒsvc_suspend, svc_suspend_finish”…””}”(hj=h!j;ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMêh!j7ubj£)”}”(hX|The ``svc_suspend`` callback is called during power down bu either PSCI_SUSPEND or PSCI_SYSTEM_SUSPEND APIs. The ``svc_suspend_finish`` is called when the CPU wakes up from suspend and executes the ``psci_warmboot_entrypoint()`` PSCI library interface. The ``max_off_pwrlvl`` (first parameter) denotes the highest power domain level being powered down to or woken up from suspend.”h]”(hŒThe ”…””}”(hŒThe ”h!jIubju)”}”(hŒ``svc_suspend``”h]”hŒsvc_suspend”…””}”(hhh!jRubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jIubhŒ^ callback is called during power down bu either PSCI_SUSPEND or PSCI_SYSTEM_SUSPEND APIs. The ”…””}”(hŒ^ callback is called during power down bu either PSCI_SUSPEND or PSCI_SYSTEM_SUSPEND APIs. The ”h!jIubju)”}”(hŒ``svc_suspend_finish``”h]”hŒsvc_suspend_finish”…””}”(hhh!jeubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jIubhŒ? is called when the CPU wakes up from suspend and executes the ”…””}”(hŒ? is called when the CPU wakes up from suspend and executes the ”h!jIubju)”}”(hŒ``psci_warmboot_entrypoint()``”h]”hŒpsci_warmboot_entrypoint()”…””}”(hhh!jxubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jIubhŒ PSCI library interface. The ”…””}”(hŒ PSCI library interface. The ”h!jIubju)”}”(hŒ``max_off_pwrlvl``”h]”hŒmax_off_pwrlvl”…””}”(hhh!j‹ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jIubhŒi (first parameter) denotes the highest power domain level being powered down to or woken up from suspend.”…””}”(hŒi (first parameter) denotes the highest power domain level being powered down to or woken up from suspend.”h!jIubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMìh!j7ubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jÁhhhAj¡hCNubj7)”}”(hŒ‚svc_system_off, svc_system_reset These callbacks are called during PSCI_SYSTEM_OFF and PSCI_SYSTEM_RESET PSCI APIs respectively. ”h]”(j£)”}”(hŒ svc_system_off, svc_system_reset”h]”hŒ svc_system_off, svc_system_reset”…””}”(hj°h!j®ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMóh!jªubj£)”}”(hŒ_These callbacks are called during PSCI_SYSTEM_OFF and PSCI_SYSTEM_RESET PSCI APIs respectively.”h]”hŒ_These callbacks are called during PSCI_SYSTEM_OFF and PSCI_SYSTEM_RESET PSCI APIs respectively.”…””}”(hj¾h!j¼ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMõh!jªubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jÁhhhAj¡hCNubj7)”}”(hXýsvc_migrate_info This callback is called in response to PSCI_MIGRATE_INFO_TYPE or PSCI_MIGRATE_INFO_UP_CPU APIs. The return value of this callback must correspond to the return value of PSCI_MIGRATE_INFO_TYPE API as described in `PSCI spec`_. If the secure payload is a Uniprocessor (UP) implementation, then it must update the mpidr of the CPU it is resident in via ``resident_cpu`` (first argument). The updates to ``resident_cpu`` is ignored if the secure payload is a multiprocessor (MP) implementation. ”h]”(j£)”}”(hŒsvc_migrate_info”h]”hŒsvc_migrate_info”…””}”(hjÖh!jÔubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMøh!jÐubj£)”}”(hXêThis callback is called in response to PSCI_MIGRATE_INFO_TYPE or PSCI_MIGRATE_INFO_UP_CPU APIs. The return value of this callback must correspond to the return value of PSCI_MIGRATE_INFO_TYPE API as described in `PSCI spec`_. If the secure payload is a Uniprocessor (UP) implementation, then it must update the mpidr of the CPU it is resident in via ``resident_cpu`` (first argument). The updates to ``resident_cpu`` is ignored if the secure payload is a multiprocessor (MP) implementation.”h]”(hŒÔThis callback is called in response to PSCI_MIGRATE_INFO_TYPE or PSCI_MIGRATE_INFO_UP_CPU APIs. The return value of this callback must correspond to the return value of PSCI_MIGRATE_INFO_TYPE API as described in ”…””}”(hŒÔThis callback is called in response to PSCI_MIGRATE_INFO_TYPE or PSCI_MIGRATE_INFO_UP_CPU APIs. The return value of this callback must correspond to the return value of PSCI_MIGRATE_INFO_TYPE API as described in ”h!jâubj®)”}”(hŒ`PSCI spec`_”h]”hŒ PSCI spec”…””}”(hŒ PSCI spec”h!jëubah"}”(h$]”h&]”h+]”h-]”h/]”Œname”Œ PSCI spec”jÀjÁuh1jh!jâjÂKubhŒ~. If the secure payload is a Uniprocessor (UP) implementation, then it must update the mpidr of the CPU it is resident in via ”…””}”(hŒ~. If the secure payload is a Uniprocessor (UP) implementation, then it must update the mpidr of the CPU it is resident in via ”h!jâubju)”}”(hŒ``resident_cpu``”h]”hŒresident_cpu”…””}”(hhh!jubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jâubhŒ" (first argument). The updates to ”…””}”(hŒ" (first argument). The updates to ”h!jâubju)”}”(hŒ``resident_cpu``”h]”hŒresident_cpu”…””}”(hhh!jubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jâubhŒJ is ignored if the secure payload is a multiprocessor (MP) implementation.”…””}”(hŒJ is ignored if the secure payload is a multiprocessor (MP) implementation.”h!jâubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMúh!jÐubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jÁhhhAj¡hCNubj7)”}”(hXsvc_migrate This callback is only relevant if the secure payload in EL3 Runtime Software is a Uniprocessor (UP) implementation and supports migration from the current CPU ``from_cpu`` (first argument) to another CPU ``to_cpu`` (second argument). This callback is called in response to PSCI_MIGRATE API. This callback is never called if the secure payload is a Multiprocessor (MP) implementation. ”h]”(j£)”}”(hŒsvc_migrate”h]”hŒsvc_migrate”…””}”(hj9h!j7ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMh!j3ubj£)”}”(hXThis callback is only relevant if the secure payload in EL3 Runtime Software is a Uniprocessor (UP) implementation and supports migration from the current CPU ``from_cpu`` (first argument) to another CPU ``to_cpu`` (second argument). This callback is called in response to PSCI_MIGRATE API. This callback is never called if the secure payload is a Multiprocessor (MP) implementation.”h]”(hŒŸThis callback is only relevant if the secure payload in EL3 Runtime Software is a Uniprocessor (UP) implementation and supports migration from the current CPU ”…””}”(hŒŸThis callback is only relevant if the secure payload in EL3 Runtime Software is a Uniprocessor (UP) implementation and supports migration from the current CPU ”h!jEubju)”}”(hŒ``from_cpu``”h]”hŒfrom_cpu”…””}”(hhh!jNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jEubhŒ! (first argument) to another CPU ”…””}”(hŒ! (first argument) to another CPU ”h!jEubju)”}”(hŒ ``to_cpu``”h]”hŒto_cpu”…””}”(hhh!jaubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jEubhŒ© (second argument). This callback is called in response to PSCI_MIGRATE API. This callback is never called if the secure payload is a Multiprocessor (MP) implementation.”…””}”(hŒ© (second argument). This callback is called in response to PSCI_MIGRATE API. This callback is never called if the secure payload is a Multiprocessor (MP) implementation.”h!jEubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMh!j3ubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j6h!jÁhhhAj¡hCNubeh"}”(h$]”h&]”h+]”h-]”h/]”jÓjÔuh1jhAj¡hCMãh!jNhhubeh"}”(h$]”jWah&]”h+]”Œ(secure payload power management callback”ah-]”h/]”uh1jŒh!jÉhhhAj¡hCMÃjAKubj)”}”(hhh]”(j’)”}”(hŒCPU operations”h]”hŒCPU operations”…””}”(hj’h!jhhhANhCNubah"}”(h$]”h&]”h+]”h-]”h/]”uh1j‘h!jhhhAj¡hCMubj£)”}”(hXâThe CPU operations (cpu_ops) framework implement power down sequence specific to the CPU and the details of which can be found at :ref:`firmware_design_cpu_ops_fwk`. The TF-A tree implements the ``cpu_ops`` for various supported CPUs and the EL3 Runtime Software needs to include the required ``cpu_ops`` in its build. The start and end of the ``cpu_ops`` descriptors must be exported by the EL3 Runtime Software via the ``__CPU_OPS_START__`` and ``__CPU_OPS_END__`` linker symbols.”h]”(hŒ‚The CPU operations (cpu_ops) framework implement power down sequence specific to the CPU and the details of which can be found at ”…””}”(hŒ‚The CPU operations (cpu_ops) framework implement power down sequence specific to the CPU and the details of which can be found at ”h!jžhhhANhCNubh)”}”(hŒ":ref:`firmware_design_cpu_ops_fwk`”h]”h)”}”(hj©h]”hŒfirmware_design_cpu_ops_fwk”…””}”(hhh!j«ubah"}”(h$]”h&]”(h(Œstd”Œstd-ref”eh+]”h-]”h/]”uh1hh!j§ubah"}”(h$]”h&]”h+]”h-]”h/]”Œrefdoc”h9Œ refdomain”jµŒreftype”Œref”Œrefexplicit”‰Œrefwarn”ˆh?Œfirmware_design_cpu_ops_fwk”uh1hhAj¡hCMh!jžubhŒ. The TF-A tree implements the ”…””}”(hŒ. The TF-A tree implements the ”h!jžhhhANhCNubju)”}”(hŒ``cpu_ops``”h]”hŒcpu_ops”…””}”(hhh!jÌubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jžubhŒW for various supported CPUs and the EL3 Runtime Software needs to include the required ”…””}”(hŒW for various supported CPUs and the EL3 Runtime Software needs to include the required ”h!jžhhhANhCNubju)”}”(hŒ``cpu_ops``”h]”hŒcpu_ops”…””}”(hhh!jßubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jžubhŒ( in its build. The start and end of the ”…””}”(hŒ( in its build. The start and end of the ”h!jžhhhANhCNubju)”}”(hŒ``cpu_ops``”h]”hŒcpu_ops”…””}”(hhh!jòubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jžubhŒB descriptors must be exported by the EL3 Runtime Software via the ”…””}”(hŒB descriptors must be exported by the EL3 Runtime Software via the ”h!jžhhhANhCNubju)”}”(hŒ``__CPU_OPS_START__``”h]”hŒ__CPU_OPS_START__”…””}”(hhh!j ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jžubhŒ and ”…””}”(hŒ and ”h!jžhhhANhCNubju)”}”(hŒ``__CPU_OPS_END__``”h]”hŒ__CPU_OPS_END__”…””}”(hhh!j ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!jžubhŒ linker symbols.”…””}”(hŒ linker symbols.”h!jžhhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMh!jhhubj£)”}”(hŒôThe ``cpu_ops`` descriptors also include reset sequences and may include errata workarounds for the CPU. The EL3 Runtime Software can choose to call this during cold/warm reset if it does not implement its own reset sequence/errata workarounds.”h]”(hŒThe ”…””}”(hŒThe ”h!j1 hhhANhCNubju)”}”(hŒ``cpu_ops``”h]”hŒcpu_ops”…””}”(hhh!j: ubah"}”(h$]”h&]”h+]”h-]”h/]”uh1jth!j1 ubhŒå descriptors also include reset sequences and may include errata workarounds for the CPU. The EL3 Runtime Software can choose to call this during cold/warm reset if it does not implement its own reset sequence/errata workarounds.”…””}”(hŒå descriptors also include reset sequences and may include errata workarounds for the CPU. The EL3 Runtime Software can choose to call this during cold/warm reset if it does not implement its own reset sequence/errata workarounds.”h!j1 hhhANhCNubeh"}”(h$]”h&]”h+]”h-]”h/]”uh1j¢hAj¡hCMh!jhhubh Œ transition”“”)”}”(hŒ--------------”h]”h"}”(h$]”h&]”h+]”h-]”h/]”uh1jS hAj¡hCMh!jhhubj£)”}”(hŒM*Copyright (c) 2016-2020, Arm Limited and Contributors. All rights reserved.*”h]”h Œemphasis”“”)”}”(hja •jh]”hŒKCopyright (c) 2016-2020, Arm Limited and Contributors. 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