1 /*
2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #ifndef __MLX5_EN_TC_H__
34 #define __MLX5_EN_TC_H__
35
36 #include <net/pkt_cls.h>
37 #include "en.h"
38 #include "eswitch.h"
39 #include "en/tc_ct.h"
40 #include "en/tc_tun.h"
41 #include "en/tc/int_port.h"
42 #include "en_rep.h"
43
44 #define MLX5E_TC_FLOW_ID_MASK 0x0000ffff
45
46 #ifdef CONFIG_MLX5_ESWITCH
47
48 #define NIC_FLOW_ATTR_SZ (sizeof(struct mlx5_flow_attr) +\
49 sizeof(struct mlx5_nic_flow_attr))
50 #define ESW_FLOW_ATTR_SZ (sizeof(struct mlx5_flow_attr) +\
51 sizeof(struct mlx5_esw_flow_attr))
52 #define ns_to_attr_sz(ns) (((ns) == MLX5_FLOW_NAMESPACE_FDB) ?\
53 ESW_FLOW_ATTR_SZ :\
54 NIC_FLOW_ATTR_SZ)
55
56
57 int mlx5e_tc_num_filters(struct mlx5e_priv *priv, unsigned long flags);
58
59 struct mlx5e_tc_update_priv {
60 struct net_device *fwd_dev;
61 };
62
63 struct mlx5_nic_flow_attr {
64 u32 flow_tag;
65 u32 hairpin_tirn;
66 struct mlx5_flow_table *hairpin_ft;
67 };
68
69 struct mlx5_flow_attr {
70 u32 action;
71 struct mlx5_fc *counter;
72 struct mlx5_modify_hdr *modify_hdr;
73 struct mlx5_ct_attr ct_attr;
74 struct mlx5e_sample_attr *sample_attr;
75 struct mlx5e_tc_flow_parse_attr *parse_attr;
76 u32 chain;
77 u16 prio;
78 u32 dest_chain;
79 struct mlx5_flow_table *ft;
80 struct mlx5_flow_table *dest_ft;
81 u8 inner_match_level;
82 u8 outer_match_level;
83 u8 ip_version;
84 u8 tun_ip_version;
85 u32 flags;
86 union {
87 struct mlx5_esw_flow_attr esw_attr[0];
88 struct mlx5_nic_flow_attr nic_attr[0];
89 };
90 };
91
92 struct mlx5_rx_tun_attr {
93 u16 decap_vport;
94 union {
95 __be32 v4;
96 struct in6_addr v6;
97 } src_ip; /* Valid if decap_vport is not zero */
98 union {
99 __be32 v4;
100 struct in6_addr v6;
101 } dst_ip; /* Valid if decap_vport is not zero */
102 u32 vni;
103 };
104
105 #define MLX5E_TC_TABLE_CHAIN_TAG_BITS 16
106 #define MLX5E_TC_TABLE_CHAIN_TAG_MASK GENMASK(MLX5E_TC_TABLE_CHAIN_TAG_BITS - 1, 0)
107
108 #define MLX5E_TC_MAX_INT_PORT_NUM (8)
109
110 #if IS_ENABLED(CONFIG_MLX5_CLS_ACT)
111
112 struct tunnel_match_key {
113 struct flow_dissector_key_control enc_control;
114 struct flow_dissector_key_keyid enc_key_id;
115 struct flow_dissector_key_ports enc_tp;
116 struct flow_dissector_key_ip enc_ip;
117 union {
118 struct flow_dissector_key_ipv4_addrs enc_ipv4;
119 struct flow_dissector_key_ipv6_addrs enc_ipv6;
120 };
121
122 int filter_ifindex;
123 };
124
125 struct tunnel_match_enc_opts {
126 struct flow_dissector_key_enc_opts key;
127 struct flow_dissector_key_enc_opts mask;
128 };
129
130 /* Tunnel_id mapping is TUNNEL_INFO_BITS + ENC_OPTS_BITS.
131 * Upper TUNNEL_INFO_BITS for general tunnel info.
132 * Lower ENC_OPTS_BITS bits for enc_opts.
133 */
134 #define TUNNEL_INFO_BITS 12
135 #define TUNNEL_INFO_BITS_MASK GENMASK(TUNNEL_INFO_BITS - 1, 0)
136 #define ENC_OPTS_BITS 11
137 #define ENC_OPTS_BITS_MASK GENMASK(ENC_OPTS_BITS - 1, 0)
138 #define TUNNEL_ID_BITS (TUNNEL_INFO_BITS + ENC_OPTS_BITS)
139 #define TUNNEL_ID_MASK GENMASK(TUNNEL_ID_BITS - 1, 0)
140
141 enum {
142 MLX5E_TC_FLAG_INGRESS_BIT,
143 MLX5E_TC_FLAG_EGRESS_BIT,
144 MLX5E_TC_FLAG_NIC_OFFLOAD_BIT,
145 MLX5E_TC_FLAG_ESW_OFFLOAD_BIT,
146 MLX5E_TC_FLAG_FT_OFFLOAD_BIT,
147 MLX5E_TC_FLAG_LAST_EXPORTED_BIT = MLX5E_TC_FLAG_FT_OFFLOAD_BIT,
148 };
149
150 #define MLX5_TC_FLAG(flag) BIT(MLX5E_TC_FLAG_##flag##_BIT)
151
152 int mlx5e_tc_esw_init(struct rhashtable *tc_ht);
153 void mlx5e_tc_esw_cleanup(struct rhashtable *tc_ht);
154 bool mlx5e_is_eswitch_flow(struct mlx5e_tc_flow *flow);
155
156 int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv,
157 struct flow_cls_offload *f, unsigned long flags);
158 int mlx5e_delete_flower(struct net_device *dev, struct mlx5e_priv *priv,
159 struct flow_cls_offload *f, unsigned long flags);
160
161 int mlx5e_stats_flower(struct net_device *dev, struct mlx5e_priv *priv,
162 struct flow_cls_offload *f, unsigned long flags);
163
164 int mlx5e_tc_configure_matchall(struct mlx5e_priv *priv,
165 struct tc_cls_matchall_offload *f);
166 int mlx5e_tc_delete_matchall(struct mlx5e_priv *priv,
167 struct tc_cls_matchall_offload *f);
168 void mlx5e_tc_stats_matchall(struct mlx5e_priv *priv,
169 struct tc_cls_matchall_offload *ma);
170
171 struct mlx5e_encap_entry;
172 void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,
173 struct mlx5e_encap_entry *e,
174 struct list_head *flow_list);
175 void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv,
176 struct mlx5e_encap_entry *e,
177 struct list_head *flow_list);
178 bool mlx5e_encap_take(struct mlx5e_encap_entry *e);
179 void mlx5e_encap_put(struct mlx5e_priv *priv, struct mlx5e_encap_entry *e);
180
181 void mlx5e_take_all_encap_flows(struct mlx5e_encap_entry *e, struct list_head *flow_list);
182 void mlx5e_put_flow_list(struct mlx5e_priv *priv, struct list_head *flow_list);
183
184 struct mlx5e_neigh_hash_entry;
185 struct mlx5e_encap_entry *
186 mlx5e_get_next_init_encap(struct mlx5e_neigh_hash_entry *nhe,
187 struct mlx5e_encap_entry *e);
188 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe);
189
190 void mlx5e_tc_reoffload_flows_work(struct work_struct *work);
191
192 enum mlx5e_tc_attr_to_reg {
193 CHAIN_TO_REG,
194 VPORT_TO_REG,
195 TUNNEL_TO_REG,
196 CTSTATE_TO_REG,
197 ZONE_TO_REG,
198 ZONE_RESTORE_TO_REG,
199 MARK_TO_REG,
200 LABELS_TO_REG,
201 FTEID_TO_REG,
202 NIC_CHAIN_TO_REG,
203 NIC_ZONE_RESTORE_TO_REG,
204 };
205
206 struct mlx5e_tc_attr_to_reg_mapping {
207 int mfield; /* rewrite field */
208 int moffset; /* bit offset of mfield */
209 int mlen; /* bits to rewrite/match */
210
211 int soffset; /* byte offset of spec for match */
212 };
213
214 extern struct mlx5e_tc_attr_to_reg_mapping mlx5e_tc_attr_to_reg_mappings[];
215
216 bool mlx5e_is_valid_eswitch_fwd_dev(struct mlx5e_priv *priv,
217 struct net_device *out_dev);
218
219 int mlx5e_tc_match_to_reg_set(struct mlx5_core_dev *mdev,
220 struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
221 enum mlx5_flow_namespace_type ns,
222 enum mlx5e_tc_attr_to_reg type,
223 u32 data);
224
225 void mlx5e_tc_match_to_reg_mod_hdr_change(struct mlx5_core_dev *mdev,
226 struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
227 enum mlx5e_tc_attr_to_reg type,
228 int act_id, u32 data);
229
230 void mlx5e_tc_match_to_reg_match(struct mlx5_flow_spec *spec,
231 enum mlx5e_tc_attr_to_reg type,
232 u32 data,
233 u32 mask);
234
235 void mlx5e_tc_match_to_reg_get_match(struct mlx5_flow_spec *spec,
236 enum mlx5e_tc_attr_to_reg type,
237 u32 *data,
238 u32 *mask);
239
240 int mlx5e_tc_match_to_reg_set_and_get_id(struct mlx5_core_dev *mdev,
241 struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
242 enum mlx5_flow_namespace_type ns,
243 enum mlx5e_tc_attr_to_reg type,
244 u32 data);
245
246 int mlx5e_tc_add_flow_mod_hdr(struct mlx5e_priv *priv,
247 struct mlx5e_tc_flow_parse_attr *parse_attr,
248 struct mlx5e_tc_flow *flow);
249
250 int alloc_mod_hdr_actions(struct mlx5_core_dev *mdev,
251 int namespace,
252 struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts);
253 void dealloc_mod_hdr_actions(struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts);
254
255 struct mlx5e_tc_flow;
256 u32 mlx5e_tc_get_flow_tun_id(struct mlx5e_tc_flow *flow);
257
258 void mlx5e_tc_set_ethertype(struct mlx5_core_dev *mdev,
259 struct flow_match_basic *match, bool outer,
260 void *headers_c, void *headers_v);
261
262 int mlx5e_tc_nic_init(struct mlx5e_priv *priv);
263 void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv);
264
265 int mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
266 void *cb_priv);
267
268 struct mlx5_flow_handle *
269 mlx5e_add_offloaded_nic_rule(struct mlx5e_priv *priv,
270 struct mlx5_flow_spec *spec,
271 struct mlx5_flow_attr *attr);
272 void mlx5e_del_offloaded_nic_rule(struct mlx5e_priv *priv,
273 struct mlx5_flow_handle *rule,
274 struct mlx5_flow_attr *attr);
275
276 struct mlx5_flow_handle *
277 mlx5_tc_rule_insert(struct mlx5e_priv *priv,
278 struct mlx5_flow_spec *spec,
279 struct mlx5_flow_attr *attr);
280 void
281 mlx5_tc_rule_delete(struct mlx5e_priv *priv,
282 struct mlx5_flow_handle *rule,
283 struct mlx5_flow_attr *attr);
284
285 bool mlx5e_tc_is_vf_tunnel(struct net_device *out_dev, struct net_device *route_dev);
286 int mlx5e_tc_query_route_vport(struct net_device *out_dev, struct net_device *route_dev,
287 u16 *vport);
288
289 int mlx5e_set_fwd_to_int_port_actions(struct mlx5e_priv *priv,
290 struct mlx5_flow_attr *attr,
291 int ifindex,
292 enum mlx5e_tc_int_port_type type,
293 u32 *action,
294 int out_index);
295 #else /* CONFIG_MLX5_CLS_ACT */
mlx5e_tc_nic_init(struct mlx5e_priv * priv)296 static inline int mlx5e_tc_nic_init(struct mlx5e_priv *priv) { return 0; }
mlx5e_tc_nic_cleanup(struct mlx5e_priv * priv)297 static inline void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv) {}
298 static inline int
mlx5e_setup_tc_block_cb(enum tc_setup_type type,void * type_data,void * cb_priv)299 mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data, void *cb_priv)
300 { return -EOPNOTSUPP; }
301
302 #endif /* CONFIG_MLX5_CLS_ACT */
303
304 struct mlx5_flow_attr *mlx5_alloc_flow_attr(enum mlx5_flow_namespace_type type);
305
306 struct mlx5_flow_handle *
307 mlx5e_add_offloaded_nic_rule(struct mlx5e_priv *priv,
308 struct mlx5_flow_spec *spec,
309 struct mlx5_flow_attr *attr);
310 void mlx5e_del_offloaded_nic_rule(struct mlx5e_priv *priv,
311 struct mlx5_flow_handle *rule,
312 struct mlx5_flow_attr *attr);
313
314 #else /* CONFIG_MLX5_ESWITCH */
mlx5e_tc_nic_init(struct mlx5e_priv * priv)315 static inline int mlx5e_tc_nic_init(struct mlx5e_priv *priv) { return 0; }
mlx5e_tc_nic_cleanup(struct mlx5e_priv * priv)316 static inline void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv) {}
mlx5e_tc_num_filters(struct mlx5e_priv * priv,unsigned long flags)317 static inline int mlx5e_tc_num_filters(struct mlx5e_priv *priv,
318 unsigned long flags)
319 {
320 return 0;
321 }
322
323 static inline int
mlx5e_setup_tc_block_cb(enum tc_setup_type type,void * type_data,void * cb_priv)324 mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data, void *cb_priv)
325 { return -EOPNOTSUPP; }
326 #endif
327
328 #if IS_ENABLED(CONFIG_MLX5_CLS_ACT)
mlx5e_cqe_regb_chain(struct mlx5_cqe64 * cqe)329 static inline bool mlx5e_cqe_regb_chain(struct mlx5_cqe64 *cqe)
330 {
331 #if IS_ENABLED(CONFIG_NET_TC_SKB_EXT)
332 u32 chain, reg_b;
333
334 reg_b = be32_to_cpu(cqe->ft_metadata);
335
336 if (reg_b >> (MLX5E_TC_TABLE_CHAIN_TAG_BITS + ESW_ZONE_ID_BITS))
337 return false;
338
339 chain = reg_b & MLX5E_TC_TABLE_CHAIN_TAG_MASK;
340 if (chain)
341 return true;
342 #endif
343
344 return false;
345 }
346
347 bool mlx5e_tc_update_skb(struct mlx5_cqe64 *cqe, struct sk_buff *skb);
348 #else /* CONFIG_MLX5_CLS_ACT */
mlx5e_cqe_regb_chain(struct mlx5_cqe64 * cqe)349 static inline bool mlx5e_cqe_regb_chain(struct mlx5_cqe64 *cqe)
350 { return false; }
351 static inline bool
mlx5e_tc_update_skb(struct mlx5_cqe64 * cqe,struct sk_buff * skb)352 mlx5e_tc_update_skb(struct mlx5_cqe64 *cqe, struct sk_buff *skb)
353 { return true; }
354 #endif
355
356 #endif /* __MLX5_EN_TC_H__ */
357