1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Atlantic Network Driver
3 *
4 * Copyright (C) 2014-2019 aQuantia Corporation
5 * Copyright (C) 2019-2020 Marvell International Ltd.
6 */
7
8 /* File aq_nic.c: Definition of common code for NIC. */
9
10 #include "aq_nic.h"
11 #include "aq_ring.h"
12 #include "aq_vec.h"
13 #include "aq_hw.h"
14 #include "aq_pci_func.h"
15 #include "aq_macsec.h"
16 #include "aq_main.h"
17 #include "aq_phy.h"
18 #include "aq_ptp.h"
19 #include "aq_filters.h"
20
21 #include <linux/moduleparam.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/timer.h>
25 #include <linux/cpu.h>
26 #include <linux/ip.h>
27 #include <linux/tcp.h>
28 #include <net/ip.h>
29 #include <net/pkt_cls.h>
30
31 static unsigned int aq_itr = AQ_CFG_INTERRUPT_MODERATION_AUTO;
32 module_param_named(aq_itr, aq_itr, uint, 0644);
33 MODULE_PARM_DESC(aq_itr, "Interrupt throttling mode");
34
35 static unsigned int aq_itr_tx;
36 module_param_named(aq_itr_tx, aq_itr_tx, uint, 0644);
37 MODULE_PARM_DESC(aq_itr_tx, "TX interrupt throttle rate");
38
39 static unsigned int aq_itr_rx;
40 module_param_named(aq_itr_rx, aq_itr_rx, uint, 0644);
41 MODULE_PARM_DESC(aq_itr_rx, "RX interrupt throttle rate");
42
43 static void aq_nic_update_ndev_stats(struct aq_nic_s *self);
44
aq_nic_rss_init(struct aq_nic_s * self,unsigned int num_rss_queues)45 static void aq_nic_rss_init(struct aq_nic_s *self, unsigned int num_rss_queues)
46 {
47 static u8 rss_key[AQ_CFG_RSS_HASHKEY_SIZE] = {
48 0x1e, 0xad, 0x71, 0x87, 0x65, 0xfc, 0x26, 0x7d,
49 0x0d, 0x45, 0x67, 0x74, 0xcd, 0x06, 0x1a, 0x18,
50 0xb6, 0xc1, 0xf0, 0xc7, 0xbb, 0x18, 0xbe, 0xf8,
51 0x19, 0x13, 0x4b, 0xa9, 0xd0, 0x3e, 0xfe, 0x70,
52 0x25, 0x03, 0xab, 0x50, 0x6a, 0x8b, 0x82, 0x0c
53 };
54 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
55 struct aq_rss_parameters *rss_params;
56 int i = 0;
57
58 rss_params = &cfg->aq_rss;
59
60 rss_params->hash_secret_key_size = sizeof(rss_key);
61 memcpy(rss_params->hash_secret_key, rss_key, sizeof(rss_key));
62 rss_params->indirection_table_size = AQ_CFG_RSS_INDIRECTION_TABLE_MAX;
63
64 for (i = rss_params->indirection_table_size; i--;)
65 rss_params->indirection_table[i] = i & (num_rss_queues - 1);
66 }
67
68 /* Recalculate the number of vectors */
aq_nic_cfg_update_num_vecs(struct aq_nic_s * self)69 static void aq_nic_cfg_update_num_vecs(struct aq_nic_s *self)
70 {
71 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
72
73 cfg->vecs = min(cfg->aq_hw_caps->vecs, AQ_CFG_VECS_DEF);
74 cfg->vecs = min(cfg->vecs, num_online_cpus());
75 if (self->irqvecs > AQ_HW_SERVICE_IRQS)
76 cfg->vecs = min(cfg->vecs, self->irqvecs - AQ_HW_SERVICE_IRQS);
77 /* cfg->vecs should be power of 2 for RSS */
78 cfg->vecs = rounddown_pow_of_two(cfg->vecs);
79
80 if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ANTIGUA)) {
81 if (cfg->tcs > 2)
82 cfg->vecs = min(cfg->vecs, 4U);
83 }
84
85 if (cfg->vecs <= 4)
86 cfg->tc_mode = AQ_TC_MODE_8TCS;
87 else
88 cfg->tc_mode = AQ_TC_MODE_4TCS;
89
90 /*rss rings */
91 cfg->num_rss_queues = min(cfg->vecs, AQ_CFG_NUM_RSS_QUEUES_DEF);
92 aq_nic_rss_init(self, cfg->num_rss_queues);
93 }
94
95 /* Checks hw_caps and 'corrects' aq_nic_cfg in runtime */
aq_nic_cfg_start(struct aq_nic_s * self)96 void aq_nic_cfg_start(struct aq_nic_s *self)
97 {
98 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
99 int i;
100
101 cfg->tcs = AQ_CFG_TCS_DEF;
102
103 cfg->is_polling = AQ_CFG_IS_POLLING_DEF;
104
105 cfg->itr = aq_itr;
106 cfg->tx_itr = aq_itr_tx;
107 cfg->rx_itr = aq_itr_rx;
108
109 cfg->rxpageorder = AQ_CFG_RX_PAGEORDER;
110 cfg->is_rss = AQ_CFG_IS_RSS_DEF;
111 cfg->aq_rss.base_cpu_number = AQ_CFG_RSS_BASE_CPU_NUM_DEF;
112 cfg->fc.req = AQ_CFG_FC_MODE;
113 cfg->wol = AQ_CFG_WOL_MODES;
114
115 cfg->mtu = AQ_CFG_MTU_DEF;
116 cfg->link_speed_msk = AQ_CFG_SPEED_MSK;
117 cfg->is_autoneg = AQ_CFG_IS_AUTONEG_DEF;
118
119 cfg->is_lro = AQ_CFG_IS_LRO_DEF;
120 cfg->is_ptp = true;
121
122 /*descriptors */
123 cfg->rxds = min(cfg->aq_hw_caps->rxds_max, AQ_CFG_RXDS_DEF);
124 cfg->txds = min(cfg->aq_hw_caps->txds_max, AQ_CFG_TXDS_DEF);
125
126 aq_nic_cfg_update_num_vecs(self);
127
128 cfg->irq_type = aq_pci_func_get_irq_type(self);
129
130 if ((cfg->irq_type == AQ_HW_IRQ_LEGACY) ||
131 (cfg->aq_hw_caps->vecs == 1U) ||
132 (cfg->vecs == 1U)) {
133 cfg->is_rss = 0U;
134 cfg->vecs = 1U;
135 }
136
137 /* Check if we have enough vectors allocated for
138 * link status IRQ. If no - we'll know link state from
139 * slower service task.
140 */
141 if (AQ_HW_SERVICE_IRQS > 0 && cfg->vecs + 1 <= self->irqvecs)
142 cfg->link_irq_vec = cfg->vecs;
143 else
144 cfg->link_irq_vec = 0;
145
146 cfg->link_speed_msk &= cfg->aq_hw_caps->link_speed_msk;
147 cfg->features = cfg->aq_hw_caps->hw_features;
148 cfg->is_vlan_rx_strip = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_RX);
149 cfg->is_vlan_tx_insert = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_TX);
150 cfg->is_vlan_force_promisc = true;
151
152 for (i = 0; i < sizeof(cfg->prio_tc_map); i++)
153 cfg->prio_tc_map[i] = cfg->tcs * i / 8;
154 }
155
aq_nic_update_link_status(struct aq_nic_s * self)156 static int aq_nic_update_link_status(struct aq_nic_s *self)
157 {
158 int err = self->aq_fw_ops->update_link_status(self->aq_hw);
159 u32 fc = 0;
160
161 if (err)
162 return err;
163
164 if (self->aq_fw_ops->get_flow_control)
165 self->aq_fw_ops->get_flow_control(self->aq_hw, &fc);
166 self->aq_nic_cfg.fc.cur = fc;
167
168 if (self->link_status.mbps != self->aq_hw->aq_link_status.mbps) {
169 netdev_info(self->ndev, "%s: link change old %d new %d\n",
170 AQ_CFG_DRV_NAME, self->link_status.mbps,
171 self->aq_hw->aq_link_status.mbps);
172 aq_nic_update_interrupt_moderation_settings(self);
173
174 if (self->aq_ptp) {
175 aq_ptp_clock_init(self);
176 aq_ptp_tm_offset_set(self,
177 self->aq_hw->aq_link_status.mbps);
178 aq_ptp_link_change(self);
179 }
180
181 /* Driver has to update flow control settings on RX block
182 * on any link event.
183 * We should query FW whether it negotiated FC.
184 */
185 if (self->aq_hw_ops->hw_set_fc)
186 self->aq_hw_ops->hw_set_fc(self->aq_hw, fc, 0);
187 }
188
189 self->link_status = self->aq_hw->aq_link_status;
190 if (!netif_carrier_ok(self->ndev) && self->link_status.mbps) {
191 aq_utils_obj_set(&self->flags,
192 AQ_NIC_FLAG_STARTED);
193 aq_utils_obj_clear(&self->flags,
194 AQ_NIC_LINK_DOWN);
195 netif_carrier_on(self->ndev);
196 #if IS_ENABLED(CONFIG_MACSEC)
197 aq_macsec_enable(self);
198 #endif
199 if (self->aq_hw_ops->hw_tc_rate_limit_set)
200 self->aq_hw_ops->hw_tc_rate_limit_set(self->aq_hw);
201
202 netif_tx_wake_all_queues(self->ndev);
203 }
204 if (netif_carrier_ok(self->ndev) && !self->link_status.mbps) {
205 netif_carrier_off(self->ndev);
206 netif_tx_disable(self->ndev);
207 aq_utils_obj_set(&self->flags, AQ_NIC_LINK_DOWN);
208 }
209
210 return 0;
211 }
212
aq_linkstate_threaded_isr(int irq,void * private)213 static irqreturn_t aq_linkstate_threaded_isr(int irq, void *private)
214 {
215 struct aq_nic_s *self = private;
216
217 if (!self)
218 return IRQ_NONE;
219
220 aq_nic_update_link_status(self);
221
222 self->aq_hw_ops->hw_irq_enable(self->aq_hw,
223 BIT(self->aq_nic_cfg.link_irq_vec));
224
225 return IRQ_HANDLED;
226 }
227
aq_nic_service_task(struct work_struct * work)228 static void aq_nic_service_task(struct work_struct *work)
229 {
230 struct aq_nic_s *self = container_of(work, struct aq_nic_s,
231 service_task);
232 int err;
233
234 aq_ptp_service_task(self);
235
236 if (aq_utils_obj_test(&self->flags, AQ_NIC_FLAGS_IS_NOT_READY))
237 return;
238
239 err = aq_nic_update_link_status(self);
240 if (err)
241 return;
242
243 #if IS_ENABLED(CONFIG_MACSEC)
244 aq_macsec_work(self);
245 #endif
246
247 mutex_lock(&self->fwreq_mutex);
248 if (self->aq_fw_ops->update_stats)
249 self->aq_fw_ops->update_stats(self->aq_hw);
250 mutex_unlock(&self->fwreq_mutex);
251
252 aq_nic_update_ndev_stats(self);
253 }
254
aq_nic_service_timer_cb(struct timer_list * t)255 static void aq_nic_service_timer_cb(struct timer_list *t)
256 {
257 struct aq_nic_s *self = from_timer(self, t, service_timer);
258
259 mod_timer(&self->service_timer,
260 jiffies + AQ_CFG_SERVICE_TIMER_INTERVAL);
261
262 aq_ndev_schedule_work(&self->service_task);
263 }
264
aq_nic_polling_timer_cb(struct timer_list * t)265 static void aq_nic_polling_timer_cb(struct timer_list *t)
266 {
267 struct aq_nic_s *self = from_timer(self, t, polling_timer);
268 struct aq_vec_s *aq_vec = NULL;
269 unsigned int i = 0U;
270
271 for (i = 0U, aq_vec = self->aq_vec[0];
272 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i])
273 aq_vec_isr(i, (void *)aq_vec);
274
275 mod_timer(&self->polling_timer, jiffies +
276 AQ_CFG_POLLING_TIMER_INTERVAL);
277 }
278
aq_nic_hw_prepare(struct aq_nic_s * self)279 static int aq_nic_hw_prepare(struct aq_nic_s *self)
280 {
281 int err = 0;
282
283 err = self->aq_hw_ops->hw_soft_reset(self->aq_hw);
284 if (err)
285 goto exit;
286
287 err = self->aq_hw_ops->hw_prepare(self->aq_hw, &self->aq_fw_ops);
288
289 exit:
290 return err;
291 }
292
aq_nic_is_valid_ether_addr(const u8 * addr)293 static bool aq_nic_is_valid_ether_addr(const u8 *addr)
294 {
295 /* Some engineering samples of Aquantia NICs are provisioned with a
296 * partially populated MAC, which is still invalid.
297 */
298 return !(addr[0] == 0 && addr[1] == 0 && addr[2] == 0);
299 }
300
aq_nic_ndev_register(struct aq_nic_s * self)301 int aq_nic_ndev_register(struct aq_nic_s *self)
302 {
303 u8 addr[ETH_ALEN];
304 int err = 0;
305
306 if (!self->ndev) {
307 err = -EINVAL;
308 goto err_exit;
309 }
310
311 err = aq_nic_hw_prepare(self);
312 if (err)
313 goto err_exit;
314
315 #if IS_ENABLED(CONFIG_MACSEC)
316 aq_macsec_init(self);
317 #endif
318
319 if (platform_get_ethdev_address(&self->pdev->dev, self->ndev) != 0) {
320 // If DT has none or an invalid one, ask device for MAC address
321 mutex_lock(&self->fwreq_mutex);
322 err = self->aq_fw_ops->get_mac_permanent(self->aq_hw, addr);
323 mutex_unlock(&self->fwreq_mutex);
324
325 if (err)
326 goto err_exit;
327
328 if (is_valid_ether_addr(addr) &&
329 aq_nic_is_valid_ether_addr(addr)) {
330 eth_hw_addr_set(self->ndev, addr);
331 } else {
332 netdev_warn(self->ndev, "MAC is invalid, will use random.");
333 eth_hw_addr_random(self->ndev);
334 }
335 }
336
337 #if defined(AQ_CFG_MAC_ADDR_PERMANENT)
338 {
339 static u8 mac_addr_permanent[] = AQ_CFG_MAC_ADDR_PERMANENT;
340
341 eth_hw_addr_set(self->ndev, mac_addr_permanent);
342 }
343 #endif
344
345 for (self->aq_vecs = 0; self->aq_vecs < aq_nic_get_cfg(self)->vecs;
346 self->aq_vecs++) {
347 self->aq_vec[self->aq_vecs] =
348 aq_vec_alloc(self, self->aq_vecs, aq_nic_get_cfg(self));
349 if (!self->aq_vec[self->aq_vecs]) {
350 err = -ENOMEM;
351 goto err_exit;
352 }
353 }
354
355 netif_carrier_off(self->ndev);
356
357 netif_tx_disable(self->ndev);
358
359 err = register_netdev(self->ndev);
360 if (err)
361 goto err_exit;
362
363 err_exit:
364 #if IS_ENABLED(CONFIG_MACSEC)
365 if (err)
366 aq_macsec_free(self);
367 #endif
368 return err;
369 }
370
aq_nic_ndev_init(struct aq_nic_s * self)371 void aq_nic_ndev_init(struct aq_nic_s *self)
372 {
373 const struct aq_hw_caps_s *aq_hw_caps = self->aq_nic_cfg.aq_hw_caps;
374 struct aq_nic_cfg_s *aq_nic_cfg = &self->aq_nic_cfg;
375
376 self->ndev->hw_features |= aq_hw_caps->hw_features;
377 self->ndev->features = aq_hw_caps->hw_features;
378 self->ndev->vlan_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
379 NETIF_F_RXHASH | NETIF_F_SG |
380 NETIF_F_LRO | NETIF_F_TSO | NETIF_F_TSO6;
381 self->ndev->gso_partial_features = NETIF_F_GSO_UDP_L4;
382 self->ndev->priv_flags = aq_hw_caps->hw_priv_flags;
383 self->ndev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
384
385 self->msg_enable = NETIF_MSG_DRV | NETIF_MSG_LINK;
386 self->ndev->mtu = aq_nic_cfg->mtu - ETH_HLEN;
387 self->ndev->max_mtu = aq_hw_caps->mtu - ETH_FCS_LEN - ETH_HLEN;
388
389 }
390
aq_nic_set_tx_ring(struct aq_nic_s * self,unsigned int idx,struct aq_ring_s * ring)391 void aq_nic_set_tx_ring(struct aq_nic_s *self, unsigned int idx,
392 struct aq_ring_s *ring)
393 {
394 self->aq_ring_tx[idx] = ring;
395 }
396
aq_nic_get_ndev(struct aq_nic_s * self)397 struct net_device *aq_nic_get_ndev(struct aq_nic_s *self)
398 {
399 return self->ndev;
400 }
401
aq_nic_init(struct aq_nic_s * self)402 int aq_nic_init(struct aq_nic_s *self)
403 {
404 struct aq_vec_s *aq_vec = NULL;
405 unsigned int i = 0U;
406 int err = 0;
407
408 self->power_state = AQ_HW_POWER_STATE_D0;
409 mutex_lock(&self->fwreq_mutex);
410 err = self->aq_hw_ops->hw_reset(self->aq_hw);
411 mutex_unlock(&self->fwreq_mutex);
412 if (err < 0)
413 goto err_exit;
414 /* Restore default settings */
415 aq_nic_set_downshift(self, self->aq_nic_cfg.downshift_counter);
416 aq_nic_set_media_detect(self, self->aq_nic_cfg.is_media_detect ?
417 AQ_HW_MEDIA_DETECT_CNT : 0);
418
419 err = self->aq_hw_ops->hw_init(self->aq_hw,
420 aq_nic_get_ndev(self)->dev_addr);
421 if (err < 0)
422 goto err_exit;
423
424 if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ATLANTIC) &&
425 self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_TP) {
426 self->aq_hw->phy_id = HW_ATL_PHY_ID_MAX;
427 err = aq_phy_init(self->aq_hw);
428
429 /* Disable the PTP on NICs where it's known to cause datapath
430 * problems.
431 * Ideally this should have been done by PHY provisioning, but
432 * many units have been shipped with enabled PTP block already.
433 */
434 if (self->aq_nic_cfg.aq_hw_caps->quirks & AQ_NIC_QUIRK_BAD_PTP)
435 if (self->aq_hw->phy_id != HW_ATL_PHY_ID_MAX)
436 aq_phy_disable_ptp(self->aq_hw);
437 }
438
439 for (i = 0U; i < self->aq_vecs; i++) {
440 aq_vec = self->aq_vec[i];
441 err = aq_vec_ring_alloc(aq_vec, self, i,
442 aq_nic_get_cfg(self));
443 if (err)
444 goto err_exit;
445
446 aq_vec_init(aq_vec, self->aq_hw_ops, self->aq_hw);
447 }
448
449 if (aq_nic_get_cfg(self)->is_ptp) {
450 err = aq_ptp_init(self, self->irqvecs - 1);
451 if (err < 0)
452 goto err_exit;
453
454 err = aq_ptp_ring_alloc(self);
455 if (err < 0)
456 goto err_exit;
457
458 err = aq_ptp_ring_init(self);
459 if (err < 0)
460 goto err_exit;
461 }
462
463 netif_carrier_off(self->ndev);
464
465 err_exit:
466 return err;
467 }
468
aq_nic_start(struct aq_nic_s * self)469 int aq_nic_start(struct aq_nic_s *self)
470 {
471 struct aq_vec_s *aq_vec = NULL;
472 struct aq_nic_cfg_s *cfg;
473 unsigned int i = 0U;
474 int err = 0;
475
476 cfg = aq_nic_get_cfg(self);
477
478 err = self->aq_hw_ops->hw_multicast_list_set(self->aq_hw,
479 self->mc_list.ar,
480 self->mc_list.count);
481 if (err < 0)
482 goto err_exit;
483
484 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw,
485 self->packet_filter);
486 if (err < 0)
487 goto err_exit;
488
489 for (i = 0U, aq_vec = self->aq_vec[0];
490 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) {
491 err = aq_vec_start(aq_vec);
492 if (err < 0)
493 goto err_exit;
494 }
495
496 err = aq_ptp_ring_start(self);
497 if (err < 0)
498 goto err_exit;
499
500 aq_nic_set_loopback(self);
501
502 err = self->aq_hw_ops->hw_start(self->aq_hw);
503 if (err < 0)
504 goto err_exit;
505
506 err = aq_nic_update_interrupt_moderation_settings(self);
507 if (err)
508 goto err_exit;
509
510 INIT_WORK(&self->service_task, aq_nic_service_task);
511
512 timer_setup(&self->service_timer, aq_nic_service_timer_cb, 0);
513 aq_nic_service_timer_cb(&self->service_timer);
514
515 if (cfg->is_polling) {
516 timer_setup(&self->polling_timer, aq_nic_polling_timer_cb, 0);
517 mod_timer(&self->polling_timer, jiffies +
518 AQ_CFG_POLLING_TIMER_INTERVAL);
519 } else {
520 for (i = 0U, aq_vec = self->aq_vec[0];
521 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) {
522 err = aq_pci_func_alloc_irq(self, i, self->ndev->name,
523 aq_vec_isr, aq_vec,
524 aq_vec_get_affinity_mask(aq_vec));
525 if (err < 0)
526 goto err_exit;
527 }
528
529 err = aq_ptp_irq_alloc(self);
530 if (err < 0)
531 goto err_exit;
532
533 if (cfg->link_irq_vec) {
534 int irqvec = pci_irq_vector(self->pdev,
535 cfg->link_irq_vec);
536 err = request_threaded_irq(irqvec, NULL,
537 aq_linkstate_threaded_isr,
538 IRQF_SHARED | IRQF_ONESHOT,
539 self->ndev->name, self);
540 if (err < 0)
541 goto err_exit;
542 self->msix_entry_mask |= (1 << cfg->link_irq_vec);
543 }
544
545 err = self->aq_hw_ops->hw_irq_enable(self->aq_hw,
546 AQ_CFG_IRQ_MASK);
547 if (err < 0)
548 goto err_exit;
549 }
550
551 err = netif_set_real_num_tx_queues(self->ndev,
552 self->aq_vecs * cfg->tcs);
553 if (err < 0)
554 goto err_exit;
555
556 err = netif_set_real_num_rx_queues(self->ndev,
557 self->aq_vecs * cfg->tcs);
558 if (err < 0)
559 goto err_exit;
560
561 for (i = 0; i < cfg->tcs; i++) {
562 u16 offset = self->aq_vecs * i;
563
564 netdev_set_tc_queue(self->ndev, i, self->aq_vecs, offset);
565 }
566 netif_tx_start_all_queues(self->ndev);
567
568 err_exit:
569 return err;
570 }
571
aq_nic_map_skb(struct aq_nic_s * self,struct sk_buff * skb,struct aq_ring_s * ring)572 unsigned int aq_nic_map_skb(struct aq_nic_s *self, struct sk_buff *skb,
573 struct aq_ring_s *ring)
574 {
575 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
576 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);
577 struct device *dev = aq_nic_get_dev(self);
578 struct aq_ring_buff_s *first = NULL;
579 u8 ipver = ip_hdr(skb)->version;
580 struct aq_ring_buff_s *dx_buff;
581 bool need_context_tag = false;
582 unsigned int frag_count = 0U;
583 unsigned int ret = 0U;
584 unsigned int dx;
585 u8 l4proto = 0;
586
587 if (ipver == 4)
588 l4proto = ip_hdr(skb)->protocol;
589 else if (ipver == 6)
590 l4proto = ipv6_hdr(skb)->nexthdr;
591
592 dx = ring->sw_tail;
593 dx_buff = &ring->buff_ring[dx];
594 dx_buff->flags = 0U;
595
596 if (unlikely(skb_is_gso(skb))) {
597 dx_buff->mss = skb_shinfo(skb)->gso_size;
598 if (l4proto == IPPROTO_TCP) {
599 dx_buff->is_gso_tcp = 1U;
600 dx_buff->len_l4 = tcp_hdrlen(skb);
601 } else if (l4proto == IPPROTO_UDP) {
602 dx_buff->is_gso_udp = 1U;
603 dx_buff->len_l4 = sizeof(struct udphdr);
604 /* UDP GSO Hardware does not replace packet length. */
605 udp_hdr(skb)->len = htons(dx_buff->mss +
606 dx_buff->len_l4);
607 } else {
608 WARN_ONCE(true, "Bad GSO mode");
609 goto exit;
610 }
611 dx_buff->len_pkt = skb->len;
612 dx_buff->len_l2 = ETH_HLEN;
613 dx_buff->len_l3 = skb_network_header_len(skb);
614 dx_buff->eop_index = 0xffffU;
615 dx_buff->is_ipv6 = (ipver == 6);
616 need_context_tag = true;
617 }
618
619 if (cfg->is_vlan_tx_insert && skb_vlan_tag_present(skb)) {
620 dx_buff->vlan_tx_tag = skb_vlan_tag_get(skb);
621 dx_buff->len_pkt = skb->len;
622 dx_buff->is_vlan = 1U;
623 need_context_tag = true;
624 }
625
626 if (need_context_tag) {
627 dx = aq_ring_next_dx(ring, dx);
628 dx_buff = &ring->buff_ring[dx];
629 dx_buff->flags = 0U;
630 ++ret;
631 }
632
633 dx_buff->len = skb_headlen(skb);
634 dx_buff->pa = dma_map_single(dev,
635 skb->data,
636 dx_buff->len,
637 DMA_TO_DEVICE);
638
639 if (unlikely(dma_mapping_error(dev, dx_buff->pa))) {
640 ret = 0;
641 goto exit;
642 }
643
644 first = dx_buff;
645 dx_buff->len_pkt = skb->len;
646 dx_buff->is_sop = 1U;
647 dx_buff->is_mapped = 1U;
648 ++ret;
649
650 if (skb->ip_summed == CHECKSUM_PARTIAL) {
651 dx_buff->is_ip_cso = (htons(ETH_P_IP) == skb->protocol);
652 dx_buff->is_tcp_cso = (l4proto == IPPROTO_TCP);
653 dx_buff->is_udp_cso = (l4proto == IPPROTO_UDP);
654 }
655
656 for (; nr_frags--; ++frag_count) {
657 unsigned int frag_len = 0U;
658 unsigned int buff_offset = 0U;
659 unsigned int buff_size = 0U;
660 dma_addr_t frag_pa;
661 skb_frag_t *frag = &skb_shinfo(skb)->frags[frag_count];
662
663 frag_len = skb_frag_size(frag);
664
665 while (frag_len) {
666 if (frag_len > AQ_CFG_TX_FRAME_MAX)
667 buff_size = AQ_CFG_TX_FRAME_MAX;
668 else
669 buff_size = frag_len;
670
671 frag_pa = skb_frag_dma_map(dev,
672 frag,
673 buff_offset,
674 buff_size,
675 DMA_TO_DEVICE);
676
677 if (unlikely(dma_mapping_error(dev,
678 frag_pa)))
679 goto mapping_error;
680
681 dx = aq_ring_next_dx(ring, dx);
682 dx_buff = &ring->buff_ring[dx];
683
684 dx_buff->flags = 0U;
685 dx_buff->len = buff_size;
686 dx_buff->pa = frag_pa;
687 dx_buff->is_mapped = 1U;
688 dx_buff->eop_index = 0xffffU;
689
690 frag_len -= buff_size;
691 buff_offset += buff_size;
692
693 ++ret;
694 }
695 }
696
697 first->eop_index = dx;
698 dx_buff->is_eop = 1U;
699 dx_buff->skb = skb;
700 goto exit;
701
702 mapping_error:
703 for (dx = ring->sw_tail;
704 ret > 0;
705 --ret, dx = aq_ring_next_dx(ring, dx)) {
706 dx_buff = &ring->buff_ring[dx];
707
708 if (!(dx_buff->is_gso_tcp || dx_buff->is_gso_udp) &&
709 !dx_buff->is_vlan && dx_buff->pa) {
710 if (unlikely(dx_buff->is_sop)) {
711 dma_unmap_single(dev,
712 dx_buff->pa,
713 dx_buff->len,
714 DMA_TO_DEVICE);
715 } else {
716 dma_unmap_page(dev,
717 dx_buff->pa,
718 dx_buff->len,
719 DMA_TO_DEVICE);
720 }
721 }
722 }
723
724 exit:
725 return ret;
726 }
727
aq_nic_xmit(struct aq_nic_s * self,struct sk_buff * skb)728 int aq_nic_xmit(struct aq_nic_s *self, struct sk_buff *skb)
729 {
730 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);
731 unsigned int vec = skb->queue_mapping % cfg->vecs;
732 unsigned int tc = skb->queue_mapping / cfg->vecs;
733 struct aq_ring_s *ring = NULL;
734 unsigned int frags = 0U;
735 int err = NETDEV_TX_OK;
736
737 frags = skb_shinfo(skb)->nr_frags + 1;
738
739 ring = self->aq_ring_tx[AQ_NIC_CFG_TCVEC2RING(cfg, tc, vec)];
740
741 if (frags > AQ_CFG_SKB_FRAGS_MAX) {
742 dev_kfree_skb_any(skb);
743 goto err_exit;
744 }
745
746 aq_ring_update_queue_state(ring);
747
748 if (cfg->priv_flags & BIT(AQ_HW_LOOPBACK_DMA_NET)) {
749 err = NETDEV_TX_BUSY;
750 goto err_exit;
751 }
752
753 /* Above status update may stop the queue. Check this. */
754 if (__netif_subqueue_stopped(self->ndev,
755 AQ_NIC_RING2QMAP(self, ring->idx))) {
756 err = NETDEV_TX_BUSY;
757 goto err_exit;
758 }
759
760 frags = aq_nic_map_skb(self, skb, ring);
761
762 if (likely(frags)) {
763 err = self->aq_hw_ops->hw_ring_tx_xmit(self->aq_hw,
764 ring, frags);
765 } else {
766 err = NETDEV_TX_BUSY;
767 }
768
769 err_exit:
770 return err;
771 }
772
aq_nic_update_interrupt_moderation_settings(struct aq_nic_s * self)773 int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self)
774 {
775 return self->aq_hw_ops->hw_interrupt_moderation_set(self->aq_hw);
776 }
777
aq_nic_set_packet_filter(struct aq_nic_s * self,unsigned int flags)778 int aq_nic_set_packet_filter(struct aq_nic_s *self, unsigned int flags)
779 {
780 int err = 0;
781
782 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, flags);
783 if (err < 0)
784 goto err_exit;
785
786 self->packet_filter = flags;
787
788 err_exit:
789 return err;
790 }
791
aq_nic_set_multicast_list(struct aq_nic_s * self,struct net_device * ndev)792 int aq_nic_set_multicast_list(struct aq_nic_s *self, struct net_device *ndev)
793 {
794 const struct aq_hw_ops *hw_ops = self->aq_hw_ops;
795 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
796 unsigned int packet_filter = ndev->flags;
797 struct netdev_hw_addr *ha = NULL;
798 unsigned int i = 0U;
799 int err = 0;
800
801 self->mc_list.count = 0;
802 if (netdev_uc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) {
803 packet_filter |= IFF_PROMISC;
804 } else {
805 netdev_for_each_uc_addr(ha, ndev) {
806 ether_addr_copy(self->mc_list.ar[i++], ha->addr);
807 }
808 }
809
810 cfg->is_mc_list_enabled = !!(packet_filter & IFF_MULTICAST);
811 if (cfg->is_mc_list_enabled) {
812 if (i + netdev_mc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) {
813 packet_filter |= IFF_ALLMULTI;
814 } else {
815 netdev_for_each_mc_addr(ha, ndev) {
816 ether_addr_copy(self->mc_list.ar[i++],
817 ha->addr);
818 }
819 }
820 }
821
822 if (i > 0 && i <= AQ_HW_MULTICAST_ADDRESS_MAX) {
823 self->mc_list.count = i;
824 err = hw_ops->hw_multicast_list_set(self->aq_hw,
825 self->mc_list.ar,
826 self->mc_list.count);
827 if (err < 0)
828 return err;
829 }
830
831 return aq_nic_set_packet_filter(self, packet_filter);
832 }
833
aq_nic_set_mtu(struct aq_nic_s * self,int new_mtu)834 int aq_nic_set_mtu(struct aq_nic_s *self, int new_mtu)
835 {
836 self->aq_nic_cfg.mtu = new_mtu;
837
838 return 0;
839 }
840
aq_nic_set_mac(struct aq_nic_s * self,struct net_device * ndev)841 int aq_nic_set_mac(struct aq_nic_s *self, struct net_device *ndev)
842 {
843 return self->aq_hw_ops->hw_set_mac_address(self->aq_hw, ndev->dev_addr);
844 }
845
aq_nic_get_link_speed(struct aq_nic_s * self)846 unsigned int aq_nic_get_link_speed(struct aq_nic_s *self)
847 {
848 return self->link_status.mbps;
849 }
850
aq_nic_get_regs(struct aq_nic_s * self,struct ethtool_regs * regs,void * p)851 int aq_nic_get_regs(struct aq_nic_s *self, struct ethtool_regs *regs, void *p)
852 {
853 u32 *regs_buff = p;
854 int err = 0;
855
856 if (unlikely(!self->aq_hw_ops->hw_get_regs))
857 return -EOPNOTSUPP;
858
859 regs->version = 1;
860
861 err = self->aq_hw_ops->hw_get_regs(self->aq_hw,
862 self->aq_nic_cfg.aq_hw_caps,
863 regs_buff);
864 if (err < 0)
865 goto err_exit;
866
867 err_exit:
868 return err;
869 }
870
aq_nic_get_regs_count(struct aq_nic_s * self)871 int aq_nic_get_regs_count(struct aq_nic_s *self)
872 {
873 if (unlikely(!self->aq_hw_ops->hw_get_regs))
874 return 0;
875
876 return self->aq_nic_cfg.aq_hw_caps->mac_regs_count;
877 }
878
aq_nic_get_stats(struct aq_nic_s * self,u64 * data)879 u64 *aq_nic_get_stats(struct aq_nic_s *self, u64 *data)
880 {
881 struct aq_vec_s *aq_vec = NULL;
882 struct aq_stats_s *stats;
883 unsigned int count = 0U;
884 unsigned int i = 0U;
885 unsigned int tc;
886
887 if (self->aq_fw_ops->update_stats) {
888 mutex_lock(&self->fwreq_mutex);
889 self->aq_fw_ops->update_stats(self->aq_hw);
890 mutex_unlock(&self->fwreq_mutex);
891 }
892 stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw);
893
894 if (!stats)
895 goto err_exit;
896
897 data[i] = stats->uprc + stats->mprc + stats->bprc;
898 data[++i] = stats->uprc;
899 data[++i] = stats->mprc;
900 data[++i] = stats->bprc;
901 data[++i] = stats->erpt;
902 data[++i] = stats->uptc + stats->mptc + stats->bptc;
903 data[++i] = stats->uptc;
904 data[++i] = stats->mptc;
905 data[++i] = stats->bptc;
906 data[++i] = stats->ubrc;
907 data[++i] = stats->ubtc;
908 data[++i] = stats->mbrc;
909 data[++i] = stats->mbtc;
910 data[++i] = stats->bbrc;
911 data[++i] = stats->bbtc;
912 if (stats->brc)
913 data[++i] = stats->brc;
914 else
915 data[++i] = stats->ubrc + stats->mbrc + stats->bbrc;
916 if (stats->btc)
917 data[++i] = stats->btc;
918 else
919 data[++i] = stats->ubtc + stats->mbtc + stats->bbtc;
920 data[++i] = stats->dma_pkt_rc;
921 data[++i] = stats->dma_pkt_tc;
922 data[++i] = stats->dma_oct_rc;
923 data[++i] = stats->dma_oct_tc;
924 data[++i] = stats->dpc;
925
926 i++;
927
928 data += i;
929
930 for (tc = 0U; tc < self->aq_nic_cfg.tcs; tc++) {
931 for (i = 0U, aq_vec = self->aq_vec[0];
932 aq_vec && self->aq_vecs > i;
933 ++i, aq_vec = self->aq_vec[i]) {
934 data += count;
935 count = aq_vec_get_sw_stats(aq_vec, tc, data);
936 }
937 }
938
939 data += count;
940
941 err_exit:
942 return data;
943 }
944
aq_nic_update_ndev_stats(struct aq_nic_s * self)945 static void aq_nic_update_ndev_stats(struct aq_nic_s *self)
946 {
947 struct aq_stats_s *stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw);
948 struct net_device *ndev = self->ndev;
949
950 ndev->stats.rx_packets = stats->dma_pkt_rc;
951 ndev->stats.rx_bytes = stats->dma_oct_rc;
952 ndev->stats.rx_errors = stats->erpr;
953 ndev->stats.rx_dropped = stats->dpc;
954 ndev->stats.tx_packets = stats->dma_pkt_tc;
955 ndev->stats.tx_bytes = stats->dma_oct_tc;
956 ndev->stats.tx_errors = stats->erpt;
957 ndev->stats.multicast = stats->mprc;
958 }
959
aq_nic_get_link_ksettings(struct aq_nic_s * self,struct ethtool_link_ksettings * cmd)960 void aq_nic_get_link_ksettings(struct aq_nic_s *self,
961 struct ethtool_link_ksettings *cmd)
962 {
963 u32 lp_link_speed_msk;
964
965 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
966 cmd->base.port = PORT_FIBRE;
967 else
968 cmd->base.port = PORT_TP;
969
970 cmd->base.duplex = DUPLEX_UNKNOWN;
971 if (self->link_status.mbps)
972 cmd->base.duplex = self->link_status.full_duplex ?
973 DUPLEX_FULL : DUPLEX_HALF;
974 cmd->base.autoneg = self->aq_nic_cfg.is_autoneg;
975
976 ethtool_link_ksettings_zero_link_mode(cmd, supported);
977
978 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10G)
979 ethtool_link_ksettings_add_link_mode(cmd, supported,
980 10000baseT_Full);
981
982 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_5G)
983 ethtool_link_ksettings_add_link_mode(cmd, supported,
984 5000baseT_Full);
985
986 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_2G5)
987 ethtool_link_ksettings_add_link_mode(cmd, supported,
988 2500baseT_Full);
989
990 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G)
991 ethtool_link_ksettings_add_link_mode(cmd, supported,
992 1000baseT_Full);
993
994 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G_HALF)
995 ethtool_link_ksettings_add_link_mode(cmd, supported,
996 1000baseT_Half);
997
998 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M)
999 ethtool_link_ksettings_add_link_mode(cmd, supported,
1000 100baseT_Full);
1001
1002 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M_HALF)
1003 ethtool_link_ksettings_add_link_mode(cmd, supported,
1004 100baseT_Half);
1005
1006 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M)
1007 ethtool_link_ksettings_add_link_mode(cmd, supported,
1008 10baseT_Full);
1009
1010 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M_HALF)
1011 ethtool_link_ksettings_add_link_mode(cmd, supported,
1012 10baseT_Half);
1013
1014 if (self->aq_nic_cfg.aq_hw_caps->flow_control) {
1015 ethtool_link_ksettings_add_link_mode(cmd, supported,
1016 Pause);
1017 ethtool_link_ksettings_add_link_mode(cmd, supported,
1018 Asym_Pause);
1019 }
1020
1021 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
1022
1023 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
1024 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
1025 else
1026 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
1027
1028 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
1029
1030 if (self->aq_nic_cfg.is_autoneg)
1031 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
1032
1033 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10G)
1034 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1035 10000baseT_Full);
1036
1037 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_5G)
1038 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1039 5000baseT_Full);
1040
1041 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_2G5)
1042 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1043 2500baseT_Full);
1044
1045 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G)
1046 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1047 1000baseT_Full);
1048
1049 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G_HALF)
1050 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1051 1000baseT_Half);
1052
1053 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M)
1054 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1055 100baseT_Full);
1056
1057 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M_HALF)
1058 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1059 100baseT_Half);
1060
1061 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M)
1062 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1063 10baseT_Full);
1064
1065 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M_HALF)
1066 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1067 10baseT_Half);
1068
1069 if (self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX)
1070 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1071 Pause);
1072
1073 /* Asym is when either RX or TX, but not both */
1074 if (!!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_TX) ^
1075 !!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX))
1076 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1077 Asym_Pause);
1078
1079 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
1080 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
1081 else
1082 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
1083
1084 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
1085 lp_link_speed_msk = self->aq_hw->aq_link_status.lp_link_speed_msk;
1086
1087 if (lp_link_speed_msk & AQ_NIC_RATE_10G)
1088 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1089 10000baseT_Full);
1090
1091 if (lp_link_speed_msk & AQ_NIC_RATE_5G)
1092 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1093 5000baseT_Full);
1094
1095 if (lp_link_speed_msk & AQ_NIC_RATE_2G5)
1096 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1097 2500baseT_Full);
1098
1099 if (lp_link_speed_msk & AQ_NIC_RATE_1G)
1100 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1101 1000baseT_Full);
1102
1103 if (lp_link_speed_msk & AQ_NIC_RATE_1G_HALF)
1104 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1105 1000baseT_Half);
1106
1107 if (lp_link_speed_msk & AQ_NIC_RATE_100M)
1108 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1109 100baseT_Full);
1110
1111 if (lp_link_speed_msk & AQ_NIC_RATE_100M_HALF)
1112 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1113 100baseT_Half);
1114
1115 if (lp_link_speed_msk & AQ_NIC_RATE_10M)
1116 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1117 10baseT_Full);
1118
1119 if (lp_link_speed_msk & AQ_NIC_RATE_10M_HALF)
1120 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1121 10baseT_Half);
1122
1123 if (self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_RX)
1124 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1125 Pause);
1126 if (!!(self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_TX) ^
1127 !!(self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_RX))
1128 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1129 Asym_Pause);
1130 }
1131
aq_nic_set_link_ksettings(struct aq_nic_s * self,const struct ethtool_link_ksettings * cmd)1132 int aq_nic_set_link_ksettings(struct aq_nic_s *self,
1133 const struct ethtool_link_ksettings *cmd)
1134 {
1135 int fduplex = (cmd->base.duplex == DUPLEX_FULL);
1136 u32 speed = cmd->base.speed;
1137 u32 rate = 0U;
1138 int err = 0;
1139
1140 if (!fduplex && speed > SPEED_1000) {
1141 err = -EINVAL;
1142 goto err_exit;
1143 }
1144
1145 if (cmd->base.autoneg == AUTONEG_ENABLE) {
1146 rate = self->aq_nic_cfg.aq_hw_caps->link_speed_msk;
1147 self->aq_nic_cfg.is_autoneg = true;
1148 } else {
1149 switch (speed) {
1150 case SPEED_10:
1151 rate = fduplex ? AQ_NIC_RATE_10M : AQ_NIC_RATE_10M_HALF;
1152 break;
1153
1154 case SPEED_100:
1155 rate = fduplex ? AQ_NIC_RATE_100M
1156 : AQ_NIC_RATE_100M_HALF;
1157 break;
1158
1159 case SPEED_1000:
1160 rate = fduplex ? AQ_NIC_RATE_1G : AQ_NIC_RATE_1G_HALF;
1161 break;
1162
1163 case SPEED_2500:
1164 rate = AQ_NIC_RATE_2G5;
1165 break;
1166
1167 case SPEED_5000:
1168 rate = AQ_NIC_RATE_5G;
1169 break;
1170
1171 case SPEED_10000:
1172 rate = AQ_NIC_RATE_10G;
1173 break;
1174
1175 default:
1176 err = -1;
1177 goto err_exit;
1178 }
1179 if (!(self->aq_nic_cfg.aq_hw_caps->link_speed_msk & rate)) {
1180 err = -1;
1181 goto err_exit;
1182 }
1183
1184 self->aq_nic_cfg.is_autoneg = false;
1185 }
1186
1187 mutex_lock(&self->fwreq_mutex);
1188 err = self->aq_fw_ops->set_link_speed(self->aq_hw, rate);
1189 mutex_unlock(&self->fwreq_mutex);
1190 if (err < 0)
1191 goto err_exit;
1192
1193 self->aq_nic_cfg.link_speed_msk = rate;
1194
1195 err_exit:
1196 return err;
1197 }
1198
aq_nic_get_cfg(struct aq_nic_s * self)1199 struct aq_nic_cfg_s *aq_nic_get_cfg(struct aq_nic_s *self)
1200 {
1201 return &self->aq_nic_cfg;
1202 }
1203
aq_nic_get_fw_version(struct aq_nic_s * self)1204 u32 aq_nic_get_fw_version(struct aq_nic_s *self)
1205 {
1206 return self->aq_hw_ops->hw_get_fw_version(self->aq_hw);
1207 }
1208
aq_nic_set_loopback(struct aq_nic_s * self)1209 int aq_nic_set_loopback(struct aq_nic_s *self)
1210 {
1211 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1212
1213 if (!self->aq_hw_ops->hw_set_loopback ||
1214 !self->aq_fw_ops->set_phyloopback)
1215 return -EOPNOTSUPP;
1216
1217 mutex_lock(&self->fwreq_mutex);
1218 self->aq_hw_ops->hw_set_loopback(self->aq_hw,
1219 AQ_HW_LOOPBACK_DMA_SYS,
1220 !!(cfg->priv_flags &
1221 BIT(AQ_HW_LOOPBACK_DMA_SYS)));
1222
1223 self->aq_hw_ops->hw_set_loopback(self->aq_hw,
1224 AQ_HW_LOOPBACK_PKT_SYS,
1225 !!(cfg->priv_flags &
1226 BIT(AQ_HW_LOOPBACK_PKT_SYS)));
1227
1228 self->aq_hw_ops->hw_set_loopback(self->aq_hw,
1229 AQ_HW_LOOPBACK_DMA_NET,
1230 !!(cfg->priv_flags &
1231 BIT(AQ_HW_LOOPBACK_DMA_NET)));
1232
1233 self->aq_fw_ops->set_phyloopback(self->aq_hw,
1234 AQ_HW_LOOPBACK_PHYINT_SYS,
1235 !!(cfg->priv_flags &
1236 BIT(AQ_HW_LOOPBACK_PHYINT_SYS)));
1237
1238 self->aq_fw_ops->set_phyloopback(self->aq_hw,
1239 AQ_HW_LOOPBACK_PHYEXT_SYS,
1240 !!(cfg->priv_flags &
1241 BIT(AQ_HW_LOOPBACK_PHYEXT_SYS)));
1242 mutex_unlock(&self->fwreq_mutex);
1243
1244 return 0;
1245 }
1246
aq_nic_stop(struct aq_nic_s * self)1247 int aq_nic_stop(struct aq_nic_s *self)
1248 {
1249 struct aq_vec_s *aq_vec = NULL;
1250 unsigned int i = 0U;
1251
1252 netif_tx_disable(self->ndev);
1253 netif_carrier_off(self->ndev);
1254
1255 del_timer_sync(&self->service_timer);
1256 cancel_work_sync(&self->service_task);
1257
1258 self->aq_hw_ops->hw_irq_disable(self->aq_hw, AQ_CFG_IRQ_MASK);
1259
1260 if (self->aq_nic_cfg.is_polling)
1261 del_timer_sync(&self->polling_timer);
1262 else
1263 aq_pci_func_free_irqs(self);
1264
1265 aq_ptp_irq_free(self);
1266
1267 for (i = 0U, aq_vec = self->aq_vec[0];
1268 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i])
1269 aq_vec_stop(aq_vec);
1270
1271 aq_ptp_ring_stop(self);
1272
1273 return self->aq_hw_ops->hw_stop(self->aq_hw);
1274 }
1275
aq_nic_set_power(struct aq_nic_s * self)1276 void aq_nic_set_power(struct aq_nic_s *self)
1277 {
1278 if (self->power_state != AQ_HW_POWER_STATE_D0 ||
1279 self->aq_hw->aq_nic_cfg->wol)
1280 if (likely(self->aq_fw_ops->set_power)) {
1281 mutex_lock(&self->fwreq_mutex);
1282 self->aq_fw_ops->set_power(self->aq_hw,
1283 self->power_state,
1284 self->ndev->dev_addr);
1285 mutex_unlock(&self->fwreq_mutex);
1286 }
1287 }
1288
aq_nic_deinit(struct aq_nic_s * self,bool link_down)1289 void aq_nic_deinit(struct aq_nic_s *self, bool link_down)
1290 {
1291 struct aq_vec_s *aq_vec = NULL;
1292 unsigned int i = 0U;
1293
1294 if (!self)
1295 goto err_exit;
1296
1297 for (i = 0U; i < self->aq_vecs; i++) {
1298 aq_vec = self->aq_vec[i];
1299 aq_vec_deinit(aq_vec);
1300 aq_vec_ring_free(aq_vec);
1301 }
1302
1303 aq_ptp_unregister(self);
1304 aq_ptp_ring_deinit(self);
1305 aq_ptp_ring_free(self);
1306 aq_ptp_free(self);
1307
1308 if (likely(self->aq_fw_ops->deinit) && link_down) {
1309 mutex_lock(&self->fwreq_mutex);
1310 self->aq_fw_ops->deinit(self->aq_hw);
1311 mutex_unlock(&self->fwreq_mutex);
1312 }
1313
1314 err_exit:;
1315 }
1316
aq_nic_free_vectors(struct aq_nic_s * self)1317 void aq_nic_free_vectors(struct aq_nic_s *self)
1318 {
1319 unsigned int i = 0U;
1320
1321 if (!self)
1322 goto err_exit;
1323
1324 for (i = ARRAY_SIZE(self->aq_vec); i--;) {
1325 if (self->aq_vec[i]) {
1326 aq_vec_free(self->aq_vec[i]);
1327 self->aq_vec[i] = NULL;
1328 }
1329 }
1330
1331 err_exit:;
1332 }
1333
aq_nic_realloc_vectors(struct aq_nic_s * self)1334 int aq_nic_realloc_vectors(struct aq_nic_s *self)
1335 {
1336 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);
1337
1338 aq_nic_free_vectors(self);
1339
1340 for (self->aq_vecs = 0; self->aq_vecs < cfg->vecs; self->aq_vecs++) {
1341 self->aq_vec[self->aq_vecs] = aq_vec_alloc(self, self->aq_vecs,
1342 cfg);
1343 if (unlikely(!self->aq_vec[self->aq_vecs]))
1344 return -ENOMEM;
1345 }
1346
1347 return 0;
1348 }
1349
aq_nic_shutdown(struct aq_nic_s * self)1350 void aq_nic_shutdown(struct aq_nic_s *self)
1351 {
1352 int err = 0;
1353
1354 if (!self->ndev)
1355 return;
1356
1357 rtnl_lock();
1358
1359 netif_device_detach(self->ndev);
1360
1361 if (netif_running(self->ndev)) {
1362 err = aq_nic_stop(self);
1363 if (err < 0)
1364 goto err_exit;
1365 }
1366 aq_nic_deinit(self, !self->aq_hw->aq_nic_cfg->wol);
1367 aq_nic_set_power(self);
1368
1369 err_exit:
1370 rtnl_unlock();
1371 }
1372
aq_nic_reserve_filter(struct aq_nic_s * self,enum aq_rx_filter_type type)1373 u8 aq_nic_reserve_filter(struct aq_nic_s *self, enum aq_rx_filter_type type)
1374 {
1375 u8 location = 0xFF;
1376 u32 fltr_cnt;
1377 u32 n_bit;
1378
1379 switch (type) {
1380 case aq_rx_filter_ethertype:
1381 location = AQ_RX_LAST_LOC_FETHERT - AQ_RX_FIRST_LOC_FETHERT -
1382 self->aq_hw_rx_fltrs.fet_reserved_count;
1383 self->aq_hw_rx_fltrs.fet_reserved_count++;
1384 break;
1385 case aq_rx_filter_l3l4:
1386 fltr_cnt = AQ_RX_LAST_LOC_FL3L4 - AQ_RX_FIRST_LOC_FL3L4;
1387 n_bit = fltr_cnt - self->aq_hw_rx_fltrs.fl3l4.reserved_count;
1388
1389 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 |= BIT(n_bit);
1390 self->aq_hw_rx_fltrs.fl3l4.reserved_count++;
1391 location = n_bit;
1392 break;
1393 default:
1394 break;
1395 }
1396
1397 return location;
1398 }
1399
aq_nic_release_filter(struct aq_nic_s * self,enum aq_rx_filter_type type,u32 location)1400 void aq_nic_release_filter(struct aq_nic_s *self, enum aq_rx_filter_type type,
1401 u32 location)
1402 {
1403 switch (type) {
1404 case aq_rx_filter_ethertype:
1405 self->aq_hw_rx_fltrs.fet_reserved_count--;
1406 break;
1407 case aq_rx_filter_l3l4:
1408 self->aq_hw_rx_fltrs.fl3l4.reserved_count--;
1409 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 &= ~BIT(location);
1410 break;
1411 default:
1412 break;
1413 }
1414 }
1415
aq_nic_set_downshift(struct aq_nic_s * self,int val)1416 int aq_nic_set_downshift(struct aq_nic_s *self, int val)
1417 {
1418 int err = 0;
1419 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1420
1421 if (!self->aq_fw_ops->set_downshift)
1422 return -EOPNOTSUPP;
1423
1424 if (val > 15) {
1425 netdev_err(self->ndev, "downshift counter should be <= 15\n");
1426 return -EINVAL;
1427 }
1428 cfg->downshift_counter = val;
1429
1430 mutex_lock(&self->fwreq_mutex);
1431 err = self->aq_fw_ops->set_downshift(self->aq_hw, cfg->downshift_counter);
1432 mutex_unlock(&self->fwreq_mutex);
1433
1434 return err;
1435 }
1436
aq_nic_set_media_detect(struct aq_nic_s * self,int val)1437 int aq_nic_set_media_detect(struct aq_nic_s *self, int val)
1438 {
1439 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1440 int err = 0;
1441
1442 if (!self->aq_fw_ops->set_media_detect)
1443 return -EOPNOTSUPP;
1444
1445 if (val > 0 && val != AQ_HW_MEDIA_DETECT_CNT) {
1446 netdev_err(self->ndev, "EDPD on this device could have only fixed value of %d\n",
1447 AQ_HW_MEDIA_DETECT_CNT);
1448 return -EINVAL;
1449 }
1450
1451 mutex_lock(&self->fwreq_mutex);
1452 err = self->aq_fw_ops->set_media_detect(self->aq_hw, !!val);
1453 mutex_unlock(&self->fwreq_mutex);
1454
1455 /* msecs plays no role - configuration is always fixed in PHY */
1456 if (!err)
1457 cfg->is_media_detect = !!val;
1458
1459 return err;
1460 }
1461
aq_nic_setup_tc_mqprio(struct aq_nic_s * self,u32 tcs,u8 * prio_tc_map)1462 int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map)
1463 {
1464 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1465 const unsigned int prev_vecs = cfg->vecs;
1466 bool ndev_running;
1467 int err = 0;
1468 int i;
1469
1470 /* if already the same configuration or
1471 * disable request (tcs is 0) and we already is disabled
1472 */
1473 if (tcs == cfg->tcs || (tcs == 0 && !cfg->is_qos))
1474 return 0;
1475
1476 ndev_running = netif_running(self->ndev);
1477 if (ndev_running)
1478 dev_close(self->ndev);
1479
1480 cfg->tcs = tcs;
1481 if (cfg->tcs == 0)
1482 cfg->tcs = 1;
1483 if (prio_tc_map)
1484 memcpy(cfg->prio_tc_map, prio_tc_map, sizeof(cfg->prio_tc_map));
1485 else
1486 for (i = 0; i < sizeof(cfg->prio_tc_map); i++)
1487 cfg->prio_tc_map[i] = cfg->tcs * i / 8;
1488
1489 cfg->is_qos = !!tcs;
1490 cfg->is_ptp = (cfg->tcs <= AQ_HW_PTP_TC);
1491 if (!cfg->is_ptp)
1492 netdev_warn(self->ndev, "%s\n",
1493 "PTP is auto disabled due to requested TC count.");
1494
1495 netdev_set_num_tc(self->ndev, cfg->tcs);
1496
1497 /* Changing the number of TCs might change the number of vectors */
1498 aq_nic_cfg_update_num_vecs(self);
1499 if (prev_vecs != cfg->vecs) {
1500 err = aq_nic_realloc_vectors(self);
1501 if (err)
1502 goto err_exit;
1503 }
1504
1505 if (ndev_running)
1506 err = dev_open(self->ndev, NULL);
1507
1508 err_exit:
1509 return err;
1510 }
1511
aq_nic_setup_tc_max_rate(struct aq_nic_s * self,const unsigned int tc,const u32 max_rate)1512 int aq_nic_setup_tc_max_rate(struct aq_nic_s *self, const unsigned int tc,
1513 const u32 max_rate)
1514 {
1515 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1516
1517 if (tc >= AQ_CFG_TCS_MAX)
1518 return -EINVAL;
1519
1520 if (max_rate && max_rate < 10) {
1521 netdev_warn(self->ndev,
1522 "Setting %s to the minimum usable value of %dMbps.\n",
1523 "max rate", 10);
1524 cfg->tc_max_rate[tc] = 10;
1525 } else {
1526 cfg->tc_max_rate[tc] = max_rate;
1527 }
1528
1529 return 0;
1530 }
1531
aq_nic_setup_tc_min_rate(struct aq_nic_s * self,const unsigned int tc,const u32 min_rate)1532 int aq_nic_setup_tc_min_rate(struct aq_nic_s *self, const unsigned int tc,
1533 const u32 min_rate)
1534 {
1535 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1536
1537 if (tc >= AQ_CFG_TCS_MAX)
1538 return -EINVAL;
1539
1540 if (min_rate)
1541 set_bit(tc, &cfg->tc_min_rate_msk);
1542 else
1543 clear_bit(tc, &cfg->tc_min_rate_msk);
1544
1545 if (min_rate && min_rate < 20) {
1546 netdev_warn(self->ndev,
1547 "Setting %s to the minimum usable value of %dMbps.\n",
1548 "min rate", 20);
1549 cfg->tc_min_rate[tc] = 20;
1550 } else {
1551 cfg->tc_min_rate[tc] = min_rate;
1552 }
1553
1554 return 0;
1555 }
1556