1 /*
2 * Copyright 2019 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26 #include "dmub_psr.h"
27 #include "dc.h"
28 #include "dc_dmub_srv.h"
29 #include "dmub/dmub_srv.h"
30 #include "core_types.h"
31
32 #define DC_TRACE_LEVEL_MESSAGE(...) do {} while (0) /* do nothing */
33
34 #define MAX_PIPES 6
35
36 /*
37 * Convert dmcub psr state to dmcu psr state.
38 */
convert_psr_state(uint32_t raw_state)39 static enum dc_psr_state convert_psr_state(uint32_t raw_state)
40 {
41 enum dc_psr_state state = PSR_STATE0;
42
43 if (raw_state == 0)
44 state = PSR_STATE0;
45 else if (raw_state == 0x10)
46 state = PSR_STATE1;
47 else if (raw_state == 0x11)
48 state = PSR_STATE1a;
49 else if (raw_state == 0x20)
50 state = PSR_STATE2;
51 else if (raw_state == 0x21)
52 state = PSR_STATE2a;
53 else if (raw_state == 0x22)
54 state = PSR_STATE2b;
55 else if (raw_state == 0x30)
56 state = PSR_STATE3;
57 else if (raw_state == 0x31)
58 state = PSR_STATE3Init;
59 else if (raw_state == 0x40)
60 state = PSR_STATE4;
61 else if (raw_state == 0x41)
62 state = PSR_STATE4a;
63 else if (raw_state == 0x42)
64 state = PSR_STATE4b;
65 else if (raw_state == 0x43)
66 state = PSR_STATE4c;
67 else if (raw_state == 0x44)
68 state = PSR_STATE4d;
69 else if (raw_state == 0x50)
70 state = PSR_STATE5;
71 else if (raw_state == 0x51)
72 state = PSR_STATE5a;
73 else if (raw_state == 0x52)
74 state = PSR_STATE5b;
75 else if (raw_state == 0x53)
76 state = PSR_STATE5c;
77
78 return state;
79 }
80
81 /*
82 * Get PSR state from firmware.
83 */
dmub_psr_get_state(struct dmub_psr * dmub,enum dc_psr_state * state,uint8_t panel_inst)84 static void dmub_psr_get_state(struct dmub_psr *dmub, enum dc_psr_state *state, uint8_t panel_inst)
85 {
86 struct dmub_srv *srv = dmub->ctx->dmub_srv->dmub;
87 uint32_t raw_state = 0;
88 uint32_t retry_count = 0;
89 enum dmub_status status;
90
91 do {
92 // Send gpint command and wait for ack
93 status = dmub_srv_send_gpint_command(srv, DMUB_GPINT__GET_PSR_STATE, panel_inst, 30);
94
95 if (status == DMUB_STATUS_OK) {
96 // GPINT was executed, get response
97 dmub_srv_get_gpint_response(srv, &raw_state);
98 *state = convert_psr_state(raw_state);
99 } else
100 // Return invalid state when GPINT times out
101 *state = PSR_STATE_INVALID;
102
103 } while (++retry_count <= 1000 && *state == PSR_STATE_INVALID);
104
105 // Assert if max retry hit
106 if (retry_count >= 1000 && *state == PSR_STATE_INVALID) {
107 ASSERT(0);
108 DC_TRACE_LEVEL_MESSAGE(DAL_TRACE_LEVEL_ERROR,
109 WPP_BIT_FLAG_Firmware_PsrState,
110 "Unable to get PSR state from FW.");
111 } else
112 DC_TRACE_LEVEL_MESSAGE(DAL_TRACE_LEVEL_VERBOSE,
113 WPP_BIT_FLAG_Firmware_PsrState,
114 "Got PSR state from FW. PSR state: %d, Retry count: %d",
115 *state, retry_count);
116 }
117
118 /*
119 * Set PSR version.
120 */
dmub_psr_set_version(struct dmub_psr * dmub,struct dc_stream_state * stream,uint8_t panel_inst)121 static bool dmub_psr_set_version(struct dmub_psr *dmub, struct dc_stream_state *stream, uint8_t panel_inst)
122 {
123 union dmub_rb_cmd cmd;
124 struct dc_context *dc = dmub->ctx;
125
126 if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED)
127 return false;
128
129 memset(&cmd, 0, sizeof(cmd));
130 cmd.psr_set_version.header.type = DMUB_CMD__PSR;
131 cmd.psr_set_version.header.sub_type = DMUB_CMD__PSR_SET_VERSION;
132 switch (stream->link->psr_settings.psr_version) {
133 case DC_PSR_VERSION_1:
134 cmd.psr_set_version.psr_set_version_data.version = PSR_VERSION_1;
135 break;
136 case DC_PSR_VERSION_UNSUPPORTED:
137 default:
138 cmd.psr_set_version.psr_set_version_data.version = PSR_VERSION_UNSUPPORTED;
139 break;
140 }
141 cmd.psr_set_version.psr_set_version_data.cmd_version = DMUB_CMD_PSR_CONTROL_VERSION_1;
142 cmd.psr_set_version.psr_set_version_data.panel_inst = panel_inst;
143 cmd.psr_set_version.header.payload_bytes = sizeof(struct dmub_cmd_psr_set_version_data);
144
145 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd);
146 dc_dmub_srv_cmd_execute(dc->dmub_srv);
147 dc_dmub_srv_wait_idle(dc->dmub_srv);
148
149 return true;
150 }
151
152 /*
153 * Enable/Disable PSR.
154 */
dmub_psr_enable(struct dmub_psr * dmub,bool enable,bool wait,uint8_t panel_inst)155 static void dmub_psr_enable(struct dmub_psr *dmub, bool enable, bool wait, uint8_t panel_inst)
156 {
157 union dmub_rb_cmd cmd;
158 struct dc_context *dc = dmub->ctx;
159 uint32_t retry_count;
160 enum dc_psr_state state = PSR_STATE0;
161
162 memset(&cmd, 0, sizeof(cmd));
163 cmd.psr_enable.header.type = DMUB_CMD__PSR;
164
165 cmd.psr_enable.data.cmd_version = DMUB_CMD_PSR_CONTROL_VERSION_1;
166 cmd.psr_enable.data.panel_inst = panel_inst;
167
168 if (enable)
169 cmd.psr_enable.header.sub_type = DMUB_CMD__PSR_ENABLE;
170 else
171 cmd.psr_enable.header.sub_type = DMUB_CMD__PSR_DISABLE;
172
173 cmd.psr_enable.header.payload_bytes = 0; // Send header only
174
175 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd);
176 dc_dmub_srv_cmd_execute(dc->dmub_srv);
177 dc_dmub_srv_wait_idle(dc->dmub_srv);
178
179 /* Below loops 1000 x 500us = 500 ms.
180 * Exit PSR may need to wait 1-2 frames to power up. Timeout after at
181 * least a few frames. Should never hit the max retry assert below.
182 */
183 if (wait) {
184 for (retry_count = 0; retry_count <= 1000; retry_count++) {
185 dmub_psr_get_state(dmub, &state, panel_inst);
186
187 if (enable) {
188 if (state != PSR_STATE0)
189 break;
190 } else {
191 if (state == PSR_STATE0)
192 break;
193 }
194
195 udelay(500);
196 }
197
198 /* assert if max retry hit */
199 if (retry_count >= 1000)
200 ASSERT(0);
201 }
202 }
203
204 /*
205 * Set PSR level.
206 */
dmub_psr_set_level(struct dmub_psr * dmub,uint16_t psr_level,uint8_t panel_inst)207 static void dmub_psr_set_level(struct dmub_psr *dmub, uint16_t psr_level, uint8_t panel_inst)
208 {
209 union dmub_rb_cmd cmd;
210 enum dc_psr_state state = PSR_STATE0;
211 struct dc_context *dc = dmub->ctx;
212
213 dmub_psr_get_state(dmub, &state, panel_inst);
214
215 if (state == PSR_STATE0)
216 return;
217
218 memset(&cmd, 0, sizeof(cmd));
219 cmd.psr_set_level.header.type = DMUB_CMD__PSR;
220 cmd.psr_set_level.header.sub_type = DMUB_CMD__PSR_SET_LEVEL;
221 cmd.psr_set_level.header.payload_bytes = sizeof(struct dmub_cmd_psr_set_level_data);
222 cmd.psr_set_level.psr_set_level_data.psr_level = psr_level;
223 cmd.psr_set_level.psr_set_level_data.cmd_version = DMUB_CMD_PSR_CONTROL_VERSION_1;
224 cmd.psr_set_level.psr_set_level_data.panel_inst = panel_inst;
225 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd);
226 dc_dmub_srv_cmd_execute(dc->dmub_srv);
227 dc_dmub_srv_wait_idle(dc->dmub_srv);
228 }
229
230 /**
231 * Set PSR power optimization flags.
232 */
dmub_psr_set_power_opt(struct dmub_psr * dmub,unsigned int power_opt)233 static void dmub_psr_set_power_opt(struct dmub_psr *dmub, unsigned int power_opt)
234 {
235 union dmub_rb_cmd cmd;
236 struct dc_context *dc = dmub->ctx;
237
238 memset(&cmd, 0, sizeof(cmd));
239 cmd.psr_set_power_opt.header.type = DMUB_CMD__PSR;
240 cmd.psr_set_power_opt.header.sub_type = DMUB_CMD__SET_PSR_POWER_OPT;
241 cmd.psr_set_power_opt.header.payload_bytes = sizeof(struct dmub_cmd_psr_set_power_opt_data);
242 cmd.psr_set_power_opt.psr_set_power_opt_data.power_opt = power_opt;
243
244 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd);
245 dc_dmub_srv_cmd_execute(dc->dmub_srv);
246 dc_dmub_srv_wait_idle(dc->dmub_srv);
247 }
248
249 /*
250 * Setup PSR by programming phy registers and sending psr hw context values to firmware.
251 */
dmub_psr_copy_settings(struct dmub_psr * dmub,struct dc_link * link,struct psr_context * psr_context,uint8_t panel_inst)252 static bool dmub_psr_copy_settings(struct dmub_psr *dmub,
253 struct dc_link *link,
254 struct psr_context *psr_context,
255 uint8_t panel_inst)
256 {
257 union dmub_rb_cmd cmd;
258 struct dc_context *dc = dmub->ctx;
259 struct dmub_cmd_psr_copy_settings_data *copy_settings_data
260 = &cmd.psr_copy_settings.psr_copy_settings_data;
261 struct pipe_ctx *pipe_ctx = NULL;
262 struct resource_context *res_ctx = &link->ctx->dc->current_state->res_ctx;
263 int i = 0;
264
265 for (i = 0; i < MAX_PIPES; i++) {
266 if (res_ctx->pipe_ctx[i].stream &&
267 res_ctx->pipe_ctx[i].stream->link == link &&
268 res_ctx->pipe_ctx[i].stream->link->connector_signal == SIGNAL_TYPE_EDP) {
269 pipe_ctx = &res_ctx->pipe_ctx[i];
270 //TODO: refactor for multi edp support
271 break;
272 }
273 }
274
275 if (!pipe_ctx)
276 return false;
277
278 // First, set the psr version
279 if (!dmub_psr_set_version(dmub, pipe_ctx->stream, panel_inst))
280 return false;
281
282 // Program DP DPHY fast training registers
283 link->link_enc->funcs->psr_program_dp_dphy_fast_training(link->link_enc,
284 psr_context->psrExitLinkTrainingRequired);
285
286 // Program DP_SEC_CNTL1 register to set transmission GPS0 line num and priority to high
287 link->link_enc->funcs->psr_program_secondary_packet(link->link_enc,
288 psr_context->sdpTransmitLineNumDeadline);
289
290 memset(&cmd, 0, sizeof(cmd));
291 cmd.psr_copy_settings.header.type = DMUB_CMD__PSR;
292 cmd.psr_copy_settings.header.sub_type = DMUB_CMD__PSR_COPY_SETTINGS;
293 cmd.psr_copy_settings.header.payload_bytes = sizeof(struct dmub_cmd_psr_copy_settings_data);
294
295 // Hw insts
296 copy_settings_data->dpphy_inst = psr_context->transmitterId;
297 copy_settings_data->aux_inst = psr_context->channel;
298 copy_settings_data->digfe_inst = psr_context->engineId;
299 copy_settings_data->digbe_inst = psr_context->transmitterId;
300
301 copy_settings_data->mpcc_inst = pipe_ctx->plane_res.mpcc_inst;
302
303 if (pipe_ctx->plane_res.dpp)
304 copy_settings_data->dpp_inst = pipe_ctx->plane_res.dpp->inst;
305 else
306 copy_settings_data->dpp_inst = 0;
307 if (pipe_ctx->stream_res.opp)
308 copy_settings_data->opp_inst = pipe_ctx->stream_res.opp->inst;
309 else
310 copy_settings_data->opp_inst = 0;
311 if (pipe_ctx->stream_res.tg)
312 copy_settings_data->otg_inst = pipe_ctx->stream_res.tg->inst;
313 else
314 copy_settings_data->otg_inst = 0;
315
316 // Misc
317 copy_settings_data->psr_level = psr_context->psr_level.u32all;
318 copy_settings_data->smu_optimizations_en = psr_context->allow_smu_optimizations;
319 copy_settings_data->multi_disp_optimizations_en = psr_context->allow_multi_disp_optimizations;
320 copy_settings_data->frame_delay = psr_context->frame_delay;
321 copy_settings_data->frame_cap_ind = psr_context->psrFrameCaptureIndicationReq;
322 copy_settings_data->init_sdp_deadline = psr_context->sdpTransmitLineNumDeadline;
323 copy_settings_data->debug.u32All = 0;
324 copy_settings_data->debug.bitfields.visual_confirm = dc->dc->debug.visual_confirm == VISUAL_CONFIRM_PSR;
325 copy_settings_data->debug.bitfields.use_hw_lock_mgr = 1;
326 copy_settings_data->fec_enable_status = (link->fec_state == dc_link_fec_enabled);
327 copy_settings_data->fec_enable_delay_in100us = link->dc->debug.fec_enable_delay_in100us;
328 copy_settings_data->cmd_version = DMUB_CMD_PSR_CONTROL_VERSION_1;
329 copy_settings_data->panel_inst = panel_inst;
330
331 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd);
332 dc_dmub_srv_cmd_execute(dc->dmub_srv);
333 dc_dmub_srv_wait_idle(dc->dmub_srv);
334
335 return true;
336 }
337
338 /*
339 * Send command to PSR to force static ENTER and ignore all state changes until exit
340 */
dmub_psr_force_static(struct dmub_psr * dmub,uint8_t panel_inst)341 static void dmub_psr_force_static(struct dmub_psr *dmub, uint8_t panel_inst)
342 {
343 union dmub_rb_cmd cmd;
344 struct dc_context *dc = dmub->ctx;
345
346 memset(&cmd, 0, sizeof(cmd));
347
348 cmd.psr_force_static.psr_force_static_data.panel_inst = panel_inst;
349 cmd.psr_force_static.psr_force_static_data.cmd_version = DMUB_CMD_PSR_CONTROL_VERSION_1;
350 cmd.psr_force_static.header.type = DMUB_CMD__PSR;
351 cmd.psr_force_static.header.sub_type = DMUB_CMD__PSR_FORCE_STATIC;
352 cmd.psr_enable.header.payload_bytes = 0;
353
354 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd);
355 dc_dmub_srv_cmd_execute(dc->dmub_srv);
356 dc_dmub_srv_wait_idle(dc->dmub_srv);
357 }
358
359 /*
360 * Get PSR residency from firmware.
361 */
dmub_psr_get_residency(struct dmub_psr * dmub,uint32_t * residency,uint8_t panel_inst)362 static void dmub_psr_get_residency(struct dmub_psr *dmub, uint32_t *residency, uint8_t panel_inst)
363 {
364 struct dmub_srv *srv = dmub->ctx->dmub_srv->dmub;
365 uint16_t param = (uint16_t)(panel_inst << 8);
366
367 /* Send gpint command and wait for ack */
368 dmub_srv_send_gpint_command(srv, DMUB_GPINT__PSR_RESIDENCY, param, 30);
369
370 dmub_srv_get_gpint_response(srv, residency);
371 }
372
373 static const struct dmub_psr_funcs psr_funcs = {
374 .psr_copy_settings = dmub_psr_copy_settings,
375 .psr_enable = dmub_psr_enable,
376 .psr_get_state = dmub_psr_get_state,
377 .psr_set_level = dmub_psr_set_level,
378 .psr_force_static = dmub_psr_force_static,
379 .psr_get_residency = dmub_psr_get_residency,
380 .psr_set_power_opt = dmub_psr_set_power_opt,
381 };
382
383 /*
384 * Construct PSR object.
385 */
dmub_psr_construct(struct dmub_psr * psr,struct dc_context * ctx)386 static void dmub_psr_construct(struct dmub_psr *psr, struct dc_context *ctx)
387 {
388 psr->ctx = ctx;
389 psr->funcs = &psr_funcs;
390 }
391
392 /*
393 * Allocate and initialize PSR object.
394 */
dmub_psr_create(struct dc_context * ctx)395 struct dmub_psr *dmub_psr_create(struct dc_context *ctx)
396 {
397 struct dmub_psr *psr = kzalloc(sizeof(struct dmub_psr), GFP_KERNEL);
398
399 if (psr == NULL) {
400 BREAK_TO_DEBUGGER();
401 return NULL;
402 }
403
404 dmub_psr_construct(psr, ctx);
405
406 return psr;
407 }
408
409 /*
410 * Deallocate PSR object.
411 */
dmub_psr_destroy(struct dmub_psr ** dmub)412 void dmub_psr_destroy(struct dmub_psr **dmub)
413 {
414 kfree(*dmub);
415 *dmub = NULL;
416 }
417