1 /*
2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include "en.h"
34 #include "en/port.h"
35 #include "en/params.h"
36 #include "en/xsk/pool.h"
37 #include "en/ptp.h"
38 #include "lib/clock.h"
39
mlx5e_ethtool_get_drvinfo(struct mlx5e_priv * priv,struct ethtool_drvinfo * drvinfo)40 void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,
41 struct ethtool_drvinfo *drvinfo)
42 {
43 struct mlx5_core_dev *mdev = priv->mdev;
44
45 strlcpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver));
46 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
47 "%d.%d.%04d (%.16s)",
48 fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev),
49 mdev->board_id);
50 strlcpy(drvinfo->bus_info, dev_name(mdev->device),
51 sizeof(drvinfo->bus_info));
52 }
53
mlx5e_get_drvinfo(struct net_device * dev,struct ethtool_drvinfo * drvinfo)54 static void mlx5e_get_drvinfo(struct net_device *dev,
55 struct ethtool_drvinfo *drvinfo)
56 {
57 struct mlx5e_priv *priv = netdev_priv(dev);
58
59 mlx5e_ethtool_get_drvinfo(priv, drvinfo);
60 }
61
62 struct ptys2ethtool_config {
63 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
64 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
65 };
66
67 static
68 struct ptys2ethtool_config ptys2legacy_ethtool_table[MLX5E_LINK_MODES_NUMBER];
69 static
70 struct ptys2ethtool_config ptys2ext_ethtool_table[MLX5E_EXT_LINK_MODES_NUMBER];
71
72 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, table, ...) \
73 ({ \
74 struct ptys2ethtool_config *cfg; \
75 const unsigned int modes[] = { __VA_ARGS__ }; \
76 unsigned int i, bit, idx; \
77 cfg = &ptys2##table##_ethtool_table[reg_]; \
78 bitmap_zero(cfg->supported, \
79 __ETHTOOL_LINK_MODE_MASK_NBITS); \
80 bitmap_zero(cfg->advertised, \
81 __ETHTOOL_LINK_MODE_MASK_NBITS); \
82 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) { \
83 bit = modes[i] % 64; \
84 idx = modes[i] / 64; \
85 __set_bit(bit, &cfg->supported[idx]); \
86 __set_bit(bit, &cfg->advertised[idx]); \
87 } \
88 })
89
mlx5e_build_ptys2ethtool_map(void)90 void mlx5e_build_ptys2ethtool_map(void)
91 {
92 memset(ptys2legacy_ethtool_table, 0, sizeof(ptys2legacy_ethtool_table));
93 memset(ptys2ext_ethtool_table, 0, sizeof(ptys2ext_ethtool_table));
94 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, legacy,
95 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
96 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, legacy,
97 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
98 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, legacy,
99 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
100 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, legacy,
101 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
102 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, legacy,
103 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
104 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, legacy,
105 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
106 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, legacy,
107 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
108 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, legacy,
109 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
110 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, legacy,
111 ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
112 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, legacy,
113 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
114 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, legacy,
115 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
116 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, legacy,
117 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
118 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, legacy,
119 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
120 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, legacy,
121 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
122 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, legacy,
123 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
124 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, legacy,
125 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
126 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, legacy,
127 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
128 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, legacy,
129 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
130 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, legacy,
131 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
132 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, legacy,
133 ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
134 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, legacy,
135 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
136 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, legacy,
137 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
138 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, legacy,
139 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
140 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, legacy,
141 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
142 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, legacy,
143 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
144 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_SGMII_100M, ext,
145 ETHTOOL_LINK_MODE_100baseT_Full_BIT);
146 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_X_SGMII, ext,
147 ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
148 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
149 ETHTOOL_LINK_MODE_1000baseX_Full_BIT);
150 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_5GBASE_R, ext,
151 ETHTOOL_LINK_MODE_5000baseT_Full_BIT);
152 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_XFI_XAUI_1, ext,
153 ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
154 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
155 ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
156 ETHTOOL_LINK_MODE_10000baseCR_Full_BIT,
157 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
158 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
159 ETHTOOL_LINK_MODE_10000baseER_Full_BIT);
160 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_XLAUI_4_XLPPI_4, ext,
161 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
162 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
163 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
164 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
165 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GAUI_1_25GBASE_CR_KR, ext,
166 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
167 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
168 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
169 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2,
170 ext,
171 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
172 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
173 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
174 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR, ext,
175 ETHTOOL_LINK_MODE_50000baseKR_Full_BIT,
176 ETHTOOL_LINK_MODE_50000baseSR_Full_BIT,
177 ETHTOOL_LINK_MODE_50000baseCR_Full_BIT,
178 ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
179 ETHTOOL_LINK_MODE_50000baseDR_Full_BIT);
180 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_CAUI_4_100GBASE_CR4_KR4, ext,
181 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
182 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
183 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
184 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
185 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GAUI_2_100GBASE_CR2_KR2, ext,
186 ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT,
187 ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT,
188 ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT,
189 ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
190 ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT);
191 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_200GAUI_4_200GBASE_CR4_KR4, ext,
192 ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT,
193 ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT,
194 ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
195 ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT,
196 ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT);
197 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GAUI_1_100GBASE_CR_KR, ext,
198 ETHTOOL_LINK_MODE_100000baseKR_Full_BIT,
199 ETHTOOL_LINK_MODE_100000baseSR_Full_BIT,
200 ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
201 ETHTOOL_LINK_MODE_100000baseDR_Full_BIT,
202 ETHTOOL_LINK_MODE_100000baseCR_Full_BIT);
203 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_200GAUI_2_200GBASE_CR2_KR2, ext,
204 ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT,
205 ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT,
206 ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
207 ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT,
208 ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT);
209 MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_400GAUI_4_400GBASE_CR4_KR4, ext,
210 ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT,
211 ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT,
212 ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
213 ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT,
214 ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT);
215 }
216
mlx5e_ethtool_get_speed_arr(struct mlx5_core_dev * mdev,struct ptys2ethtool_config ** arr,u32 * size)217 static void mlx5e_ethtool_get_speed_arr(struct mlx5_core_dev *mdev,
218 struct ptys2ethtool_config **arr,
219 u32 *size)
220 {
221 bool ext = mlx5e_ptys_ext_supported(mdev);
222
223 *arr = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;
224 *size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :
225 ARRAY_SIZE(ptys2legacy_ethtool_table);
226 }
227
228 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
229
230 struct pflag_desc {
231 char name[ETH_GSTRING_LEN];
232 mlx5e_pflag_handler handler;
233 };
234
235 static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS];
236
mlx5e_ethtool_get_sset_count(struct mlx5e_priv * priv,int sset)237 int mlx5e_ethtool_get_sset_count(struct mlx5e_priv *priv, int sset)
238 {
239 switch (sset) {
240 case ETH_SS_STATS:
241 return mlx5e_stats_total_num(priv);
242 case ETH_SS_PRIV_FLAGS:
243 return MLX5E_NUM_PFLAGS;
244 case ETH_SS_TEST:
245 return mlx5e_self_test_num(priv);
246 default:
247 return -EOPNOTSUPP;
248 }
249 }
250
mlx5e_get_sset_count(struct net_device * dev,int sset)251 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
252 {
253 struct mlx5e_priv *priv = netdev_priv(dev);
254
255 return mlx5e_ethtool_get_sset_count(priv, sset);
256 }
257
mlx5e_ethtool_get_strings(struct mlx5e_priv * priv,u32 stringset,u8 * data)258 void mlx5e_ethtool_get_strings(struct mlx5e_priv *priv, u32 stringset, u8 *data)
259 {
260 int i;
261
262 switch (stringset) {
263 case ETH_SS_PRIV_FLAGS:
264 for (i = 0; i < MLX5E_NUM_PFLAGS; i++)
265 strcpy(data + i * ETH_GSTRING_LEN,
266 mlx5e_priv_flags[i].name);
267 break;
268
269 case ETH_SS_TEST:
270 mlx5e_self_test_fill_strings(priv, data);
271 break;
272
273 case ETH_SS_STATS:
274 mlx5e_stats_fill_strings(priv, data);
275 break;
276 }
277 }
278
mlx5e_get_strings(struct net_device * dev,u32 stringset,u8 * data)279 static void mlx5e_get_strings(struct net_device *dev, u32 stringset, u8 *data)
280 {
281 struct mlx5e_priv *priv = netdev_priv(dev);
282
283 mlx5e_ethtool_get_strings(priv, stringset, data);
284 }
285
mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv * priv,struct ethtool_stats * stats,u64 * data)286 void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
287 struct ethtool_stats *stats, u64 *data)
288 {
289 int idx = 0;
290
291 mutex_lock(&priv->state_lock);
292 mlx5e_stats_update(priv);
293 mutex_unlock(&priv->state_lock);
294
295 mlx5e_stats_fill(priv, data, idx);
296 }
297
mlx5e_get_ethtool_stats(struct net_device * dev,struct ethtool_stats * stats,u64 * data)298 static void mlx5e_get_ethtool_stats(struct net_device *dev,
299 struct ethtool_stats *stats,
300 u64 *data)
301 {
302 struct mlx5e_priv *priv = netdev_priv(dev);
303
304 mlx5e_ethtool_get_ethtool_stats(priv, stats, data);
305 }
306
mlx5e_ethtool_get_ringparam(struct mlx5e_priv * priv,struct ethtool_ringparam * param)307 void mlx5e_ethtool_get_ringparam(struct mlx5e_priv *priv,
308 struct ethtool_ringparam *param)
309 {
310 param->rx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE;
311 param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
312 param->rx_pending = 1 << priv->channels.params.log_rq_mtu_frames;
313 param->tx_pending = 1 << priv->channels.params.log_sq_size;
314 }
315
mlx5e_get_ringparam(struct net_device * dev,struct ethtool_ringparam * param)316 static void mlx5e_get_ringparam(struct net_device *dev,
317 struct ethtool_ringparam *param)
318 {
319 struct mlx5e_priv *priv = netdev_priv(dev);
320
321 mlx5e_ethtool_get_ringparam(priv, param);
322 }
323
mlx5e_ethtool_set_ringparam(struct mlx5e_priv * priv,struct ethtool_ringparam * param)324 int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv,
325 struct ethtool_ringparam *param)
326 {
327 struct mlx5e_params new_params;
328 u8 log_rq_size;
329 u8 log_sq_size;
330 int err = 0;
331
332 if (param->rx_jumbo_pending) {
333 netdev_info(priv->netdev, "%s: rx_jumbo_pending not supported\n",
334 __func__);
335 return -EINVAL;
336 }
337 if (param->rx_mini_pending) {
338 netdev_info(priv->netdev, "%s: rx_mini_pending not supported\n",
339 __func__);
340 return -EINVAL;
341 }
342
343 if (param->rx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE)) {
344 netdev_info(priv->netdev, "%s: rx_pending (%d) < min (%d)\n",
345 __func__, param->rx_pending,
346 1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE);
347 return -EINVAL;
348 }
349
350 if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
351 netdev_info(priv->netdev, "%s: tx_pending (%d) < min (%d)\n",
352 __func__, param->tx_pending,
353 1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
354 return -EINVAL;
355 }
356
357 log_rq_size = order_base_2(param->rx_pending);
358 log_sq_size = order_base_2(param->tx_pending);
359
360 if (log_rq_size == priv->channels.params.log_rq_mtu_frames &&
361 log_sq_size == priv->channels.params.log_sq_size)
362 return 0;
363
364 mutex_lock(&priv->state_lock);
365
366 new_params = priv->channels.params;
367 new_params.log_rq_mtu_frames = log_rq_size;
368 new_params.log_sq_size = log_sq_size;
369
370 err = mlx5e_validate_params(priv->mdev, &new_params);
371 if (err)
372 goto unlock;
373
374 err = mlx5e_safe_switch_params(priv, &new_params, NULL, NULL, true);
375
376 unlock:
377 mutex_unlock(&priv->state_lock);
378
379 return err;
380 }
381
mlx5e_set_ringparam(struct net_device * dev,struct ethtool_ringparam * param)382 static int mlx5e_set_ringparam(struct net_device *dev,
383 struct ethtool_ringparam *param)
384 {
385 struct mlx5e_priv *priv = netdev_priv(dev);
386
387 return mlx5e_ethtool_set_ringparam(priv, param);
388 }
389
mlx5e_ethtool_get_channels(struct mlx5e_priv * priv,struct ethtool_channels * ch)390 void mlx5e_ethtool_get_channels(struct mlx5e_priv *priv,
391 struct ethtool_channels *ch)
392 {
393 mutex_lock(&priv->state_lock);
394
395 ch->max_combined = priv->max_nch;
396 ch->combined_count = priv->channels.params.num_channels;
397 if (priv->xsk.refcnt) {
398 /* The upper half are XSK queues. */
399 ch->max_combined *= 2;
400 ch->combined_count *= 2;
401 }
402
403 mutex_unlock(&priv->state_lock);
404 }
405
mlx5e_get_channels(struct net_device * dev,struct ethtool_channels * ch)406 static void mlx5e_get_channels(struct net_device *dev,
407 struct ethtool_channels *ch)
408 {
409 struct mlx5e_priv *priv = netdev_priv(dev);
410
411 mlx5e_ethtool_get_channels(priv, ch);
412 }
413
mlx5e_ethtool_set_channels(struct mlx5e_priv * priv,struct ethtool_channels * ch)414 int mlx5e_ethtool_set_channels(struct mlx5e_priv *priv,
415 struct ethtool_channels *ch)
416 {
417 struct mlx5e_params *cur_params = &priv->channels.params;
418 unsigned int count = ch->combined_count;
419 struct mlx5e_params new_params;
420 bool arfs_enabled;
421 int rss_cnt;
422 bool opened;
423 int err = 0;
424
425 if (!count) {
426 netdev_info(priv->netdev, "%s: combined_count=0 not supported\n",
427 __func__);
428 return -EINVAL;
429 }
430
431 if (cur_params->num_channels == count)
432 return 0;
433
434 mutex_lock(&priv->state_lock);
435
436 /* Don't allow changing the number of channels if there is an active
437 * XSK, because the numeration of the XSK and regular RQs will change.
438 */
439 if (priv->xsk.refcnt) {
440 err = -EINVAL;
441 netdev_err(priv->netdev, "%s: AF_XDP is active, cannot change the number of channels\n",
442 __func__);
443 goto out;
444 }
445
446 /* Don't allow changing the number of channels if HTB offload is active,
447 * because the numeration of the QoS SQs will change, while per-queue
448 * qdiscs are attached.
449 */
450 if (priv->htb.maj_id) {
451 err = -EINVAL;
452 netdev_err(priv->netdev, "%s: HTB offload is active, cannot change the number of channels\n",
453 __func__);
454 goto out;
455 }
456
457 /* Don't allow changing the number of channels if non-default RSS contexts exist,
458 * the kernel doesn't protect against set_channels operations that break them.
459 */
460 rss_cnt = mlx5e_rx_res_rss_cnt(priv->rx_res) - 1;
461 if (rss_cnt) {
462 err = -EINVAL;
463 netdev_err(priv->netdev, "%s: Non-default RSS contexts exist (%d), cannot change the number of channels\n",
464 __func__, rss_cnt);
465 goto out;
466 }
467
468 /* Don't allow changing the number of channels if MQPRIO mode channel offload is active,
469 * because it defines a partition over the channels queues.
470 */
471 if (cur_params->mqprio.mode == TC_MQPRIO_MODE_CHANNEL) {
472 err = -EINVAL;
473 netdev_err(priv->netdev, "%s: MQPRIO mode channel offload is active, cannot change the number of channels\n",
474 __func__);
475 goto out;
476 }
477
478 new_params = *cur_params;
479 new_params.num_channels = count;
480
481 opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
482
483 arfs_enabled = opened && (priv->netdev->features & NETIF_F_NTUPLE);
484 if (arfs_enabled)
485 mlx5e_arfs_disable(priv);
486
487 /* Switch to new channels, set new parameters and close old ones */
488 err = mlx5e_safe_switch_params(priv, &new_params,
489 mlx5e_num_channels_changed_ctx, NULL, true);
490
491 if (arfs_enabled) {
492 int err2 = mlx5e_arfs_enable(priv);
493
494 if (err2)
495 netdev_err(priv->netdev, "%s: mlx5e_arfs_enable failed: %d\n",
496 __func__, err2);
497 }
498
499 out:
500 mutex_unlock(&priv->state_lock);
501
502 return err;
503 }
504
mlx5e_set_channels(struct net_device * dev,struct ethtool_channels * ch)505 static int mlx5e_set_channels(struct net_device *dev,
506 struct ethtool_channels *ch)
507 {
508 struct mlx5e_priv *priv = netdev_priv(dev);
509
510 return mlx5e_ethtool_set_channels(priv, ch);
511 }
512
mlx5e_ethtool_get_coalesce(struct mlx5e_priv * priv,struct ethtool_coalesce * coal)513 int mlx5e_ethtool_get_coalesce(struct mlx5e_priv *priv,
514 struct ethtool_coalesce *coal)
515 {
516 struct dim_cq_moder *rx_moder, *tx_moder;
517
518 if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
519 return -EOPNOTSUPP;
520
521 rx_moder = &priv->channels.params.rx_cq_moderation;
522 coal->rx_coalesce_usecs = rx_moder->usec;
523 coal->rx_max_coalesced_frames = rx_moder->pkts;
524 coal->use_adaptive_rx_coalesce = priv->channels.params.rx_dim_enabled;
525
526 tx_moder = &priv->channels.params.tx_cq_moderation;
527 coal->tx_coalesce_usecs = tx_moder->usec;
528 coal->tx_max_coalesced_frames = tx_moder->pkts;
529 coal->use_adaptive_tx_coalesce = priv->channels.params.tx_dim_enabled;
530
531 return 0;
532 }
533
mlx5e_get_coalesce(struct net_device * netdev,struct ethtool_coalesce * coal,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)534 static int mlx5e_get_coalesce(struct net_device *netdev,
535 struct ethtool_coalesce *coal,
536 struct kernel_ethtool_coalesce *kernel_coal,
537 struct netlink_ext_ack *extack)
538 {
539 struct mlx5e_priv *priv = netdev_priv(netdev);
540
541 return mlx5e_ethtool_get_coalesce(priv, coal);
542 }
543
544 #define MLX5E_MAX_COAL_TIME MLX5_MAX_CQ_PERIOD
545 #define MLX5E_MAX_COAL_FRAMES MLX5_MAX_CQ_COUNT
546
547 static void
mlx5e_set_priv_channels_tx_coalesce(struct mlx5e_priv * priv,struct ethtool_coalesce * coal)548 mlx5e_set_priv_channels_tx_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
549 {
550 struct mlx5_core_dev *mdev = priv->mdev;
551 int tc;
552 int i;
553
554 for (i = 0; i < priv->channels.num; ++i) {
555 struct mlx5e_channel *c = priv->channels.c[i];
556
557 for (tc = 0; tc < c->num_tc; tc++) {
558 mlx5_core_modify_cq_moderation(mdev,
559 &c->sq[tc].cq.mcq,
560 coal->tx_coalesce_usecs,
561 coal->tx_max_coalesced_frames);
562 }
563 }
564 }
565
566 static void
mlx5e_set_priv_channels_rx_coalesce(struct mlx5e_priv * priv,struct ethtool_coalesce * coal)567 mlx5e_set_priv_channels_rx_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
568 {
569 struct mlx5_core_dev *mdev = priv->mdev;
570 int i;
571
572 for (i = 0; i < priv->channels.num; ++i) {
573 struct mlx5e_channel *c = priv->channels.c[i];
574
575 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
576 coal->rx_coalesce_usecs,
577 coal->rx_max_coalesced_frames);
578 }
579 }
580
mlx5e_ethtool_set_coalesce(struct mlx5e_priv * priv,struct ethtool_coalesce * coal)581 int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
582 struct ethtool_coalesce *coal)
583 {
584 struct dim_cq_moder *rx_moder, *tx_moder;
585 struct mlx5_core_dev *mdev = priv->mdev;
586 struct mlx5e_params new_params;
587 bool reset_rx, reset_tx;
588 bool reset = true;
589 int err = 0;
590
591 if (!MLX5_CAP_GEN(mdev, cq_moderation))
592 return -EOPNOTSUPP;
593
594 if (coal->tx_coalesce_usecs > MLX5E_MAX_COAL_TIME ||
595 coal->rx_coalesce_usecs > MLX5E_MAX_COAL_TIME) {
596 netdev_info(priv->netdev, "%s: maximum coalesce time supported is %lu usecs\n",
597 __func__, MLX5E_MAX_COAL_TIME);
598 return -ERANGE;
599 }
600
601 if (coal->tx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES ||
602 coal->rx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES) {
603 netdev_info(priv->netdev, "%s: maximum coalesced frames supported is %lu\n",
604 __func__, MLX5E_MAX_COAL_FRAMES);
605 return -ERANGE;
606 }
607
608 mutex_lock(&priv->state_lock);
609 new_params = priv->channels.params;
610
611 rx_moder = &new_params.rx_cq_moderation;
612 rx_moder->usec = coal->rx_coalesce_usecs;
613 rx_moder->pkts = coal->rx_max_coalesced_frames;
614 new_params.rx_dim_enabled = !!coal->use_adaptive_rx_coalesce;
615
616 tx_moder = &new_params.tx_cq_moderation;
617 tx_moder->usec = coal->tx_coalesce_usecs;
618 tx_moder->pkts = coal->tx_max_coalesced_frames;
619 new_params.tx_dim_enabled = !!coal->use_adaptive_tx_coalesce;
620
621 reset_rx = !!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled;
622 reset_tx = !!coal->use_adaptive_tx_coalesce != priv->channels.params.tx_dim_enabled;
623
624 if (reset_rx) {
625 u8 mode = MLX5E_GET_PFLAG(&new_params,
626 MLX5E_PFLAG_RX_CQE_BASED_MODER);
627
628 mlx5e_reset_rx_moderation(&new_params, mode);
629 }
630 if (reset_tx) {
631 u8 mode = MLX5E_GET_PFLAG(&new_params,
632 MLX5E_PFLAG_TX_CQE_BASED_MODER);
633
634 mlx5e_reset_tx_moderation(&new_params, mode);
635 }
636
637 /* If DIM state hasn't changed, it's possible to modify interrupt
638 * moderation parameters on the fly, even if the channels are open.
639 */
640 if (!reset_rx && !reset_tx && test_bit(MLX5E_STATE_OPENED, &priv->state)) {
641 if (!coal->use_adaptive_rx_coalesce)
642 mlx5e_set_priv_channels_rx_coalesce(priv, coal);
643 if (!coal->use_adaptive_tx_coalesce)
644 mlx5e_set_priv_channels_tx_coalesce(priv, coal);
645 reset = false;
646 }
647
648 err = mlx5e_safe_switch_params(priv, &new_params, NULL, NULL, reset);
649
650 mutex_unlock(&priv->state_lock);
651 return err;
652 }
653
mlx5e_set_coalesce(struct net_device * netdev,struct ethtool_coalesce * coal,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)654 static int mlx5e_set_coalesce(struct net_device *netdev,
655 struct ethtool_coalesce *coal,
656 struct kernel_ethtool_coalesce *kernel_coal,
657 struct netlink_ext_ack *extack)
658 {
659 struct mlx5e_priv *priv = netdev_priv(netdev);
660
661 return mlx5e_ethtool_set_coalesce(priv, coal);
662 }
663
ptys2ethtool_supported_link(struct mlx5_core_dev * mdev,unsigned long * supported_modes,u32 eth_proto_cap)664 static void ptys2ethtool_supported_link(struct mlx5_core_dev *mdev,
665 unsigned long *supported_modes,
666 u32 eth_proto_cap)
667 {
668 unsigned long proto_cap = eth_proto_cap;
669 struct ptys2ethtool_config *table;
670 u32 max_size;
671 int proto;
672
673 mlx5e_ethtool_get_speed_arr(mdev, &table, &max_size);
674 for_each_set_bit(proto, &proto_cap, max_size)
675 bitmap_or(supported_modes, supported_modes,
676 table[proto].supported,
677 __ETHTOOL_LINK_MODE_MASK_NBITS);
678 }
679
ptys2ethtool_adver_link(unsigned long * advertising_modes,u32 eth_proto_cap,bool ext)680 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
681 u32 eth_proto_cap, bool ext)
682 {
683 unsigned long proto_cap = eth_proto_cap;
684 struct ptys2ethtool_config *table;
685 u32 max_size;
686 int proto;
687
688 table = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;
689 max_size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :
690 ARRAY_SIZE(ptys2legacy_ethtool_table);
691
692 for_each_set_bit(proto, &proto_cap, max_size)
693 bitmap_or(advertising_modes, advertising_modes,
694 table[proto].advertised,
695 __ETHTOOL_LINK_MODE_MASK_NBITS);
696 }
697
698 static const u32 pplm_fec_2_ethtool[] = {
699 [MLX5E_FEC_NOFEC] = ETHTOOL_FEC_OFF,
700 [MLX5E_FEC_FIRECODE] = ETHTOOL_FEC_BASER,
701 [MLX5E_FEC_RS_528_514] = ETHTOOL_FEC_RS,
702 [MLX5E_FEC_RS_544_514] = ETHTOOL_FEC_RS,
703 [MLX5E_FEC_LLRS_272_257_1] = ETHTOOL_FEC_LLRS,
704 };
705
pplm2ethtool_fec(u_long fec_mode,unsigned long size)706 static u32 pplm2ethtool_fec(u_long fec_mode, unsigned long size)
707 {
708 int mode = 0;
709
710 if (!fec_mode)
711 return ETHTOOL_FEC_AUTO;
712
713 mode = find_first_bit(&fec_mode, size);
714
715 if (mode < ARRAY_SIZE(pplm_fec_2_ethtool))
716 return pplm_fec_2_ethtool[mode];
717
718 return 0;
719 }
720
721 #define MLX5E_ADVERTISE_SUPPORTED_FEC(mlx5_fec, ethtool_fec) \
722 do { \
723 if (mlx5e_fec_in_caps(dev, 1 << (mlx5_fec))) \
724 __set_bit(ethtool_fec, \
725 link_ksettings->link_modes.supported);\
726 } while (0)
727
728 static const u32 pplm_fec_2_ethtool_linkmodes[] = {
729 [MLX5E_FEC_NOFEC] = ETHTOOL_LINK_MODE_FEC_NONE_BIT,
730 [MLX5E_FEC_FIRECODE] = ETHTOOL_LINK_MODE_FEC_BASER_BIT,
731 [MLX5E_FEC_RS_528_514] = ETHTOOL_LINK_MODE_FEC_RS_BIT,
732 [MLX5E_FEC_RS_544_514] = ETHTOOL_LINK_MODE_FEC_RS_BIT,
733 [MLX5E_FEC_LLRS_272_257_1] = ETHTOOL_LINK_MODE_FEC_LLRS_BIT,
734 };
735
get_fec_supported_advertised(struct mlx5_core_dev * dev,struct ethtool_link_ksettings * link_ksettings)736 static int get_fec_supported_advertised(struct mlx5_core_dev *dev,
737 struct ethtool_link_ksettings *link_ksettings)
738 {
739 unsigned long active_fec_long;
740 u32 active_fec;
741 u32 bitn;
742 int err;
743
744 err = mlx5e_get_fec_mode(dev, &active_fec, NULL);
745 if (err)
746 return (err == -EOPNOTSUPP) ? 0 : err;
747
748 MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_NOFEC,
749 ETHTOOL_LINK_MODE_FEC_NONE_BIT);
750 MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_FIRECODE,
751 ETHTOOL_LINK_MODE_FEC_BASER_BIT);
752 MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_RS_528_514,
753 ETHTOOL_LINK_MODE_FEC_RS_BIT);
754 MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_LLRS_272_257_1,
755 ETHTOOL_LINK_MODE_FEC_LLRS_BIT);
756
757 active_fec_long = active_fec;
758 /* active fec is a bit set, find out which bit is set and
759 * advertise the corresponding ethtool bit
760 */
761 bitn = find_first_bit(&active_fec_long, sizeof(active_fec_long) * BITS_PER_BYTE);
762 if (bitn < ARRAY_SIZE(pplm_fec_2_ethtool_linkmodes))
763 __set_bit(pplm_fec_2_ethtool_linkmodes[bitn],
764 link_ksettings->link_modes.advertising);
765
766 return 0;
767 }
768
ptys2ethtool_supported_advertised_port(struct mlx5_core_dev * mdev,struct ethtool_link_ksettings * link_ksettings,u32 eth_proto_cap,u8 connector_type)769 static void ptys2ethtool_supported_advertised_port(struct mlx5_core_dev *mdev,
770 struct ethtool_link_ksettings *link_ksettings,
771 u32 eth_proto_cap, u8 connector_type)
772 {
773 if (!MLX5_CAP_PCAM_FEATURE(mdev, ptys_connector_type)) {
774 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
775 | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
776 | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
777 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
778 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
779 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
780 ethtool_link_ksettings_add_link_mode(link_ksettings,
781 supported,
782 FIBRE);
783 ethtool_link_ksettings_add_link_mode(link_ksettings,
784 advertising,
785 FIBRE);
786 }
787
788 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
789 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
790 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
791 | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
792 | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
793 ethtool_link_ksettings_add_link_mode(link_ksettings,
794 supported,
795 Backplane);
796 ethtool_link_ksettings_add_link_mode(link_ksettings,
797 advertising,
798 Backplane);
799 }
800 return;
801 }
802
803 switch (connector_type) {
804 case MLX5E_PORT_TP:
805 ethtool_link_ksettings_add_link_mode(link_ksettings,
806 supported, TP);
807 ethtool_link_ksettings_add_link_mode(link_ksettings,
808 advertising, TP);
809 break;
810 case MLX5E_PORT_AUI:
811 ethtool_link_ksettings_add_link_mode(link_ksettings,
812 supported, AUI);
813 ethtool_link_ksettings_add_link_mode(link_ksettings,
814 advertising, AUI);
815 break;
816 case MLX5E_PORT_BNC:
817 ethtool_link_ksettings_add_link_mode(link_ksettings,
818 supported, BNC);
819 ethtool_link_ksettings_add_link_mode(link_ksettings,
820 advertising, BNC);
821 break;
822 case MLX5E_PORT_MII:
823 ethtool_link_ksettings_add_link_mode(link_ksettings,
824 supported, MII);
825 ethtool_link_ksettings_add_link_mode(link_ksettings,
826 advertising, MII);
827 break;
828 case MLX5E_PORT_FIBRE:
829 ethtool_link_ksettings_add_link_mode(link_ksettings,
830 supported, FIBRE);
831 ethtool_link_ksettings_add_link_mode(link_ksettings,
832 advertising, FIBRE);
833 break;
834 case MLX5E_PORT_DA:
835 ethtool_link_ksettings_add_link_mode(link_ksettings,
836 supported, Backplane);
837 ethtool_link_ksettings_add_link_mode(link_ksettings,
838 advertising, Backplane);
839 break;
840 case MLX5E_PORT_NONE:
841 case MLX5E_PORT_OTHER:
842 default:
843 break;
844 }
845 }
846
get_speed_duplex(struct net_device * netdev,u32 eth_proto_oper,bool force_legacy,u16 data_rate_oper,struct ethtool_link_ksettings * link_ksettings)847 static void get_speed_duplex(struct net_device *netdev,
848 u32 eth_proto_oper, bool force_legacy,
849 u16 data_rate_oper,
850 struct ethtool_link_ksettings *link_ksettings)
851 {
852 struct mlx5e_priv *priv = netdev_priv(netdev);
853 u32 speed = SPEED_UNKNOWN;
854 u8 duplex = DUPLEX_UNKNOWN;
855
856 if (!netif_carrier_ok(netdev))
857 goto out;
858
859 speed = mlx5e_port_ptys2speed(priv->mdev, eth_proto_oper, force_legacy);
860 if (!speed) {
861 if (data_rate_oper)
862 speed = 100 * data_rate_oper;
863 else
864 speed = SPEED_UNKNOWN;
865 goto out;
866 }
867
868 duplex = DUPLEX_FULL;
869
870 out:
871 link_ksettings->base.speed = speed;
872 link_ksettings->base.duplex = duplex;
873 }
874
get_supported(struct mlx5_core_dev * mdev,u32 eth_proto_cap,struct ethtool_link_ksettings * link_ksettings)875 static void get_supported(struct mlx5_core_dev *mdev, u32 eth_proto_cap,
876 struct ethtool_link_ksettings *link_ksettings)
877 {
878 unsigned long *supported = link_ksettings->link_modes.supported;
879 ptys2ethtool_supported_link(mdev, supported, eth_proto_cap);
880
881 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
882 }
883
get_advertising(u32 eth_proto_cap,u8 tx_pause,u8 rx_pause,struct ethtool_link_ksettings * link_ksettings,bool ext)884 static void get_advertising(u32 eth_proto_cap, u8 tx_pause, u8 rx_pause,
885 struct ethtool_link_ksettings *link_ksettings,
886 bool ext)
887 {
888 unsigned long *advertising = link_ksettings->link_modes.advertising;
889 ptys2ethtool_adver_link(advertising, eth_proto_cap, ext);
890
891 if (rx_pause)
892 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
893 if (tx_pause ^ rx_pause)
894 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
895 }
896
897 static int ptys2connector_type[MLX5E_CONNECTOR_TYPE_NUMBER] = {
898 [MLX5E_PORT_UNKNOWN] = PORT_OTHER,
899 [MLX5E_PORT_NONE] = PORT_NONE,
900 [MLX5E_PORT_TP] = PORT_TP,
901 [MLX5E_PORT_AUI] = PORT_AUI,
902 [MLX5E_PORT_BNC] = PORT_BNC,
903 [MLX5E_PORT_MII] = PORT_MII,
904 [MLX5E_PORT_FIBRE] = PORT_FIBRE,
905 [MLX5E_PORT_DA] = PORT_DA,
906 [MLX5E_PORT_OTHER] = PORT_OTHER,
907 };
908
get_connector_port(struct mlx5_core_dev * mdev,u32 eth_proto,u8 connector_type)909 static u8 get_connector_port(struct mlx5_core_dev *mdev, u32 eth_proto, u8 connector_type)
910 {
911 if (MLX5_CAP_PCAM_FEATURE(mdev, ptys_connector_type))
912 return ptys2connector_type[connector_type];
913
914 if (eth_proto &
915 (MLX5E_PROT_MASK(MLX5E_10GBASE_SR) |
916 MLX5E_PROT_MASK(MLX5E_40GBASE_SR4) |
917 MLX5E_PROT_MASK(MLX5E_100GBASE_SR4) |
918 MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
919 return PORT_FIBRE;
920 }
921
922 if (eth_proto &
923 (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4) |
924 MLX5E_PROT_MASK(MLX5E_10GBASE_CR) |
925 MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
926 return PORT_DA;
927 }
928
929 if (eth_proto &
930 (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4) |
931 MLX5E_PROT_MASK(MLX5E_10GBASE_KR) |
932 MLX5E_PROT_MASK(MLX5E_40GBASE_KR4) |
933 MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
934 return PORT_NONE;
935 }
936
937 return PORT_OTHER;
938 }
939
get_lp_advertising(struct mlx5_core_dev * mdev,u32 eth_proto_lp,struct ethtool_link_ksettings * link_ksettings)940 static void get_lp_advertising(struct mlx5_core_dev *mdev, u32 eth_proto_lp,
941 struct ethtool_link_ksettings *link_ksettings)
942 {
943 unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
944 bool ext = mlx5e_ptys_ext_supported(mdev);
945
946 ptys2ethtool_adver_link(lp_advertising, eth_proto_lp, ext);
947 }
948
mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv * priv,struct ethtool_link_ksettings * link_ksettings)949 int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,
950 struct ethtool_link_ksettings *link_ksettings)
951 {
952 struct mlx5_core_dev *mdev = priv->mdev;
953 u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {};
954 u32 eth_proto_admin;
955 u8 an_disable_admin;
956 u16 data_rate_oper;
957 u32 eth_proto_oper;
958 u32 eth_proto_cap;
959 u8 connector_type;
960 u32 rx_pause = 0;
961 u32 tx_pause = 0;
962 u32 eth_proto_lp;
963 bool admin_ext;
964 u8 an_status;
965 bool ext;
966 int err;
967
968 err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
969 if (err) {
970 netdev_err(priv->netdev, "%s: query port ptys failed: %d\n",
971 __func__, err);
972 goto err_query_regs;
973 }
974 ext = !!MLX5_GET_ETH_PROTO(ptys_reg, out, true, eth_proto_capability);
975 eth_proto_cap = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
976 eth_proto_capability);
977 eth_proto_admin = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
978 eth_proto_admin);
979 /* Fields: eth_proto_admin and ext_eth_proto_admin are
980 * mutually exclusive. Hence try reading legacy advertising
981 * when extended advertising is zero.
982 * admin_ext indicates which proto_admin (ext vs. legacy)
983 * should be read and interpreted
984 */
985 admin_ext = ext;
986 if (ext && !eth_proto_admin) {
987 eth_proto_admin = MLX5_GET_ETH_PROTO(ptys_reg, out, false,
988 eth_proto_admin);
989 admin_ext = false;
990 }
991
992 eth_proto_oper = MLX5_GET_ETH_PROTO(ptys_reg, out, admin_ext,
993 eth_proto_oper);
994 eth_proto_lp = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
995 an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
996 an_status = MLX5_GET(ptys_reg, out, an_status);
997 connector_type = MLX5_GET(ptys_reg, out, connector_type);
998 data_rate_oper = MLX5_GET(ptys_reg, out, data_rate_oper);
999
1000 mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
1001
1002 ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
1003 ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
1004
1005 get_supported(mdev, eth_proto_cap, link_ksettings);
1006 get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings,
1007 admin_ext);
1008 get_speed_duplex(priv->netdev, eth_proto_oper, !admin_ext,
1009 data_rate_oper, link_ksettings);
1010
1011 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1012 connector_type = connector_type < MLX5E_CONNECTOR_TYPE_NUMBER ?
1013 connector_type : MLX5E_PORT_UNKNOWN;
1014 link_ksettings->base.port = get_connector_port(mdev, eth_proto_oper, connector_type);
1015 ptys2ethtool_supported_advertised_port(mdev, link_ksettings, eth_proto_admin,
1016 connector_type);
1017 get_lp_advertising(mdev, eth_proto_lp, link_ksettings);
1018
1019 if (an_status == MLX5_AN_COMPLETE)
1020 ethtool_link_ksettings_add_link_mode(link_ksettings,
1021 lp_advertising, Autoneg);
1022
1023 link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
1024 AUTONEG_ENABLE;
1025 ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
1026 Autoneg);
1027
1028 err = get_fec_supported_advertised(mdev, link_ksettings);
1029 if (err) {
1030 netdev_dbg(priv->netdev, "%s: FEC caps query failed: %d\n",
1031 __func__, err);
1032 err = 0; /* don't fail caps query because of FEC error */
1033 }
1034
1035 if (!an_disable_admin)
1036 ethtool_link_ksettings_add_link_mode(link_ksettings,
1037 advertising, Autoneg);
1038
1039 err_query_regs:
1040 return err;
1041 }
1042
mlx5e_get_link_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * link_ksettings)1043 static int mlx5e_get_link_ksettings(struct net_device *netdev,
1044 struct ethtool_link_ksettings *link_ksettings)
1045 {
1046 struct mlx5e_priv *priv = netdev_priv(netdev);
1047
1048 return mlx5e_ethtool_get_link_ksettings(priv, link_ksettings);
1049 }
1050
mlx5e_speed_validate(struct net_device * netdev,bool ext,const unsigned long link_modes,u8 autoneg)1051 static int mlx5e_speed_validate(struct net_device *netdev, bool ext,
1052 const unsigned long link_modes, u8 autoneg)
1053 {
1054 /* Extended link-mode has no speed limitations. */
1055 if (ext)
1056 return 0;
1057
1058 if ((link_modes & MLX5E_PROT_MASK(MLX5E_56GBASE_R4)) &&
1059 autoneg != AUTONEG_ENABLE) {
1060 netdev_err(netdev, "%s: 56G link speed requires autoneg enabled\n",
1061 __func__);
1062 return -EINVAL;
1063 }
1064 return 0;
1065 }
1066
mlx5e_ethtool2ptys_adver_link(const unsigned long * link_modes)1067 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
1068 {
1069 u32 i, ptys_modes = 0;
1070
1071 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
1072 if (*ptys2legacy_ethtool_table[i].advertised == 0)
1073 continue;
1074 if (bitmap_intersects(ptys2legacy_ethtool_table[i].advertised,
1075 link_modes,
1076 __ETHTOOL_LINK_MODE_MASK_NBITS))
1077 ptys_modes |= MLX5E_PROT_MASK(i);
1078 }
1079
1080 return ptys_modes;
1081 }
1082
mlx5e_ethtool2ptys_ext_adver_link(const unsigned long * link_modes)1083 static u32 mlx5e_ethtool2ptys_ext_adver_link(const unsigned long *link_modes)
1084 {
1085 u32 i, ptys_modes = 0;
1086 unsigned long modes[2];
1087
1088 for (i = 0; i < MLX5E_EXT_LINK_MODES_NUMBER; ++i) {
1089 if (ptys2ext_ethtool_table[i].advertised[0] == 0 &&
1090 ptys2ext_ethtool_table[i].advertised[1] == 0)
1091 continue;
1092 memset(modes, 0, sizeof(modes));
1093 bitmap_and(modes, ptys2ext_ethtool_table[i].advertised,
1094 link_modes, __ETHTOOL_LINK_MODE_MASK_NBITS);
1095
1096 if (modes[0] == ptys2ext_ethtool_table[i].advertised[0] &&
1097 modes[1] == ptys2ext_ethtool_table[i].advertised[1])
1098 ptys_modes |= MLX5E_PROT_MASK(i);
1099 }
1100 return ptys_modes;
1101 }
1102
ext_link_mode_requested(const unsigned long * adver)1103 static bool ext_link_mode_requested(const unsigned long *adver)
1104 {
1105 #define MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT ETHTOOL_LINK_MODE_50000baseKR_Full_BIT
1106 int size = __ETHTOOL_LINK_MODE_MASK_NBITS - MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT;
1107 __ETHTOOL_DECLARE_LINK_MODE_MASK(modes) = {0,};
1108
1109 bitmap_set(modes, MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT, size);
1110 return bitmap_intersects(modes, adver, __ETHTOOL_LINK_MODE_MASK_NBITS);
1111 }
1112
ext_requested(u8 autoneg,const unsigned long * adver,bool ext_supported)1113 static bool ext_requested(u8 autoneg, const unsigned long *adver, bool ext_supported)
1114 {
1115 bool ext_link_mode = ext_link_mode_requested(adver);
1116
1117 return autoneg == AUTONEG_ENABLE ? ext_link_mode : ext_supported;
1118 }
1119
mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv * priv,const struct ethtool_link_ksettings * link_ksettings)1120 int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,
1121 const struct ethtool_link_ksettings *link_ksettings)
1122 {
1123 struct mlx5_core_dev *mdev = priv->mdev;
1124 struct mlx5e_port_eth_proto eproto;
1125 const unsigned long *adver;
1126 bool an_changes = false;
1127 u8 an_disable_admin;
1128 bool ext_supported;
1129 u8 an_disable_cap;
1130 bool an_disable;
1131 u32 link_modes;
1132 u8 an_status;
1133 u8 autoneg;
1134 u32 speed;
1135 bool ext;
1136 int err;
1137
1138 u32 (*ethtool2ptys_adver_func)(const unsigned long *adver);
1139
1140 adver = link_ksettings->link_modes.advertising;
1141 autoneg = link_ksettings->base.autoneg;
1142 speed = link_ksettings->base.speed;
1143
1144 ext_supported = mlx5e_ptys_ext_supported(mdev);
1145 ext = ext_requested(autoneg, adver, ext_supported);
1146 if (!ext_supported && ext)
1147 return -EOPNOTSUPP;
1148
1149 ethtool2ptys_adver_func = ext ? mlx5e_ethtool2ptys_ext_adver_link :
1150 mlx5e_ethtool2ptys_adver_link;
1151 err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto);
1152 if (err) {
1153 netdev_err(priv->netdev, "%s: query port eth proto failed: %d\n",
1154 __func__, err);
1155 goto out;
1156 }
1157 link_modes = autoneg == AUTONEG_ENABLE ? ethtool2ptys_adver_func(adver) :
1158 mlx5e_port_speed2linkmodes(mdev, speed, !ext);
1159
1160 err = mlx5e_speed_validate(priv->netdev, ext, link_modes, autoneg);
1161 if (err)
1162 goto out;
1163
1164 link_modes = link_modes & eproto.cap;
1165 if (!link_modes) {
1166 netdev_err(priv->netdev, "%s: Not supported link mode(s) requested",
1167 __func__);
1168 err = -EINVAL;
1169 goto out;
1170 }
1171
1172 mlx5_port_query_eth_autoneg(mdev, &an_status, &an_disable_cap,
1173 &an_disable_admin);
1174
1175 an_disable = autoneg == AUTONEG_DISABLE;
1176 an_changes = ((!an_disable && an_disable_admin) ||
1177 (an_disable && !an_disable_admin));
1178
1179 if (!an_changes && link_modes == eproto.admin)
1180 goto out;
1181
1182 mlx5_port_set_eth_ptys(mdev, an_disable, link_modes, ext);
1183 mlx5_toggle_port_link(mdev);
1184
1185 out:
1186 return err;
1187 }
1188
mlx5e_set_link_ksettings(struct net_device * netdev,const struct ethtool_link_ksettings * link_ksettings)1189 static int mlx5e_set_link_ksettings(struct net_device *netdev,
1190 const struct ethtool_link_ksettings *link_ksettings)
1191 {
1192 struct mlx5e_priv *priv = netdev_priv(netdev);
1193
1194 return mlx5e_ethtool_set_link_ksettings(priv, link_ksettings);
1195 }
1196
mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv * priv)1197 u32 mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv *priv)
1198 {
1199 return sizeof_field(struct mlx5e_rss_params_hash, toeplitz_hash_key);
1200 }
1201
mlx5e_get_rxfh_key_size(struct net_device * netdev)1202 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
1203 {
1204 struct mlx5e_priv *priv = netdev_priv(netdev);
1205
1206 return mlx5e_ethtool_get_rxfh_key_size(priv);
1207 }
1208
mlx5e_ethtool_get_rxfh_indir_size(struct mlx5e_priv * priv)1209 u32 mlx5e_ethtool_get_rxfh_indir_size(struct mlx5e_priv *priv)
1210 {
1211 return MLX5E_INDIR_RQT_SIZE;
1212 }
1213
mlx5e_get_rxfh_indir_size(struct net_device * netdev)1214 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
1215 {
1216 struct mlx5e_priv *priv = netdev_priv(netdev);
1217
1218 return mlx5e_ethtool_get_rxfh_indir_size(priv);
1219 }
1220
mlx5e_get_rxfh_context(struct net_device * dev,u32 * indir,u8 * key,u8 * hfunc,u32 rss_context)1221 static int mlx5e_get_rxfh_context(struct net_device *dev, u32 *indir,
1222 u8 *key, u8 *hfunc, u32 rss_context)
1223 {
1224 struct mlx5e_priv *priv = netdev_priv(dev);
1225 int err;
1226
1227 mutex_lock(&priv->state_lock);
1228 err = mlx5e_rx_res_rss_get_rxfh(priv->rx_res, rss_context, indir, key, hfunc);
1229 mutex_unlock(&priv->state_lock);
1230 return err;
1231 }
1232
mlx5e_set_rxfh_context(struct net_device * dev,const u32 * indir,const u8 * key,const u8 hfunc,u32 * rss_context,bool delete)1233 static int mlx5e_set_rxfh_context(struct net_device *dev, const u32 *indir,
1234 const u8 *key, const u8 hfunc,
1235 u32 *rss_context, bool delete)
1236 {
1237 struct mlx5e_priv *priv = netdev_priv(dev);
1238 int err;
1239
1240 mutex_lock(&priv->state_lock);
1241 if (delete) {
1242 err = mlx5e_rx_res_rss_destroy(priv->rx_res, *rss_context);
1243 goto unlock;
1244 }
1245
1246 if (*rss_context == ETH_RXFH_CONTEXT_ALLOC) {
1247 unsigned int count = priv->channels.params.num_channels;
1248
1249 err = mlx5e_rx_res_rss_init(priv->rx_res, rss_context, count);
1250 if (err)
1251 goto unlock;
1252 }
1253
1254 err = mlx5e_rx_res_rss_set_rxfh(priv->rx_res, *rss_context, indir, key,
1255 hfunc == ETH_RSS_HASH_NO_CHANGE ? NULL : &hfunc);
1256
1257 unlock:
1258 mutex_unlock(&priv->state_lock);
1259 return err;
1260 }
1261
mlx5e_get_rxfh(struct net_device * netdev,u32 * indir,u8 * key,u8 * hfunc)1262 int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
1263 u8 *hfunc)
1264 {
1265 return mlx5e_get_rxfh_context(netdev, indir, key, hfunc, 0);
1266 }
1267
mlx5e_set_rxfh(struct net_device * dev,const u32 * indir,const u8 * key,const u8 hfunc)1268 int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
1269 const u8 *key, const u8 hfunc)
1270 {
1271 struct mlx5e_priv *priv = netdev_priv(dev);
1272 int err;
1273
1274 mutex_lock(&priv->state_lock);
1275 err = mlx5e_rx_res_rss_set_rxfh(priv->rx_res, 0, indir, key,
1276 hfunc == ETH_RSS_HASH_NO_CHANGE ? NULL : &hfunc);
1277 mutex_unlock(&priv->state_lock);
1278 return err;
1279 }
1280
1281 #define MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC 100
1282 #define MLX5E_PFC_PREVEN_TOUT_MAX_MSEC 8000
1283 #define MLX5E_PFC_PREVEN_MINOR_PRECENT 85
1284 #define MLX5E_PFC_PREVEN_TOUT_MIN_MSEC 80
1285 #define MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout) \
1286 max_t(u16, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC, \
1287 (critical_tout * MLX5E_PFC_PREVEN_MINOR_PRECENT) / 100)
1288
mlx5e_get_pfc_prevention_tout(struct net_device * netdev,u16 * pfc_prevention_tout)1289 static int mlx5e_get_pfc_prevention_tout(struct net_device *netdev,
1290 u16 *pfc_prevention_tout)
1291 {
1292 struct mlx5e_priv *priv = netdev_priv(netdev);
1293 struct mlx5_core_dev *mdev = priv->mdev;
1294
1295 if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1296 !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1297 return -EOPNOTSUPP;
1298
1299 return mlx5_query_port_stall_watermark(mdev, pfc_prevention_tout, NULL);
1300 }
1301
mlx5e_set_pfc_prevention_tout(struct net_device * netdev,u16 pfc_preven)1302 static int mlx5e_set_pfc_prevention_tout(struct net_device *netdev,
1303 u16 pfc_preven)
1304 {
1305 struct mlx5e_priv *priv = netdev_priv(netdev);
1306 struct mlx5_core_dev *mdev = priv->mdev;
1307 u16 critical_tout;
1308 u16 minor;
1309
1310 if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1311 !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1312 return -EOPNOTSUPP;
1313
1314 critical_tout = (pfc_preven == PFC_STORM_PREVENTION_AUTO) ?
1315 MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC :
1316 pfc_preven;
1317
1318 if (critical_tout != PFC_STORM_PREVENTION_DISABLE &&
1319 (critical_tout > MLX5E_PFC_PREVEN_TOUT_MAX_MSEC ||
1320 critical_tout < MLX5E_PFC_PREVEN_TOUT_MIN_MSEC)) {
1321 netdev_info(netdev, "%s: pfc prevention tout not in range (%d-%d)\n",
1322 __func__, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC,
1323 MLX5E_PFC_PREVEN_TOUT_MAX_MSEC);
1324 return -EINVAL;
1325 }
1326
1327 minor = MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout);
1328 return mlx5_set_port_stall_watermark(mdev, critical_tout,
1329 minor);
1330 }
1331
mlx5e_get_tunable(struct net_device * dev,const struct ethtool_tunable * tuna,void * data)1332 static int mlx5e_get_tunable(struct net_device *dev,
1333 const struct ethtool_tunable *tuna,
1334 void *data)
1335 {
1336 int err;
1337
1338 switch (tuna->id) {
1339 case ETHTOOL_PFC_PREVENTION_TOUT:
1340 err = mlx5e_get_pfc_prevention_tout(dev, data);
1341 break;
1342 default:
1343 err = -EINVAL;
1344 break;
1345 }
1346
1347 return err;
1348 }
1349
mlx5e_set_tunable(struct net_device * dev,const struct ethtool_tunable * tuna,const void * data)1350 static int mlx5e_set_tunable(struct net_device *dev,
1351 const struct ethtool_tunable *tuna,
1352 const void *data)
1353 {
1354 struct mlx5e_priv *priv = netdev_priv(dev);
1355 int err;
1356
1357 mutex_lock(&priv->state_lock);
1358
1359 switch (tuna->id) {
1360 case ETHTOOL_PFC_PREVENTION_TOUT:
1361 err = mlx5e_set_pfc_prevention_tout(dev, *(u16 *)data);
1362 break;
1363 default:
1364 err = -EINVAL;
1365 break;
1366 }
1367
1368 mutex_unlock(&priv->state_lock);
1369 return err;
1370 }
1371
mlx5e_get_pause_stats(struct net_device * netdev,struct ethtool_pause_stats * pause_stats)1372 static void mlx5e_get_pause_stats(struct net_device *netdev,
1373 struct ethtool_pause_stats *pause_stats)
1374 {
1375 struct mlx5e_priv *priv = netdev_priv(netdev);
1376
1377 mlx5e_stats_pause_get(priv, pause_stats);
1378 }
1379
mlx5e_ethtool_get_pauseparam(struct mlx5e_priv * priv,struct ethtool_pauseparam * pauseparam)1380 void mlx5e_ethtool_get_pauseparam(struct mlx5e_priv *priv,
1381 struct ethtool_pauseparam *pauseparam)
1382 {
1383 struct mlx5_core_dev *mdev = priv->mdev;
1384 int err;
1385
1386 err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1387 &pauseparam->tx_pause);
1388 if (err) {
1389 netdev_err(priv->netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1390 __func__, err);
1391 }
1392 }
1393
mlx5e_get_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pauseparam)1394 static void mlx5e_get_pauseparam(struct net_device *netdev,
1395 struct ethtool_pauseparam *pauseparam)
1396 {
1397 struct mlx5e_priv *priv = netdev_priv(netdev);
1398
1399 mlx5e_ethtool_get_pauseparam(priv, pauseparam);
1400 }
1401
mlx5e_ethtool_set_pauseparam(struct mlx5e_priv * priv,struct ethtool_pauseparam * pauseparam)1402 int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv *priv,
1403 struct ethtool_pauseparam *pauseparam)
1404 {
1405 struct mlx5_core_dev *mdev = priv->mdev;
1406 int err;
1407
1408 if (!MLX5_CAP_GEN(mdev, vport_group_manager))
1409 return -EOPNOTSUPP;
1410
1411 if (pauseparam->autoneg)
1412 return -EINVAL;
1413
1414 err = mlx5_set_port_pause(mdev,
1415 pauseparam->rx_pause ? 1 : 0,
1416 pauseparam->tx_pause ? 1 : 0);
1417 if (err) {
1418 netdev_err(priv->netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1419 __func__, err);
1420 }
1421
1422 return err;
1423 }
1424
mlx5e_set_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pauseparam)1425 static int mlx5e_set_pauseparam(struct net_device *netdev,
1426 struct ethtool_pauseparam *pauseparam)
1427 {
1428 struct mlx5e_priv *priv = netdev_priv(netdev);
1429
1430 return mlx5e_ethtool_set_pauseparam(priv, pauseparam);
1431 }
1432
mlx5e_ethtool_get_ts_info(struct mlx5e_priv * priv,struct ethtool_ts_info * info)1433 int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,
1434 struct ethtool_ts_info *info)
1435 {
1436 struct mlx5_core_dev *mdev = priv->mdev;
1437
1438 info->phc_index = mlx5_clock_get_ptp_index(mdev);
1439
1440 if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz) ||
1441 info->phc_index == -1)
1442 return 0;
1443
1444 info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
1445 SOF_TIMESTAMPING_RX_HARDWARE |
1446 SOF_TIMESTAMPING_RAW_HARDWARE;
1447
1448 info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1449 BIT(HWTSTAMP_TX_ON);
1450
1451 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1452 BIT(HWTSTAMP_FILTER_ALL);
1453
1454 return 0;
1455 }
1456
mlx5e_get_ts_info(struct net_device * dev,struct ethtool_ts_info * info)1457 static int mlx5e_get_ts_info(struct net_device *dev,
1458 struct ethtool_ts_info *info)
1459 {
1460 struct mlx5e_priv *priv = netdev_priv(dev);
1461
1462 return mlx5e_ethtool_get_ts_info(priv, info);
1463 }
1464
mlx5e_get_wol_supported(struct mlx5_core_dev * mdev)1465 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1466 {
1467 __u32 ret = 0;
1468
1469 if (MLX5_CAP_GEN(mdev, wol_g))
1470 ret |= WAKE_MAGIC;
1471
1472 if (MLX5_CAP_GEN(mdev, wol_s))
1473 ret |= WAKE_MAGICSECURE;
1474
1475 if (MLX5_CAP_GEN(mdev, wol_a))
1476 ret |= WAKE_ARP;
1477
1478 if (MLX5_CAP_GEN(mdev, wol_b))
1479 ret |= WAKE_BCAST;
1480
1481 if (MLX5_CAP_GEN(mdev, wol_m))
1482 ret |= WAKE_MCAST;
1483
1484 if (MLX5_CAP_GEN(mdev, wol_u))
1485 ret |= WAKE_UCAST;
1486
1487 if (MLX5_CAP_GEN(mdev, wol_p))
1488 ret |= WAKE_PHY;
1489
1490 return ret;
1491 }
1492
mlx5e_reformat_wol_mode_mlx5_to_linux(u8 mode)1493 static __u32 mlx5e_reformat_wol_mode_mlx5_to_linux(u8 mode)
1494 {
1495 __u32 ret = 0;
1496
1497 if (mode & MLX5_WOL_MAGIC)
1498 ret |= WAKE_MAGIC;
1499
1500 if (mode & MLX5_WOL_SECURED_MAGIC)
1501 ret |= WAKE_MAGICSECURE;
1502
1503 if (mode & MLX5_WOL_ARP)
1504 ret |= WAKE_ARP;
1505
1506 if (mode & MLX5_WOL_BROADCAST)
1507 ret |= WAKE_BCAST;
1508
1509 if (mode & MLX5_WOL_MULTICAST)
1510 ret |= WAKE_MCAST;
1511
1512 if (mode & MLX5_WOL_UNICAST)
1513 ret |= WAKE_UCAST;
1514
1515 if (mode & MLX5_WOL_PHY_ACTIVITY)
1516 ret |= WAKE_PHY;
1517
1518 return ret;
1519 }
1520
mlx5e_reformat_wol_mode_linux_to_mlx5(__u32 mode)1521 static u8 mlx5e_reformat_wol_mode_linux_to_mlx5(__u32 mode)
1522 {
1523 u8 ret = 0;
1524
1525 if (mode & WAKE_MAGIC)
1526 ret |= MLX5_WOL_MAGIC;
1527
1528 if (mode & WAKE_MAGICSECURE)
1529 ret |= MLX5_WOL_SECURED_MAGIC;
1530
1531 if (mode & WAKE_ARP)
1532 ret |= MLX5_WOL_ARP;
1533
1534 if (mode & WAKE_BCAST)
1535 ret |= MLX5_WOL_BROADCAST;
1536
1537 if (mode & WAKE_MCAST)
1538 ret |= MLX5_WOL_MULTICAST;
1539
1540 if (mode & WAKE_UCAST)
1541 ret |= MLX5_WOL_UNICAST;
1542
1543 if (mode & WAKE_PHY)
1544 ret |= MLX5_WOL_PHY_ACTIVITY;
1545
1546 return ret;
1547 }
1548
mlx5e_get_wol(struct net_device * netdev,struct ethtool_wolinfo * wol)1549 static void mlx5e_get_wol(struct net_device *netdev,
1550 struct ethtool_wolinfo *wol)
1551 {
1552 struct mlx5e_priv *priv = netdev_priv(netdev);
1553 struct mlx5_core_dev *mdev = priv->mdev;
1554 u8 mlx5_wol_mode;
1555 int err;
1556
1557 memset(wol, 0, sizeof(*wol));
1558
1559 wol->supported = mlx5e_get_wol_supported(mdev);
1560 if (!wol->supported)
1561 return;
1562
1563 err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1564 if (err)
1565 return;
1566
1567 wol->wolopts = mlx5e_reformat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1568 }
1569
mlx5e_set_wol(struct net_device * netdev,struct ethtool_wolinfo * wol)1570 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1571 {
1572 struct mlx5e_priv *priv = netdev_priv(netdev);
1573 struct mlx5_core_dev *mdev = priv->mdev;
1574 __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1575 u32 mlx5_wol_mode;
1576
1577 if (!wol_supported)
1578 return -EOPNOTSUPP;
1579
1580 if (wol->wolopts & ~wol_supported)
1581 return -EINVAL;
1582
1583 mlx5_wol_mode = mlx5e_reformat_wol_mode_linux_to_mlx5(wol->wolopts);
1584
1585 return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1586 }
1587
mlx5e_get_fec_stats(struct net_device * netdev,struct ethtool_fec_stats * fec_stats)1588 static void mlx5e_get_fec_stats(struct net_device *netdev,
1589 struct ethtool_fec_stats *fec_stats)
1590 {
1591 struct mlx5e_priv *priv = netdev_priv(netdev);
1592
1593 mlx5e_stats_fec_get(priv, fec_stats);
1594 }
1595
mlx5e_get_fecparam(struct net_device * netdev,struct ethtool_fecparam * fecparam)1596 static int mlx5e_get_fecparam(struct net_device *netdev,
1597 struct ethtool_fecparam *fecparam)
1598 {
1599 struct mlx5e_priv *priv = netdev_priv(netdev);
1600 struct mlx5_core_dev *mdev = priv->mdev;
1601 u16 fec_configured;
1602 u32 fec_active;
1603 int err;
1604
1605 err = mlx5e_get_fec_mode(mdev, &fec_active, &fec_configured);
1606
1607 if (err)
1608 return err;
1609
1610 fecparam->active_fec = pplm2ethtool_fec((unsigned long)fec_active,
1611 sizeof(unsigned long) * BITS_PER_BYTE);
1612
1613 if (!fecparam->active_fec)
1614 return -EOPNOTSUPP;
1615
1616 fecparam->fec = pplm2ethtool_fec((unsigned long)fec_configured,
1617 sizeof(unsigned long) * BITS_PER_BYTE);
1618
1619 return 0;
1620 }
1621
mlx5e_set_fecparam(struct net_device * netdev,struct ethtool_fecparam * fecparam)1622 static int mlx5e_set_fecparam(struct net_device *netdev,
1623 struct ethtool_fecparam *fecparam)
1624 {
1625 struct mlx5e_priv *priv = netdev_priv(netdev);
1626 struct mlx5_core_dev *mdev = priv->mdev;
1627 unsigned long fec_bitmap;
1628 u16 fec_policy = 0;
1629 int mode;
1630 int err;
1631
1632 bitmap_from_arr32(&fec_bitmap, &fecparam->fec, sizeof(fecparam->fec) * BITS_PER_BYTE);
1633 if (bitmap_weight(&fec_bitmap, ETHTOOL_FEC_LLRS_BIT + 1) > 1)
1634 return -EOPNOTSUPP;
1635
1636 for (mode = 0; mode < ARRAY_SIZE(pplm_fec_2_ethtool); mode++) {
1637 if (!(pplm_fec_2_ethtool[mode] & fecparam->fec))
1638 continue;
1639 fec_policy |= (1 << mode);
1640 break;
1641 }
1642
1643 err = mlx5e_set_fec_mode(mdev, fec_policy);
1644
1645 if (err)
1646 return err;
1647
1648 mlx5_toggle_port_link(mdev);
1649
1650 return 0;
1651 }
1652
mlx5e_get_msglevel(struct net_device * dev)1653 static u32 mlx5e_get_msglevel(struct net_device *dev)
1654 {
1655 return ((struct mlx5e_priv *)netdev_priv(dev))->msglevel;
1656 }
1657
mlx5e_set_msglevel(struct net_device * dev,u32 val)1658 static void mlx5e_set_msglevel(struct net_device *dev, u32 val)
1659 {
1660 ((struct mlx5e_priv *)netdev_priv(dev))->msglevel = val;
1661 }
1662
mlx5e_set_phys_id(struct net_device * dev,enum ethtool_phys_id_state state)1663 static int mlx5e_set_phys_id(struct net_device *dev,
1664 enum ethtool_phys_id_state state)
1665 {
1666 struct mlx5e_priv *priv = netdev_priv(dev);
1667 struct mlx5_core_dev *mdev = priv->mdev;
1668 u16 beacon_duration;
1669
1670 if (!MLX5_CAP_GEN(mdev, beacon_led))
1671 return -EOPNOTSUPP;
1672
1673 switch (state) {
1674 case ETHTOOL_ID_ACTIVE:
1675 beacon_duration = MLX5_BEACON_DURATION_INF;
1676 break;
1677 case ETHTOOL_ID_INACTIVE:
1678 beacon_duration = MLX5_BEACON_DURATION_OFF;
1679 break;
1680 default:
1681 return -EOPNOTSUPP;
1682 }
1683
1684 return mlx5_set_port_beacon(mdev, beacon_duration);
1685 }
1686
mlx5e_get_module_info(struct net_device * netdev,struct ethtool_modinfo * modinfo)1687 static int mlx5e_get_module_info(struct net_device *netdev,
1688 struct ethtool_modinfo *modinfo)
1689 {
1690 struct mlx5e_priv *priv = netdev_priv(netdev);
1691 struct mlx5_core_dev *dev = priv->mdev;
1692 int size_read = 0;
1693 u8 data[4] = {0};
1694
1695 size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1696 if (size_read < 2)
1697 return -EIO;
1698
1699 /* data[0] = identifier byte */
1700 switch (data[0]) {
1701 case MLX5_MODULE_ID_QSFP:
1702 modinfo->type = ETH_MODULE_SFF_8436;
1703 modinfo->eeprom_len = ETH_MODULE_SFF_8436_MAX_LEN;
1704 break;
1705 case MLX5_MODULE_ID_QSFP_PLUS:
1706 case MLX5_MODULE_ID_QSFP28:
1707 /* data[1] = revision id */
1708 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1709 modinfo->type = ETH_MODULE_SFF_8636;
1710 modinfo->eeprom_len = ETH_MODULE_SFF_8636_MAX_LEN;
1711 } else {
1712 modinfo->type = ETH_MODULE_SFF_8436;
1713 modinfo->eeprom_len = ETH_MODULE_SFF_8436_MAX_LEN;
1714 }
1715 break;
1716 case MLX5_MODULE_ID_SFP:
1717 modinfo->type = ETH_MODULE_SFF_8472;
1718 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1719 break;
1720 default:
1721 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1722 __func__, data[0]);
1723 return -EINVAL;
1724 }
1725
1726 return 0;
1727 }
1728
mlx5e_get_module_eeprom(struct net_device * netdev,struct ethtool_eeprom * ee,u8 * data)1729 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1730 struct ethtool_eeprom *ee,
1731 u8 *data)
1732 {
1733 struct mlx5e_priv *priv = netdev_priv(netdev);
1734 struct mlx5_core_dev *mdev = priv->mdev;
1735 int offset = ee->offset;
1736 int size_read;
1737 int i = 0;
1738
1739 if (!ee->len)
1740 return -EINVAL;
1741
1742 memset(data, 0, ee->len);
1743
1744 while (i < ee->len) {
1745 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1746 data + i);
1747
1748 if (!size_read)
1749 /* Done reading */
1750 return 0;
1751
1752 if (size_read < 0) {
1753 netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1754 __func__, size_read);
1755 return 0;
1756 }
1757
1758 i += size_read;
1759 offset += size_read;
1760 }
1761
1762 return 0;
1763 }
1764
mlx5e_get_module_eeprom_by_page(struct net_device * netdev,const struct ethtool_module_eeprom * page_data,struct netlink_ext_ack * extack)1765 static int mlx5e_get_module_eeprom_by_page(struct net_device *netdev,
1766 const struct ethtool_module_eeprom *page_data,
1767 struct netlink_ext_ack *extack)
1768 {
1769 struct mlx5e_priv *priv = netdev_priv(netdev);
1770 struct mlx5_module_eeprom_query_params query;
1771 struct mlx5_core_dev *mdev = priv->mdev;
1772 u8 *data = page_data->data;
1773 int size_read;
1774 int i = 0;
1775
1776 if (!page_data->length)
1777 return -EINVAL;
1778
1779 memset(data, 0, page_data->length);
1780
1781 query.offset = page_data->offset;
1782 query.i2c_address = page_data->i2c_address;
1783 query.bank = page_data->bank;
1784 query.page = page_data->page;
1785 while (i < page_data->length) {
1786 query.size = page_data->length - i;
1787 size_read = mlx5_query_module_eeprom_by_page(mdev, &query, data + i);
1788
1789 /* Done reading, return how many bytes was read */
1790 if (!size_read)
1791 return i;
1792
1793 if (size_read == -EINVAL)
1794 return -EINVAL;
1795 if (size_read < 0) {
1796 netdev_err(priv->netdev, "%s: mlx5_query_module_eeprom_by_page failed:0x%x\n",
1797 __func__, size_read);
1798 return i;
1799 }
1800
1801 i += size_read;
1802 query.offset += size_read;
1803 }
1804
1805 return i;
1806 }
1807
mlx5e_ethtool_flash_device(struct mlx5e_priv * priv,struct ethtool_flash * flash)1808 int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,
1809 struct ethtool_flash *flash)
1810 {
1811 struct mlx5_core_dev *mdev = priv->mdev;
1812 struct net_device *dev = priv->netdev;
1813 const struct firmware *fw;
1814 int err;
1815
1816 if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
1817 return -EOPNOTSUPP;
1818
1819 err = request_firmware_direct(&fw, flash->data, &dev->dev);
1820 if (err)
1821 return err;
1822
1823 dev_hold(dev);
1824 rtnl_unlock();
1825
1826 err = mlx5_firmware_flash(mdev, fw, NULL);
1827 release_firmware(fw);
1828
1829 rtnl_lock();
1830 dev_put(dev);
1831 return err;
1832 }
1833
mlx5e_flash_device(struct net_device * dev,struct ethtool_flash * flash)1834 static int mlx5e_flash_device(struct net_device *dev,
1835 struct ethtool_flash *flash)
1836 {
1837 struct mlx5e_priv *priv = netdev_priv(dev);
1838
1839 return mlx5e_ethtool_flash_device(priv, flash);
1840 }
1841
set_pflag_cqe_based_moder(struct net_device * netdev,bool enable,bool is_rx_cq)1842 static int set_pflag_cqe_based_moder(struct net_device *netdev, bool enable,
1843 bool is_rx_cq)
1844 {
1845 struct mlx5e_priv *priv = netdev_priv(netdev);
1846 struct mlx5_core_dev *mdev = priv->mdev;
1847 struct mlx5e_params new_params;
1848 bool mode_changed;
1849 u8 cq_period_mode, current_cq_period_mode;
1850
1851 cq_period_mode = enable ?
1852 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1853 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1854 current_cq_period_mode = is_rx_cq ?
1855 priv->channels.params.rx_cq_moderation.cq_period_mode :
1856 priv->channels.params.tx_cq_moderation.cq_period_mode;
1857 mode_changed = cq_period_mode != current_cq_period_mode;
1858
1859 if (cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1860 !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1861 return -EOPNOTSUPP;
1862
1863 if (!mode_changed)
1864 return 0;
1865
1866 new_params = priv->channels.params;
1867 if (is_rx_cq)
1868 mlx5e_set_rx_cq_mode_params(&new_params, cq_period_mode);
1869 else
1870 mlx5e_set_tx_cq_mode_params(&new_params, cq_period_mode);
1871
1872 return mlx5e_safe_switch_params(priv, &new_params, NULL, NULL, true);
1873 }
1874
set_pflag_tx_cqe_based_moder(struct net_device * netdev,bool enable)1875 static int set_pflag_tx_cqe_based_moder(struct net_device *netdev, bool enable)
1876 {
1877 return set_pflag_cqe_based_moder(netdev, enable, false);
1878 }
1879
set_pflag_rx_cqe_based_moder(struct net_device * netdev,bool enable)1880 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1881 {
1882 return set_pflag_cqe_based_moder(netdev, enable, true);
1883 }
1884
mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv * priv,bool new_val,bool rx_filter)1885 int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val, bool rx_filter)
1886 {
1887 bool curr_val = MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS);
1888 struct mlx5e_params new_params;
1889 int err = 0;
1890
1891 if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
1892 return new_val ? -EOPNOTSUPP : 0;
1893
1894 if (curr_val == new_val)
1895 return 0;
1896
1897 if (new_val && !priv->profile->rx_ptp_support && rx_filter) {
1898 netdev_err(priv->netdev,
1899 "Profile doesn't support enabling of CQE compression while hardware time-stamping is enabled.\n");
1900 return -EINVAL;
1901 }
1902
1903 if (priv->channels.params.packet_merge.type == MLX5E_PACKET_MERGE_SHAMPO) {
1904 netdev_warn(priv->netdev, "Can't set CQE compression with HW-GRO, disable it first.\n");
1905 return -EINVAL;
1906 }
1907
1908 new_params = priv->channels.params;
1909 MLX5E_SET_PFLAG(&new_params, MLX5E_PFLAG_RX_CQE_COMPRESS, new_val);
1910 if (rx_filter)
1911 new_params.ptp_rx = new_val;
1912
1913 if (new_params.ptp_rx == priv->channels.params.ptp_rx)
1914 err = mlx5e_safe_switch_params(priv, &new_params, NULL, NULL, true);
1915 else
1916 err = mlx5e_safe_switch_params(priv, &new_params, mlx5e_ptp_rx_manage_fs_ctx,
1917 &new_params.ptp_rx, true);
1918 if (err)
1919 return err;
1920
1921 mlx5e_dbg(DRV, priv, "MLX5E: RxCqeCmprss was turned %s\n",
1922 MLX5E_GET_PFLAG(&priv->channels.params,
1923 MLX5E_PFLAG_RX_CQE_COMPRESS) ? "ON" : "OFF");
1924
1925 return 0;
1926 }
1927
set_pflag_rx_cqe_compress(struct net_device * netdev,bool enable)1928 static int set_pflag_rx_cqe_compress(struct net_device *netdev,
1929 bool enable)
1930 {
1931 struct mlx5e_priv *priv = netdev_priv(netdev);
1932 struct mlx5_core_dev *mdev = priv->mdev;
1933 bool rx_filter;
1934 int err;
1935
1936 if (!MLX5_CAP_GEN(mdev, cqe_compression))
1937 return -EOPNOTSUPP;
1938
1939 rx_filter = priv->tstamp.rx_filter != HWTSTAMP_FILTER_NONE;
1940 err = mlx5e_modify_rx_cqe_compression_locked(priv, enable, rx_filter);
1941 if (err)
1942 return err;
1943
1944 priv->channels.params.rx_cqe_compress_def = enable;
1945
1946 return 0;
1947 }
1948
set_pflag_rx_striding_rq(struct net_device * netdev,bool enable)1949 static int set_pflag_rx_striding_rq(struct net_device *netdev, bool enable)
1950 {
1951 struct mlx5e_priv *priv = netdev_priv(netdev);
1952 struct mlx5_core_dev *mdev = priv->mdev;
1953 struct mlx5e_params new_params;
1954
1955 if (enable) {
1956 if (!mlx5e_check_fragmented_striding_rq_cap(mdev))
1957 return -EOPNOTSUPP;
1958 if (!mlx5e_striding_rq_possible(mdev, &priv->channels.params))
1959 return -EINVAL;
1960 } else if (priv->channels.params.packet_merge.type != MLX5E_PACKET_MERGE_NONE) {
1961 netdev_warn(netdev, "Can't set legacy RQ with HW-GRO/LRO, disable them first\n");
1962 return -EINVAL;
1963 }
1964
1965 new_params = priv->channels.params;
1966
1967 MLX5E_SET_PFLAG(&new_params, MLX5E_PFLAG_RX_STRIDING_RQ, enable);
1968 mlx5e_set_rq_type(mdev, &new_params);
1969
1970 return mlx5e_safe_switch_params(priv, &new_params, NULL, NULL, true);
1971 }
1972
set_pflag_rx_no_csum_complete(struct net_device * netdev,bool enable)1973 static int set_pflag_rx_no_csum_complete(struct net_device *netdev, bool enable)
1974 {
1975 struct mlx5e_priv *priv = netdev_priv(netdev);
1976 struct mlx5e_channels *channels = &priv->channels;
1977 struct mlx5e_channel *c;
1978 int i;
1979
1980 if (!test_bit(MLX5E_STATE_OPENED, &priv->state) ||
1981 priv->channels.params.xdp_prog)
1982 return 0;
1983
1984 for (i = 0; i < channels->num; i++) {
1985 c = channels->c[i];
1986 if (enable)
1987 __set_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
1988 else
1989 __clear_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
1990 }
1991
1992 return 0;
1993 }
1994
set_pflag_tx_mpwqe_common(struct net_device * netdev,u32 flag,bool enable)1995 static int set_pflag_tx_mpwqe_common(struct net_device *netdev, u32 flag, bool enable)
1996 {
1997 struct mlx5e_priv *priv = netdev_priv(netdev);
1998 struct mlx5_core_dev *mdev = priv->mdev;
1999 struct mlx5e_params new_params;
2000
2001 if (enable && !mlx5e_tx_mpwqe_supported(mdev))
2002 return -EOPNOTSUPP;
2003
2004 new_params = priv->channels.params;
2005
2006 MLX5E_SET_PFLAG(&new_params, flag, enable);
2007
2008 return mlx5e_safe_switch_params(priv, &new_params, NULL, NULL, true);
2009 }
2010
set_pflag_xdp_tx_mpwqe(struct net_device * netdev,bool enable)2011 static int set_pflag_xdp_tx_mpwqe(struct net_device *netdev, bool enable)
2012 {
2013 return set_pflag_tx_mpwqe_common(netdev, MLX5E_PFLAG_XDP_TX_MPWQE, enable);
2014 }
2015
set_pflag_skb_tx_mpwqe(struct net_device * netdev,bool enable)2016 static int set_pflag_skb_tx_mpwqe(struct net_device *netdev, bool enable)
2017 {
2018 return set_pflag_tx_mpwqe_common(netdev, MLX5E_PFLAG_SKB_TX_MPWQE, enable);
2019 }
2020
set_pflag_tx_port_ts(struct net_device * netdev,bool enable)2021 static int set_pflag_tx_port_ts(struct net_device *netdev, bool enable)
2022 {
2023 struct mlx5e_priv *priv = netdev_priv(netdev);
2024 struct mlx5_core_dev *mdev = priv->mdev;
2025 struct mlx5e_params new_params;
2026 int err;
2027
2028 if (!MLX5_CAP_GEN(mdev, ts_cqe_to_dest_cqn))
2029 return -EOPNOTSUPP;
2030
2031 /* Don't allow changing the PTP state if HTB offload is active, because
2032 * the numeration of the QoS SQs will change, while per-queue qdiscs are
2033 * attached.
2034 */
2035 if (priv->htb.maj_id) {
2036 netdev_err(priv->netdev, "%s: HTB offload is active, cannot change the PTP state\n",
2037 __func__);
2038 return -EINVAL;
2039 }
2040
2041 new_params = priv->channels.params;
2042 /* Don't allow enabling TX-port-TS if MQPRIO mode channel offload is
2043 * active, since it defines explicitly which TC accepts the packet.
2044 * This conflicts with TX-port-TS hijacking the PTP traffic to a specific
2045 * HW TX-queue.
2046 */
2047 if (enable && new_params.mqprio.mode == TC_MQPRIO_MODE_CHANNEL) {
2048 netdev_err(priv->netdev,
2049 "%s: MQPRIO mode channel offload is active, cannot set the TX-port-TS\n",
2050 __func__);
2051 return -EINVAL;
2052 }
2053 MLX5E_SET_PFLAG(&new_params, MLX5E_PFLAG_TX_PORT_TS, enable);
2054 /* No need to verify SQ stop room as
2055 * ptpsq.txqsq.stop_room <= generic_sq->stop_room, and both
2056 * has the same log_sq_size.
2057 */
2058
2059 err = mlx5e_safe_switch_params(priv, &new_params,
2060 mlx5e_num_channels_changed_ctx, NULL, true);
2061 if (!err)
2062 priv->tx_ptp_opened = true;
2063
2064 return err;
2065 }
2066
2067 static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS] = {
2068 { "rx_cqe_moder", set_pflag_rx_cqe_based_moder },
2069 { "tx_cqe_moder", set_pflag_tx_cqe_based_moder },
2070 { "rx_cqe_compress", set_pflag_rx_cqe_compress },
2071 { "rx_striding_rq", set_pflag_rx_striding_rq },
2072 { "rx_no_csum_complete", set_pflag_rx_no_csum_complete },
2073 { "xdp_tx_mpwqe", set_pflag_xdp_tx_mpwqe },
2074 { "skb_tx_mpwqe", set_pflag_skb_tx_mpwqe },
2075 { "tx_port_ts", set_pflag_tx_port_ts },
2076 };
2077
mlx5e_handle_pflag(struct net_device * netdev,u32 wanted_flags,enum mlx5e_priv_flag flag)2078 static int mlx5e_handle_pflag(struct net_device *netdev,
2079 u32 wanted_flags,
2080 enum mlx5e_priv_flag flag)
2081 {
2082 struct mlx5e_priv *priv = netdev_priv(netdev);
2083 bool enable = !!(wanted_flags & BIT(flag));
2084 u32 changes = wanted_flags ^ priv->channels.params.pflags;
2085 int err;
2086
2087 if (!(changes & BIT(flag)))
2088 return 0;
2089
2090 err = mlx5e_priv_flags[flag].handler(netdev, enable);
2091 if (err) {
2092 netdev_err(netdev, "%s private flag '%s' failed err %d\n",
2093 enable ? "Enable" : "Disable", mlx5e_priv_flags[flag].name, err);
2094 return err;
2095 }
2096
2097 MLX5E_SET_PFLAG(&priv->channels.params, flag, enable);
2098 return 0;
2099 }
2100
mlx5e_set_priv_flags(struct net_device * netdev,u32 pflags)2101 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
2102 {
2103 struct mlx5e_priv *priv = netdev_priv(netdev);
2104 enum mlx5e_priv_flag pflag;
2105 int err;
2106
2107 mutex_lock(&priv->state_lock);
2108
2109 for (pflag = 0; pflag < MLX5E_NUM_PFLAGS; pflag++) {
2110 err = mlx5e_handle_pflag(netdev, pflags, pflag);
2111 if (err)
2112 break;
2113 }
2114
2115 mutex_unlock(&priv->state_lock);
2116
2117 /* Need to fix some features.. */
2118 netdev_update_features(netdev);
2119
2120 return err;
2121 }
2122
mlx5e_get_priv_flags(struct net_device * netdev)2123 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
2124 {
2125 struct mlx5e_priv *priv = netdev_priv(netdev);
2126
2127 return priv->channels.params.pflags;
2128 }
2129
mlx5e_get_rxnfc(struct net_device * dev,struct ethtool_rxnfc * info,u32 * rule_locs)2130 int mlx5e_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
2131 u32 *rule_locs)
2132 {
2133 struct mlx5e_priv *priv = netdev_priv(dev);
2134
2135 /* ETHTOOL_GRXRINGS is needed by ethtool -x which is not part
2136 * of rxnfc. We keep this logic out of mlx5e_ethtool_get_rxnfc,
2137 * to avoid breaking "ethtool -x" when mlx5e_ethtool_get_rxnfc
2138 * is compiled out via CONFIG_MLX5_EN_RXNFC=n.
2139 */
2140 if (info->cmd == ETHTOOL_GRXRINGS) {
2141 info->data = priv->channels.params.num_channels;
2142 return 0;
2143 }
2144
2145 return mlx5e_ethtool_get_rxnfc(priv, info, rule_locs);
2146 }
2147
mlx5e_set_rxnfc(struct net_device * dev,struct ethtool_rxnfc * cmd)2148 int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2149 {
2150 struct mlx5e_priv *priv = netdev_priv(dev);
2151
2152 return mlx5e_ethtool_set_rxnfc(priv, cmd);
2153 }
2154
query_port_status_opcode(struct mlx5_core_dev * mdev,u32 * status_opcode)2155 static int query_port_status_opcode(struct mlx5_core_dev *mdev, u32 *status_opcode)
2156 {
2157 struct mlx5_ifc_pddr_troubleshooting_page_bits *pddr_troubleshooting_page;
2158 u32 in[MLX5_ST_SZ_DW(pddr_reg)] = {};
2159 u32 out[MLX5_ST_SZ_DW(pddr_reg)];
2160 int err;
2161
2162 MLX5_SET(pddr_reg, in, local_port, 1);
2163 MLX5_SET(pddr_reg, in, page_select,
2164 MLX5_PDDR_REG_PAGE_SELECT_TROUBLESHOOTING_INFO_PAGE);
2165
2166 pddr_troubleshooting_page = MLX5_ADDR_OF(pddr_reg, in, page_data);
2167 MLX5_SET(pddr_troubleshooting_page, pddr_troubleshooting_page,
2168 group_opcode, MLX5_PDDR_REG_TRBLSH_GROUP_OPCODE_MONITOR);
2169 err = mlx5_core_access_reg(mdev, in, sizeof(in), out,
2170 sizeof(out), MLX5_REG_PDDR, 0, 0);
2171 if (err)
2172 return err;
2173
2174 pddr_troubleshooting_page = MLX5_ADDR_OF(pddr_reg, out, page_data);
2175 *status_opcode = MLX5_GET(pddr_troubleshooting_page, pddr_troubleshooting_page,
2176 status_opcode);
2177 return 0;
2178 }
2179
2180 struct mlx5e_ethtool_link_ext_state_opcode_mapping {
2181 u32 status_opcode;
2182 enum ethtool_link_ext_state link_ext_state;
2183 u8 link_ext_substate;
2184 };
2185
2186 static const struct mlx5e_ethtool_link_ext_state_opcode_mapping
2187 mlx5e_link_ext_state_opcode_map[] = {
2188 /* States relating to the autonegotiation or issues therein */
2189 {2, ETHTOOL_LINK_EXT_STATE_AUTONEG,
2190 ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_PARTNER_DETECTED},
2191 {3, ETHTOOL_LINK_EXT_STATE_AUTONEG,
2192 ETHTOOL_LINK_EXT_SUBSTATE_AN_ACK_NOT_RECEIVED},
2193 {4, ETHTOOL_LINK_EXT_STATE_AUTONEG,
2194 ETHTOOL_LINK_EXT_SUBSTATE_AN_NEXT_PAGE_EXCHANGE_FAILED},
2195 {36, ETHTOOL_LINK_EXT_STATE_AUTONEG,
2196 ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_PARTNER_DETECTED_FORCE_MODE},
2197 {38, ETHTOOL_LINK_EXT_STATE_AUTONEG,
2198 ETHTOOL_LINK_EXT_SUBSTATE_AN_FEC_MISMATCH_DURING_OVERRIDE},
2199 {39, ETHTOOL_LINK_EXT_STATE_AUTONEG,
2200 ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_HCD},
2201
2202 /* Failure during link training */
2203 {5, ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE,
2204 ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_FRAME_LOCK_NOT_ACQUIRED},
2205 {6, ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE,
2206 ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_LINK_INHIBIT_TIMEOUT},
2207 {7, ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE,
2208 ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_LINK_PARTNER_DID_NOT_SET_RECEIVER_READY},
2209 {8, ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE, 0},
2210 {14, ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE,
2211 ETHTOOL_LINK_EXT_SUBSTATE_LT_REMOTE_FAULT},
2212
2213 /* Logical mismatch in physical coding sublayer or forward error correction sublayer */
2214 {9, ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH,
2215 ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_ACQUIRE_BLOCK_LOCK},
2216 {10, ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH,
2217 ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_ACQUIRE_AM_LOCK},
2218 {11, ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH,
2219 ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_GET_ALIGN_STATUS},
2220 {12, ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH,
2221 ETHTOOL_LINK_EXT_SUBSTATE_LLM_FC_FEC_IS_NOT_LOCKED},
2222 {13, ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH,
2223 ETHTOOL_LINK_EXT_SUBSTATE_LLM_RS_FEC_IS_NOT_LOCKED},
2224
2225 /* Signal integrity issues */
2226 {15, ETHTOOL_LINK_EXT_STATE_BAD_SIGNAL_INTEGRITY, 0},
2227 {17, ETHTOOL_LINK_EXT_STATE_BAD_SIGNAL_INTEGRITY,
2228 ETHTOOL_LINK_EXT_SUBSTATE_BSI_LARGE_NUMBER_OF_PHYSICAL_ERRORS},
2229 {42, ETHTOOL_LINK_EXT_STATE_BAD_SIGNAL_INTEGRITY,
2230 ETHTOOL_LINK_EXT_SUBSTATE_BSI_UNSUPPORTED_RATE},
2231
2232 /* No cable connected */
2233 {1024, ETHTOOL_LINK_EXT_STATE_NO_CABLE, 0},
2234
2235 /* Failure is related to cable, e.g., unsupported cable */
2236 {16, ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE,
2237 ETHTOOL_LINK_EXT_SUBSTATE_CI_UNSUPPORTED_CABLE},
2238 {20, ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE,
2239 ETHTOOL_LINK_EXT_SUBSTATE_CI_UNSUPPORTED_CABLE},
2240 {29, ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE,
2241 ETHTOOL_LINK_EXT_SUBSTATE_CI_UNSUPPORTED_CABLE},
2242 {1025, ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE,
2243 ETHTOOL_LINK_EXT_SUBSTATE_CI_UNSUPPORTED_CABLE},
2244 {1029, ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE,
2245 ETHTOOL_LINK_EXT_SUBSTATE_CI_UNSUPPORTED_CABLE},
2246 {1031, ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE, 0},
2247
2248 /* Failure is related to EEPROM, e.g., failure during reading or parsing the data */
2249 {1027, ETHTOOL_LINK_EXT_STATE_EEPROM_ISSUE, 0},
2250
2251 /* Failure during calibration algorithm */
2252 {23, ETHTOOL_LINK_EXT_STATE_CALIBRATION_FAILURE, 0},
2253
2254 /* The hardware is not able to provide the power required from cable or module */
2255 {1032, ETHTOOL_LINK_EXT_STATE_POWER_BUDGET_EXCEEDED, 0},
2256
2257 /* The module is overheated */
2258 {1030, ETHTOOL_LINK_EXT_STATE_OVERHEAT, 0},
2259 };
2260
2261 static void
mlx5e_set_link_ext_state(struct mlx5e_ethtool_link_ext_state_opcode_mapping link_ext_state_mapping,struct ethtool_link_ext_state_info * link_ext_state_info)2262 mlx5e_set_link_ext_state(struct mlx5e_ethtool_link_ext_state_opcode_mapping
2263 link_ext_state_mapping,
2264 struct ethtool_link_ext_state_info *link_ext_state_info)
2265 {
2266 switch (link_ext_state_mapping.link_ext_state) {
2267 case ETHTOOL_LINK_EXT_STATE_AUTONEG:
2268 link_ext_state_info->autoneg =
2269 link_ext_state_mapping.link_ext_substate;
2270 break;
2271 case ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE:
2272 link_ext_state_info->link_training =
2273 link_ext_state_mapping.link_ext_substate;
2274 break;
2275 case ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH:
2276 link_ext_state_info->link_logical_mismatch =
2277 link_ext_state_mapping.link_ext_substate;
2278 break;
2279 case ETHTOOL_LINK_EXT_STATE_BAD_SIGNAL_INTEGRITY:
2280 link_ext_state_info->bad_signal_integrity =
2281 link_ext_state_mapping.link_ext_substate;
2282 break;
2283 case ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE:
2284 link_ext_state_info->cable_issue =
2285 link_ext_state_mapping.link_ext_substate;
2286 break;
2287 default:
2288 break;
2289 }
2290
2291 link_ext_state_info->link_ext_state = link_ext_state_mapping.link_ext_state;
2292 }
2293
2294 static int
mlx5e_get_link_ext_state(struct net_device * dev,struct ethtool_link_ext_state_info * link_ext_state_info)2295 mlx5e_get_link_ext_state(struct net_device *dev,
2296 struct ethtool_link_ext_state_info *link_ext_state_info)
2297 {
2298 struct mlx5e_ethtool_link_ext_state_opcode_mapping link_ext_state_mapping;
2299 struct mlx5e_priv *priv = netdev_priv(dev);
2300 u32 status_opcode = 0;
2301 int i;
2302
2303 /* Exit without data if the interface state is OK, since no extended data is
2304 * available in such case
2305 */
2306 if (netif_carrier_ok(dev))
2307 return -ENODATA;
2308
2309 if (query_port_status_opcode(priv->mdev, &status_opcode) ||
2310 !status_opcode)
2311 return -ENODATA;
2312
2313 for (i = 0; i < ARRAY_SIZE(mlx5e_link_ext_state_opcode_map); i++) {
2314 link_ext_state_mapping = mlx5e_link_ext_state_opcode_map[i];
2315 if (link_ext_state_mapping.status_opcode == status_opcode) {
2316 mlx5e_set_link_ext_state(link_ext_state_mapping,
2317 link_ext_state_info);
2318 return 0;
2319 }
2320 }
2321
2322 return -ENODATA;
2323 }
2324
mlx5e_get_eth_phy_stats(struct net_device * netdev,struct ethtool_eth_phy_stats * phy_stats)2325 static void mlx5e_get_eth_phy_stats(struct net_device *netdev,
2326 struct ethtool_eth_phy_stats *phy_stats)
2327 {
2328 struct mlx5e_priv *priv = netdev_priv(netdev);
2329
2330 mlx5e_stats_eth_phy_get(priv, phy_stats);
2331 }
2332
mlx5e_get_eth_mac_stats(struct net_device * netdev,struct ethtool_eth_mac_stats * mac_stats)2333 static void mlx5e_get_eth_mac_stats(struct net_device *netdev,
2334 struct ethtool_eth_mac_stats *mac_stats)
2335 {
2336 struct mlx5e_priv *priv = netdev_priv(netdev);
2337
2338 mlx5e_stats_eth_mac_get(priv, mac_stats);
2339 }
2340
mlx5e_get_eth_ctrl_stats(struct net_device * netdev,struct ethtool_eth_ctrl_stats * ctrl_stats)2341 static void mlx5e_get_eth_ctrl_stats(struct net_device *netdev,
2342 struct ethtool_eth_ctrl_stats *ctrl_stats)
2343 {
2344 struct mlx5e_priv *priv = netdev_priv(netdev);
2345
2346 mlx5e_stats_eth_ctrl_get(priv, ctrl_stats);
2347 }
2348
mlx5e_get_rmon_stats(struct net_device * netdev,struct ethtool_rmon_stats * rmon_stats,const struct ethtool_rmon_hist_range ** ranges)2349 static void mlx5e_get_rmon_stats(struct net_device *netdev,
2350 struct ethtool_rmon_stats *rmon_stats,
2351 const struct ethtool_rmon_hist_range **ranges)
2352 {
2353 struct mlx5e_priv *priv = netdev_priv(netdev);
2354
2355 mlx5e_stats_rmon_get(priv, rmon_stats, ranges);
2356 }
2357
2358 const struct ethtool_ops mlx5e_ethtool_ops = {
2359 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
2360 ETHTOOL_COALESCE_MAX_FRAMES |
2361 ETHTOOL_COALESCE_USE_ADAPTIVE,
2362 .get_drvinfo = mlx5e_get_drvinfo,
2363 .get_link = ethtool_op_get_link,
2364 .get_link_ext_state = mlx5e_get_link_ext_state,
2365 .get_strings = mlx5e_get_strings,
2366 .get_sset_count = mlx5e_get_sset_count,
2367 .get_ethtool_stats = mlx5e_get_ethtool_stats,
2368 .get_ringparam = mlx5e_get_ringparam,
2369 .set_ringparam = mlx5e_set_ringparam,
2370 .get_channels = mlx5e_get_channels,
2371 .set_channels = mlx5e_set_channels,
2372 .get_coalesce = mlx5e_get_coalesce,
2373 .set_coalesce = mlx5e_set_coalesce,
2374 .get_link_ksettings = mlx5e_get_link_ksettings,
2375 .set_link_ksettings = mlx5e_set_link_ksettings,
2376 .get_rxfh_key_size = mlx5e_get_rxfh_key_size,
2377 .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
2378 .get_rxfh = mlx5e_get_rxfh,
2379 .set_rxfh = mlx5e_set_rxfh,
2380 .get_rxfh_context = mlx5e_get_rxfh_context,
2381 .set_rxfh_context = mlx5e_set_rxfh_context,
2382 .get_rxnfc = mlx5e_get_rxnfc,
2383 .set_rxnfc = mlx5e_set_rxnfc,
2384 .get_tunable = mlx5e_get_tunable,
2385 .set_tunable = mlx5e_set_tunable,
2386 .get_pause_stats = mlx5e_get_pause_stats,
2387 .get_pauseparam = mlx5e_get_pauseparam,
2388 .set_pauseparam = mlx5e_set_pauseparam,
2389 .get_ts_info = mlx5e_get_ts_info,
2390 .set_phys_id = mlx5e_set_phys_id,
2391 .get_wol = mlx5e_get_wol,
2392 .set_wol = mlx5e_set_wol,
2393 .get_module_info = mlx5e_get_module_info,
2394 .get_module_eeprom = mlx5e_get_module_eeprom,
2395 .get_module_eeprom_by_page = mlx5e_get_module_eeprom_by_page,
2396 .flash_device = mlx5e_flash_device,
2397 .get_priv_flags = mlx5e_get_priv_flags,
2398 .set_priv_flags = mlx5e_set_priv_flags,
2399 .self_test = mlx5e_self_test,
2400 .get_msglevel = mlx5e_get_msglevel,
2401 .set_msglevel = mlx5e_set_msglevel,
2402 .get_fec_stats = mlx5e_get_fec_stats,
2403 .get_fecparam = mlx5e_get_fecparam,
2404 .set_fecparam = mlx5e_set_fecparam,
2405 .get_eth_phy_stats = mlx5e_get_eth_phy_stats,
2406 .get_eth_mac_stats = mlx5e_get_eth_mac_stats,
2407 .get_eth_ctrl_stats = mlx5e_get_eth_ctrl_stats,
2408 .get_rmon_stats = mlx5e_get_rmon_stats,
2409 };
2410