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Searched defs:rate (Results 1 – 25 of 205) sorted by relevance

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/u-boot/drivers/clk/aspeed/
A Dclk_ast2600.c250 uint32_t rate = ast2600_get_hclk_rate(scu); in ast2600_get_pclk2_rate() local
260 uint32_t rate = 0; in ast2600_get_uxclk_in_rate() local
285 uint32_t rate = 0; in ast2600_get_huxclk_in_rate() local
310 uint32_t rate = ast2600_get_uxclk_in_rate(scu); in ast2600_get_uart_uxclk_rate() local
322 uint32_t rate = ast2600_get_huxclk_in_rate(scu); in ast2600_get_uart_huxclk_rate() local
334 uint32_t rate = 0; in ast2600_get_sdio_clk_rate() local
359 uint32_t rate = 0; in ast2600_get_uart_clk_rate() local
424 ulong rate = 0; in ast2600_clk_get_rate() local
883 uint32_t rate = 0; in ast2600_enable_extsdclk() local
928 uint32_t rate = 0; in ast2600_enable_extemmcclk() local
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A Dclk_ast2500.c123 ulong rate; in ast2500_clk_get_rate() local
184 ulong rate; member
269 static ulong ast2500_configure_ddr(struct ast2500_scu *scu, ulong rate) in ast2500_configure_ddr()
365 static ulong ast2500_configure_d2pll(struct ast2500_scu *scu, ulong rate) in ast2500_configure_d2pll()
428 static ulong ast2500_clk_set_rate(struct clk *clk, ulong rate) in ast2500_clk_set_rate()
/u-boot/arch/arm/cpu/armv7/kona-common/
A Dclk-stubs.c12 int __weak clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep) in clk_sdio_enable()
17 int __weak clk_bsc_enable(void *base, u32 rate, u32 *actual_ratep) in clk_bsc_enable()
/u-boot/arch/arm/mach-imx/mx7ulp/
A Dscg.c56 u32 reg, val, rate; in scg_sircdiv_get_rate() local
94 u32 reg, val, rate; in scg_fircdiv_get_rate() local
132 u32 reg, val, rate; in scg_soscdiv_get_rate() local
170 u32 reg, val, rate; in scg_apll_pfd_get_rate() local
220 u32 reg, val, rate; in scg_spll_pfd_get_rate() local
270 u32 reg, val, rate; in scg_apll_get_rate() local
298 u32 reg, val, rate; in scg_spll_get_rate() local
333 u32 reg, val, rate, div; in scg_ddr_get_rate() local
357 u32 reg, val, rate, nic0_rate; in scg_nic_get_rate() local
438 u32 reg, val, rate; in scg_sys_get_rate() local
/u-boot/arch/arm/mach-ipq40xx/
A Dclock-ipq4019.c22 ulong msm_set_rate(struct clk *clk, ulong rate) in msm_set_rate()
44 static ulong msm_clk_set_rate(struct clk *clk, ulong rate) in msm_clk_set_rate()
/u-boot/arch/arm/mach-snapdragon/
A Dclock-apq8016.c52 static int clk_init_sdc(struct msm_clk_priv *priv, int slot, uint rate) in clk_init_sdc()
96 ulong msm_set_rate(struct clk *clk, ulong rate) in msm_set_rate()
A Dclock-apq8096.c43 static int clk_init_sdc(struct msm_clk_priv *priv, uint rate) in clk_init_sdc()
82 ulong msm_set_rate(struct clk *clk, ulong rate) in msm_set_rate()
/u-boot/arch/arm/mach-zynq/
A Dclk.c40 ulong rate; in set_cpu_clk_info() local
88 unsigned long rate; in soc_clk_dump() local
/u-boot/arch/mips/mach-pic32/
A Dcpu.c28 static ulong rate(int id) in rate() function
33 ulong rate; in rate() local
64 ulong rate; in prefetch_init() local
/u-boot/arch/powerpc/cpu/mpc85xx/
A Dcommproc.c123 m8560_cpm_setbrg(uint brg, uint rate) in m8560_cpm_setbrg()
145 m8560_cpm_fastbrg(uint brg, uint rate, int div16) in m8560_cpm_fastbrg()
170 m8560_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel) in m8560_cpm_extcbrg()
/u-boot/drivers/clk/
A Dclk-hsdk-cgu.c194 const u32 rate; member
426 u64 rate; in pll_get() local
479 unsigned long rate, in hsdk_pll_comm_update_rate()
499 unsigned long rate, in hsdk_pll_core_update_rate()
532 static ulong pll_set(struct clk *sclk, ulong rate) in pll_set()
578 static ulong cpu_clk_set(struct clk *sclk, ulong rate) in cpu_clk_set()
636 static ulong axi_clk_set(struct clk *sclk, ulong rate) in axi_clk_set()
641 static ulong tun_hsdk_set(struct clk *sclk, ulong rate) in tun_hsdk_set()
646 static ulong tun_h4xd_set(struct clk *sclk, ulong rate) in tun_h4xd_set()
651 static ulong idiv_set(struct clk *sclk, ulong rate) in idiv_set()
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A Dclk-composite.c51 struct clk *rate = composite->rate; in clk_composite_recalc_rate() local
59 static ulong clk_composite_set_rate(struct clk *clk, unsigned long rate) in clk_composite_set_rate()
102 struct clk *rate, in clk_register_composite()
A Dclk_sandbox.c15 ulong rate[SANDBOX_CLK_ID_COUNT]; member
33 static ulong sandbox_clk_round_rate(struct clk *clk, ulong rate) in sandbox_clk_round_rate()
49 static ulong sandbox_clk_set_rate(struct clk *clk, ulong rate) in sandbox_clk_set_rate()
/u-boot/drivers/clk/ti/
A Dclk-divider.c72 ulong rate) in _div_round_up()
92 ulong rate) in _div_round()
100 static int clk_ti_divider_best_div(struct clk *clk, ulong rate, in clk_ti_divider_best_div()
172 static ulong clk_ti_divider_round_rate(struct clk *clk, ulong rate) in clk_ti_divider_round_rate()
184 static ulong clk_ti_divider_set_rate(struct clk *clk, ulong rate) in clk_ti_divider_set_rate()
215 ulong rate, parent_rate; in clk_ti_divider_get_rate() local
A Dclk-am3-dpll.c36 static ulong clk_ti_am3_dpll_round_rate(struct clk *clk, ulong rate) in clk_ti_am3_dpll_round_rate()
78 static ulong clk_ti_am3_dpll_set_rate(struct clk *clk, ulong rate) in clk_ti_am3_dpll_set_rate()
127 u64 rate; in clk_ti_am3_dpll_get_rate() local
/u-boot/drivers/clk/imx/
A Dclk-pll14xx.c56 struct clk_pll14xx *pll, unsigned long rate) in imx_get_pll_settings()
108 static inline bool clk_pll1416x_mp_change(const struct imx_pll14xx_rate_table *rate, in clk_pll1416x_mp_change()
119 static inline bool clk_pll1443x_mpk_change(const struct imx_pll14xx_rate_table *rate, in clk_pll1443x_mpk_change()
132 static inline bool clk_pll1443x_mp_change(const struct imx_pll14xx_rate_table *rate, in clk_pll1443x_mp_change()
156 const struct imx_pll14xx_rate_table *rate; in clk_pll1416x_set_rate() local
222 const struct imx_pll14xx_rate_table *rate; in clk_pll1443x_set_rate() local
A Dclk-imx8qm.c45 ulong rate; in imx8_clk_get_rate() local
149 ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate) in imx8_clk_set_rate()
A Dclk-imx8qxp.c48 ulong rate; in imx8_clk_get_rate() local
142 ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate) in imx8_clk_set_rate()
A Dclk-imx8.c25 __weak ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate) in imx8_clk_set_rate()
50 unsigned long rate; in soc_clk_dump() local
/u-boot/drivers/clk/rockchip/
A Dclk_pll.c168 rockchip_get_pll_settings(struct rockchip_pll_clock *pll, ulong rate) in rockchip_get_pll_settings()
187 const struct rockchip_pll_rate_table *rate; in rk3036_pll_set_rate() local
256 ulong rate; in rk3036_pll_get_rate() local
303 ulong rate = 0; in rockchip_pll_get_rate() local
348 ulong rate) in rockchip_get_cpu_settings()
/u-boot/drivers/sound/
A Dmax98088.c35 static int rate_value(int rate, u8 *value) in rate_value()
59 int max98088_hw_params(struct maxim_priv *priv, unsigned int rate, in max98088_hw_params()
385 static int max98088_set_params(struct udevice *dev, int interface, int rate, in max98088_set_params()
/u-boot/drivers/usb/phy/
A Domap_usb_phy.c36 unsigned long rate; member
53 unsigned long rate; in omap_usb3_get_dpll_params() local
119 u32 rate = get_sys_clk_freq()/1000000; in usb3_phy_partial_powerup() local
/u-boot/drivers/clk/renesas/
A Dclk-rcar-gen2.c84 u32 value, mult, div, rate = 0; in gen2_clk_get_rate() local
211 static int gen2_clk_setup_mmcif_div(struct clk *clk, ulong rate) in gen2_clk_setup_mmcif_div()
251 static ulong gen2_clk_set_rate(struct clk *clk, ulong rate) in gen2_clk_set_rate()
/u-boot/arch/arm/mach-nexell/include/mach/
A Dclk.h11 unsigned long rate; member
/u-boot/arch/arm/mach-tegra/
A Demc.c26 unsigned rate; in board_emc_init() local

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