1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2 /*
3 * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
4 */
5
6 #include <command.h>
7 #include <console.h>
8 #include <dfu.h>
9 #include <malloc.h>
10 #include <misc.h>
11 #include <mmc.h>
12 #include <part.h>
13 #include <asm/arch/stm32mp1_smc.h>
14 #include <asm/global_data.h>
15 #include <dm/uclass.h>
16 #include <jffs2/load_kernel.h>
17 #include <linux/list.h>
18 #include <linux/list_sort.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/sizes.h>
21
22 #include "stm32prog.h"
23
24 /* Primary GPT header size for 128 entries : 17kB = 34 LBA of 512B */
25 #define GPT_HEADER_SZ 34
26
27 #define OPT_SELECT BIT(0)
28 #define OPT_EMPTY BIT(1)
29 #define OPT_DELETE BIT(2)
30
31 #define IS_SELECT(part) ((part)->option & OPT_SELECT)
32 #define IS_EMPTY(part) ((part)->option & OPT_EMPTY)
33 #define IS_DELETE(part) ((part)->option & OPT_DELETE)
34
35 #define ALT_BUF_LEN SZ_1K
36
37 #define ROOTFS_MMC0_UUID \
38 EFI_GUID(0xE91C4E10, 0x16E6, 0x4C0E, \
39 0xBD, 0x0E, 0x77, 0xBE, 0xCF, 0x4A, 0x35, 0x82)
40
41 #define ROOTFS_MMC1_UUID \
42 EFI_GUID(0x491F6117, 0x415D, 0x4F53, \
43 0x88, 0xC9, 0x6E, 0x0D, 0xE5, 0x4D, 0xEA, 0xC6)
44
45 #define ROOTFS_MMC2_UUID \
46 EFI_GUID(0xFD58F1C7, 0xBE0D, 0x4338, \
47 0x88, 0xE9, 0xAD, 0x8F, 0x05, 0x0A, 0xEB, 0x18)
48
49 /* RAW parttion (binary / bootloader) used Linux - reserved UUID */
50 #define LINUX_RESERVED_UUID "8DA63339-0007-60C0-C436-083AC8230908"
51
52 /*
53 * unique partition guid (uuid) for partition named "rootfs"
54 * on each MMC instance = SD Card or eMMC
55 * allow fixed kernel bootcmd: "rootf=PARTUID=e91c4e10-..."
56 */
57 static const efi_guid_t uuid_mmc[3] = {
58 ROOTFS_MMC0_UUID,
59 ROOTFS_MMC1_UUID,
60 ROOTFS_MMC2_UUID
61 };
62
63 DECLARE_GLOBAL_DATA_PTR;
64
65 /* order of column in flash layout file */
66 enum stm32prog_col_t {
67 COL_OPTION,
68 COL_ID,
69 COL_NAME,
70 COL_TYPE,
71 COL_IP,
72 COL_OFFSET,
73 COL_NB_STM32
74 };
75
76 /* partition handling routines : CONFIG_CMD_MTDPARTS */
77 int mtdparts_init(void);
78 int find_dev_and_part(const char *id, struct mtd_device **dev,
79 u8 *part_num, struct part_info **part);
80
stm32prog_get_error(struct stm32prog_data * data)81 char *stm32prog_get_error(struct stm32prog_data *data)
82 {
83 static const char error_msg[] = "Unspecified";
84
85 if (strlen(data->error) == 0)
86 strcpy(data->error, error_msg);
87
88 return data->error;
89 }
90
stm32prog_header_check(struct raw_header_s * raw_header,struct image_header_s * header)91 u8 stm32prog_header_check(struct raw_header_s *raw_header,
92 struct image_header_s *header)
93 {
94 unsigned int i;
95
96 header->present = 0;
97 header->image_checksum = 0x0;
98 header->image_length = 0x0;
99
100 if (!raw_header || !header) {
101 log_debug("%s:no header data\n", __func__);
102 return -1;
103 }
104 if (raw_header->magic_number !=
105 (('S' << 0) | ('T' << 8) | ('M' << 16) | (0x32 << 24))) {
106 log_debug("%s:invalid magic number : 0x%x\n",
107 __func__, raw_header->magic_number);
108 return -2;
109 }
110 /* only header v1.0 supported */
111 if (raw_header->header_version != 0x00010000) {
112 log_debug("%s:invalid header version : 0x%x\n",
113 __func__, raw_header->header_version);
114 return -3;
115 }
116 if (raw_header->reserved1 != 0x0 || raw_header->reserved2) {
117 log_debug("%s:invalid reserved field\n", __func__);
118 return -4;
119 }
120 for (i = 0; i < (sizeof(raw_header->padding) / 4); i++) {
121 if (raw_header->padding[i] != 0) {
122 log_debug("%s:invalid padding field\n", __func__);
123 return -5;
124 }
125 }
126 header->present = 1;
127 header->image_checksum = le32_to_cpu(raw_header->image_checksum);
128 header->image_length = le32_to_cpu(raw_header->image_length);
129
130 return 0;
131 }
132
stm32prog_header_checksum(u32 addr,struct image_header_s * header)133 static u32 stm32prog_header_checksum(u32 addr, struct image_header_s *header)
134 {
135 u32 i, checksum;
136 u8 *payload;
137
138 /* compute checksum on payload */
139 payload = (u8 *)addr;
140 checksum = 0;
141 for (i = header->image_length; i > 0; i--)
142 checksum += *(payload++);
143
144 return checksum;
145 }
146
147 /* FLASHLAYOUT PARSING *****************************************/
parse_option(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)148 static int parse_option(struct stm32prog_data *data,
149 int i, char *p, struct stm32prog_part_t *part)
150 {
151 int result = 0;
152 char *c = p;
153
154 part->option = 0;
155 if (!strcmp(p, "-"))
156 return 0;
157
158 while (*c) {
159 switch (*c) {
160 case 'P':
161 part->option |= OPT_SELECT;
162 break;
163 case 'E':
164 part->option |= OPT_EMPTY;
165 break;
166 case 'D':
167 part->option |= OPT_DELETE;
168 break;
169 default:
170 result = -EINVAL;
171 stm32prog_err("Layout line %d: invalid option '%c' in %s)",
172 i, *c, p);
173 return -EINVAL;
174 }
175 c++;
176 }
177 if (!(part->option & OPT_SELECT)) {
178 stm32prog_err("Layout line %d: missing 'P' in option %s", i, p);
179 return -EINVAL;
180 }
181
182 return result;
183 }
184
parse_id(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)185 static int parse_id(struct stm32prog_data *data,
186 int i, char *p, struct stm32prog_part_t *part)
187 {
188 int result = 0;
189 unsigned long value;
190
191 result = strict_strtoul(p, 0, &value);
192 part->id = value;
193 if (result || value > PHASE_LAST_USER) {
194 stm32prog_err("Layout line %d: invalid phase value = %s", i, p);
195 result = -EINVAL;
196 }
197
198 return result;
199 }
200
parse_name(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)201 static int parse_name(struct stm32prog_data *data,
202 int i, char *p, struct stm32prog_part_t *part)
203 {
204 int result = 0;
205
206 if (strlen(p) < sizeof(part->name)) {
207 strcpy(part->name, p);
208 } else {
209 stm32prog_err("Layout line %d: partition name too long [%d]: %s",
210 i, strlen(p), p);
211 result = -EINVAL;
212 }
213
214 return result;
215 }
216
parse_type(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)217 static int parse_type(struct stm32prog_data *data,
218 int i, char *p, struct stm32prog_part_t *part)
219 {
220 int result = 0;
221 int len = 0;
222
223 part->bin_nb = 0;
224 if (!strncmp(p, "Binary", 6)) {
225 part->part_type = PART_BINARY;
226
227 /* search for Binary(X) case */
228 len = strlen(p);
229 part->bin_nb = 1;
230 if (len > 6) {
231 if (len < 8 ||
232 (p[6] != '(') ||
233 (p[len - 1] != ')'))
234 result = -EINVAL;
235 else
236 part->bin_nb =
237 simple_strtoul(&p[7], NULL, 10);
238 }
239 } else if (!strcmp(p, "System")) {
240 part->part_type = PART_SYSTEM;
241 } else if (!strcmp(p, "FileSystem")) {
242 part->part_type = PART_FILESYSTEM;
243 } else if (!strcmp(p, "RawImage")) {
244 part->part_type = RAW_IMAGE;
245 } else {
246 result = -EINVAL;
247 }
248 if (result)
249 stm32prog_err("Layout line %d: type parsing error : '%s'",
250 i, p);
251
252 return result;
253 }
254
parse_ip(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)255 static int parse_ip(struct stm32prog_data *data,
256 int i, char *p, struct stm32prog_part_t *part)
257 {
258 int result = 0;
259 unsigned int len = 0;
260
261 part->dev_id = 0;
262 if (!strcmp(p, "none")) {
263 part->target = STM32PROG_NONE;
264 } else if (!strncmp(p, "mmc", 3)) {
265 part->target = STM32PROG_MMC;
266 len = 3;
267 } else if (!strncmp(p, "nor", 3)) {
268 part->target = STM32PROG_NOR;
269 len = 3;
270 } else if (!strncmp(p, "nand", 4)) {
271 part->target = STM32PROG_NAND;
272 len = 4;
273 } else if (!strncmp(p, "spi-nand", 8)) {
274 part->target = STM32PROG_SPI_NAND;
275 len = 8;
276 } else if (!strncmp(p, "ram", 3)) {
277 part->target = STM32PROG_RAM;
278 len = 0;
279 } else {
280 result = -EINVAL;
281 }
282 if (len) {
283 /* only one digit allowed for device id */
284 if (strlen(p) != len + 1) {
285 result = -EINVAL;
286 } else {
287 part->dev_id = p[len] - '0';
288 if (part->dev_id > 9)
289 result = -EINVAL;
290 }
291 }
292 if (result)
293 stm32prog_err("Layout line %d: ip parsing error: '%s'", i, p);
294
295 return result;
296 }
297
parse_offset(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)298 static int parse_offset(struct stm32prog_data *data,
299 int i, char *p, struct stm32prog_part_t *part)
300 {
301 int result = 0;
302 char *tail;
303
304 part->part_id = 0;
305 part->addr = 0;
306 part->size = 0;
307 /* eMMC boot parttion */
308 if (!strncmp(p, "boot", 4)) {
309 if (strlen(p) != 5) {
310 result = -EINVAL;
311 } else {
312 if (p[4] == '1')
313 part->part_id = -1;
314 else if (p[4] == '2')
315 part->part_id = -2;
316 else
317 result = -EINVAL;
318 }
319 if (result)
320 stm32prog_err("Layout line %d: invalid part '%s'",
321 i, p);
322 } else {
323 part->addr = simple_strtoull(p, &tail, 0);
324 if (tail == p || *tail != '\0') {
325 stm32prog_err("Layout line %d: invalid offset '%s'",
326 i, p);
327 result = -EINVAL;
328 }
329 }
330
331 return result;
332 }
333
334 static
335 int (* const parse[COL_NB_STM32])(struct stm32prog_data *data, int i, char *p,
336 struct stm32prog_part_t *part) = {
337 [COL_OPTION] = parse_option,
338 [COL_ID] = parse_id,
339 [COL_NAME] = parse_name,
340 [COL_TYPE] = parse_type,
341 [COL_IP] = parse_ip,
342 [COL_OFFSET] = parse_offset,
343 };
344
parse_flash_layout(struct stm32prog_data * data,ulong addr,ulong size)345 static int parse_flash_layout(struct stm32prog_data *data,
346 ulong addr,
347 ulong size)
348 {
349 int column = 0, part_nb = 0, ret;
350 bool end_of_line, eof;
351 char *p, *start, *last, *col;
352 struct stm32prog_part_t *part;
353 int part_list_size;
354 int i;
355
356 data->part_nb = 0;
357
358 /* check if STM32image is detected */
359 if (!stm32prog_header_check((struct raw_header_s *)addr,
360 &data->header)) {
361 u32 checksum;
362
363 addr = addr + BL_HEADER_SIZE;
364 size = data->header.image_length;
365
366 checksum = stm32prog_header_checksum(addr, &data->header);
367 if (checksum != data->header.image_checksum) {
368 stm32prog_err("Layout: invalid checksum : 0x%x expected 0x%x",
369 checksum, data->header.image_checksum);
370 return -EIO;
371 }
372 }
373 if (!size)
374 return -EINVAL;
375
376 start = (char *)addr;
377 last = start + size;
378
379 *last = 0x0; /* force null terminated string */
380 log_debug("flash layout =\n%s\n", start);
381
382 /* calculate expected number of partitions */
383 part_list_size = 1;
384 p = start;
385 while (*p && (p < last)) {
386 if (*p++ == '\n') {
387 part_list_size++;
388 if (p < last && *p == '#')
389 part_list_size--;
390 }
391 }
392 if (part_list_size > PHASE_LAST_USER) {
393 stm32prog_err("Layout: too many partition (%d)",
394 part_list_size);
395 return -1;
396 }
397 part = calloc(sizeof(struct stm32prog_part_t), part_list_size);
398 if (!part) {
399 stm32prog_err("Layout: alloc failed");
400 return -ENOMEM;
401 }
402 data->part_array = part;
403
404 /* main parsing loop */
405 i = 1;
406 eof = false;
407 p = start;
408 col = start; /* 1st column */
409 end_of_line = false;
410 while (!eof) {
411 switch (*p) {
412 /* CR is ignored and replaced by NULL character */
413 case '\r':
414 *p = '\0';
415 p++;
416 continue;
417 case '\0':
418 end_of_line = true;
419 eof = true;
420 break;
421 case '\n':
422 end_of_line = true;
423 break;
424 case '\t':
425 break;
426 case '#':
427 /* comment line is skipped */
428 if (column == 0 && p == col) {
429 while ((p < last) && *p)
430 if (*p++ == '\n')
431 break;
432 col = p;
433 i++;
434 if (p >= last || !*p) {
435 eof = true;
436 end_of_line = true;
437 }
438 continue;
439 }
440 /* fall through */
441 /* by default continue with the next character */
442 default:
443 p++;
444 continue;
445 }
446
447 /* replace by \0: allow string parsing for each column */
448 *p = '\0';
449 p++;
450 if (p >= last) {
451 eof = true;
452 end_of_line = true;
453 }
454
455 /* skip empty line and multiple TAB in tsv file */
456 if (strlen(col) == 0) {
457 col = p;
458 /* skip empty line */
459 if (column == 0 && end_of_line) {
460 end_of_line = false;
461 i++;
462 }
463 continue;
464 }
465
466 if (column < COL_NB_STM32) {
467 ret = parse[column](data, i, col, part);
468 if (ret)
469 return ret;
470 }
471
472 /* save the beginning of the next column */
473 column++;
474 col = p;
475
476 if (!end_of_line)
477 continue;
478
479 /* end of the line detected */
480 end_of_line = false;
481
482 if (column < COL_NB_STM32) {
483 stm32prog_err("Layout line %d: no enought column", i);
484 return -EINVAL;
485 }
486 column = 0;
487 part_nb++;
488 part++;
489 i++;
490 if (part_nb >= part_list_size) {
491 part = NULL;
492 if (!eof) {
493 stm32prog_err("Layout: no enought memory for %d part",
494 part_nb);
495 return -EINVAL;
496 }
497 }
498 }
499 data->part_nb = part_nb;
500 if (data->part_nb == 0) {
501 stm32prog_err("Layout: no partition found");
502 return -ENODEV;
503 }
504
505 return 0;
506 }
507
part_cmp(void * priv,struct list_head * a,struct list_head * b)508 static int __init part_cmp(void *priv, struct list_head *a, struct list_head *b)
509 {
510 struct stm32prog_part_t *parta, *partb;
511
512 parta = container_of(a, struct stm32prog_part_t, list);
513 partb = container_of(b, struct stm32prog_part_t, list);
514
515 if (parta->part_id != partb->part_id)
516 return parta->part_id - partb->part_id;
517 else
518 return parta->addr > partb->addr ? 1 : -1;
519 }
520
get_mtd_by_target(char * string,enum stm32prog_target target,int dev_id)521 static void get_mtd_by_target(char *string, enum stm32prog_target target,
522 int dev_id)
523 {
524 const char *dev_str;
525
526 switch (target) {
527 case STM32PROG_NOR:
528 dev_str = "nor";
529 break;
530 case STM32PROG_NAND:
531 dev_str = "nand";
532 break;
533 case STM32PROG_SPI_NAND:
534 dev_str = "spi-nand";
535 break;
536 default:
537 dev_str = "invalid";
538 break;
539 }
540 sprintf(string, "%s%d", dev_str, dev_id);
541 }
542
init_device(struct stm32prog_data * data,struct stm32prog_dev_t * dev)543 static int init_device(struct stm32prog_data *data,
544 struct stm32prog_dev_t *dev)
545 {
546 struct mmc *mmc = NULL;
547 struct blk_desc *block_dev = NULL;
548 struct mtd_info *mtd = NULL;
549 char mtd_id[16];
550 int part_id;
551 int ret;
552 u64 first_addr = 0, last_addr = 0;
553 struct stm32prog_part_t *part, *next_part;
554 u64 part_addr, part_size;
555 bool part_found;
556 const char *part_name;
557
558 switch (dev->target) {
559 case STM32PROG_MMC:
560 if (!IS_ENABLED(CONFIG_MMC)) {
561 stm32prog_err("unknown device type = %d", dev->target);
562 return -ENODEV;
563 }
564 mmc = find_mmc_device(dev->dev_id);
565 if (!mmc || mmc_init(mmc)) {
566 stm32prog_err("mmc device %d not found", dev->dev_id);
567 return -ENODEV;
568 }
569 block_dev = mmc_get_blk_desc(mmc);
570 if (!block_dev) {
571 stm32prog_err("mmc device %d not probed", dev->dev_id);
572 return -ENODEV;
573 }
574 dev->erase_size = mmc->erase_grp_size * block_dev->blksz;
575 dev->mmc = mmc;
576
577 /* reserve a full erase group for each GTP headers */
578 if (mmc->erase_grp_size > GPT_HEADER_SZ) {
579 first_addr = dev->erase_size;
580 last_addr = (u64)(block_dev->lba -
581 mmc->erase_grp_size) *
582 block_dev->blksz;
583 } else {
584 first_addr = (u64)GPT_HEADER_SZ * block_dev->blksz;
585 last_addr = (u64)(block_dev->lba - GPT_HEADER_SZ - 1) *
586 block_dev->blksz;
587 }
588 log_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
589 block_dev->lba, block_dev->blksz);
590 log_debug(" available address = 0x%llx..0x%llx\n",
591 first_addr, last_addr);
592 log_debug(" full_update = %d\n", dev->full_update);
593 break;
594 case STM32PROG_NOR:
595 case STM32PROG_NAND:
596 case STM32PROG_SPI_NAND:
597 if (!IS_ENABLED(CONFIG_MTD)) {
598 stm32prog_err("unknown device type = %d", dev->target);
599 return -ENODEV;
600 }
601 get_mtd_by_target(mtd_id, dev->target, dev->dev_id);
602 log_debug("%s\n", mtd_id);
603
604 mtdparts_init();
605 mtd = get_mtd_device_nm(mtd_id);
606 if (IS_ERR(mtd)) {
607 stm32prog_err("MTD device %s not found", mtd_id);
608 return -ENODEV;
609 }
610 first_addr = 0;
611 last_addr = mtd->size;
612 dev->erase_size = mtd->erasesize;
613 log_debug("MTD device %s: size=%lld erasesize=%d\n",
614 mtd_id, mtd->size, mtd->erasesize);
615 log_debug(" available address = 0x%llx..0x%llx\n",
616 first_addr, last_addr);
617 dev->mtd = mtd;
618 break;
619 case STM32PROG_RAM:
620 first_addr = gd->bd->bi_dram[0].start;
621 last_addr = first_addr + gd->bd->bi_dram[0].size;
622 dev->erase_size = 1;
623 break;
624 default:
625 stm32prog_err("unknown device type = %d", dev->target);
626 return -ENODEV;
627 }
628 log_debug(" erase size = 0x%x\n", dev->erase_size);
629 log_debug(" full_update = %d\n", dev->full_update);
630
631 /* order partition list in offset order */
632 list_sort(NULL, &dev->part_list, &part_cmp);
633 part_id = 1;
634 log_debug("id : Opt Phase Name target.n dev.n addr size part_off part_size\n");
635 list_for_each_entry(part, &dev->part_list, list) {
636 if (part->bin_nb > 1) {
637 if ((dev->target != STM32PROG_NAND &&
638 dev->target != STM32PROG_SPI_NAND) ||
639 part->id >= PHASE_FIRST_USER ||
640 strncmp(part->name, "fsbl", 4)) {
641 stm32prog_err("%s (0x%x): multiple binary %d not supported",
642 part->name, part->id,
643 part->bin_nb);
644 return -EINVAL;
645 }
646 }
647 if (part->part_type == RAW_IMAGE) {
648 part->part_id = 0x0;
649 part->addr = 0x0;
650 if (block_dev)
651 part->size = block_dev->lba * block_dev->blksz;
652 else
653 part->size = last_addr;
654 log_debug("-- : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx\n",
655 part->option, part->id, part->name,
656 part->part_type, part->bin_nb, part->target,
657 part->dev_id, part->addr, part->size);
658 continue;
659 }
660 if (part->part_id < 0) { /* boot hw partition for eMMC */
661 if (mmc) {
662 part->size = mmc->capacity_boot;
663 } else {
664 stm32prog_err("%s (0x%x): hw partition not expected : %d",
665 part->name, part->id,
666 part->part_id);
667 return -ENODEV;
668 }
669 } else {
670 part->part_id = part_id++;
671
672 /* last partition : size to the end of the device */
673 if (part->list.next != &dev->part_list) {
674 next_part =
675 container_of(part->list.next,
676 struct stm32prog_part_t,
677 list);
678 if (part->addr < next_part->addr) {
679 part->size = next_part->addr -
680 part->addr;
681 } else {
682 stm32prog_err("%s (0x%x): same address : 0x%llx == %s (0x%x): 0x%llx",
683 part->name, part->id,
684 part->addr,
685 next_part->name,
686 next_part->id,
687 next_part->addr);
688 return -EINVAL;
689 }
690 } else {
691 if (part->addr <= last_addr) {
692 part->size = last_addr - part->addr;
693 } else {
694 stm32prog_err("%s (0x%x): invalid address 0x%llx (max=0x%llx)",
695 part->name, part->id,
696 part->addr, last_addr);
697 return -EINVAL;
698 }
699 }
700 if (part->addr < first_addr) {
701 stm32prog_err("%s (0x%x): invalid address 0x%llx (min=0x%llx)",
702 part->name, part->id,
703 part->addr, first_addr);
704 return -EINVAL;
705 }
706 }
707 if ((part->addr & ((u64)part->dev->erase_size - 1)) != 0) {
708 stm32prog_err("%s (0x%x): not aligned address : 0x%llx on erase size 0x%x",
709 part->name, part->id, part->addr,
710 part->dev->erase_size);
711 return -EINVAL;
712 }
713 log_debug("%02d : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx",
714 part->part_id, part->option, part->id, part->name,
715 part->part_type, part->bin_nb, part->target,
716 part->dev_id, part->addr, part->size);
717
718 part_addr = 0;
719 part_size = 0;
720 part_found = false;
721
722 /* check coherency with existing partition */
723 if (block_dev) {
724 /*
725 * block devices with GPT: check user partition size
726 * only for partial update, the GPT partions are be
727 * created for full update
728 */
729 if (dev->full_update || part->part_id < 0) {
730 log_debug("\n");
731 continue;
732 }
733 struct disk_partition partinfo;
734
735 ret = part_get_info(block_dev, part->part_id,
736 &partinfo);
737
738 if (ret) {
739 stm32prog_err("%s (0x%x):Couldn't find part %d on device mmc %d",
740 part->name, part->id,
741 part_id, part->dev_id);
742 return -ENODEV;
743 }
744 part_addr = (u64)partinfo.start * partinfo.blksz;
745 part_size = (u64)partinfo.size * partinfo.blksz;
746 part_name = (char *)partinfo.name;
747 part_found = true;
748 }
749
750 if (IS_ENABLED(CONFIG_MTD) && mtd) {
751 char mtd_part_id[32];
752 struct part_info *mtd_part;
753 struct mtd_device *mtd_dev;
754 u8 part_num;
755
756 sprintf(mtd_part_id, "%s,%d", mtd_id,
757 part->part_id - 1);
758 ret = find_dev_and_part(mtd_part_id, &mtd_dev,
759 &part_num, &mtd_part);
760 if (ret != 0) {
761 stm32prog_err("%s (0x%x): Invalid MTD partition %s",
762 part->name, part->id,
763 mtd_part_id);
764 return -ENODEV;
765 }
766 part_addr = mtd_part->offset;
767 part_size = mtd_part->size;
768 part_name = mtd_part->name;
769 part_found = true;
770 }
771
772 /* no partition for this device */
773 if (!part_found) {
774 log_debug("\n");
775 continue;
776 }
777
778 log_debug(" %08llx %08llx\n", part_addr, part_size);
779
780 if (part->addr != part_addr) {
781 stm32prog_err("%s (0x%x): Bad address for partition %d (%s) = 0x%llx <> 0x%llx expected",
782 part->name, part->id, part->part_id,
783 part_name, part->addr, part_addr);
784 return -ENODEV;
785 }
786 if (part->size != part_size) {
787 stm32prog_err("%s (0x%x): Bad size for partition %d (%s) at 0x%llx = 0x%llx <> 0x%llx expected",
788 part->name, part->id, part->part_id,
789 part_name, part->addr, part->size,
790 part_size);
791 return -ENODEV;
792 }
793 }
794 return 0;
795 }
796
treat_partition_list(struct stm32prog_data * data)797 static int treat_partition_list(struct stm32prog_data *data)
798 {
799 int i, j;
800 struct stm32prog_part_t *part;
801
802 for (j = 0; j < STM32PROG_MAX_DEV; j++) {
803 data->dev[j].target = STM32PROG_NONE;
804 INIT_LIST_HEAD(&data->dev[j].part_list);
805 }
806
807 data->tee_detected = false;
808 data->fsbl_nor_detected = false;
809 for (i = 0; i < data->part_nb; i++) {
810 part = &data->part_array[i];
811 part->alt_id = -1;
812
813 /* skip partition with IP="none" */
814 if (part->target == STM32PROG_NONE) {
815 if (IS_SELECT(part)) {
816 stm32prog_err("Layout: selected none phase = 0x%x",
817 part->id);
818 return -EINVAL;
819 }
820 continue;
821 }
822
823 if (part->id == PHASE_FLASHLAYOUT ||
824 part->id > PHASE_LAST_USER) {
825 stm32prog_err("Layout: invalid phase = 0x%x",
826 part->id);
827 return -EINVAL;
828 }
829 for (j = i + 1; j < data->part_nb; j++) {
830 if (part->id == data->part_array[j].id) {
831 stm32prog_err("Layout: duplicated phase 0x%x at line %d and %d",
832 part->id, i, j);
833 return -EINVAL;
834 }
835 }
836 for (j = 0; j < STM32PROG_MAX_DEV; j++) {
837 if (data->dev[j].target == STM32PROG_NONE) {
838 /* new device found */
839 data->dev[j].target = part->target;
840 data->dev[j].dev_id = part->dev_id;
841 data->dev[j].full_update = true;
842 data->dev_nb++;
843 break;
844 } else if ((part->target == data->dev[j].target) &&
845 (part->dev_id == data->dev[j].dev_id)) {
846 break;
847 }
848 }
849 if (j == STM32PROG_MAX_DEV) {
850 stm32prog_err("Layout: too many device");
851 return -EINVAL;
852 }
853 switch (part->target) {
854 case STM32PROG_NOR:
855 if (!data->fsbl_nor_detected &&
856 !strncmp(part->name, "fsbl", 4))
857 data->fsbl_nor_detected = true;
858 /* fallthrough */
859 case STM32PROG_NAND:
860 case STM32PROG_SPI_NAND:
861 if (!data->tee_detected &&
862 !strncmp(part->name, "tee", 3))
863 data->tee_detected = true;
864 break;
865 default:
866 break;
867 }
868 part->dev = &data->dev[j];
869 if (!IS_SELECT(part))
870 part->dev->full_update = false;
871 list_add_tail(&part->list, &data->dev[j].part_list);
872 }
873
874 return 0;
875 }
876
create_gpt_partitions(struct stm32prog_data * data)877 static int create_gpt_partitions(struct stm32prog_data *data)
878 {
879 int offset = 0;
880 const int buflen = SZ_8K;
881 char *buf;
882 char uuid[UUID_STR_LEN + 1];
883 unsigned char *uuid_bin;
884 unsigned int mmc_id;
885 int i;
886 bool rootfs_found;
887 struct stm32prog_part_t *part;
888
889 buf = malloc(buflen);
890 if (!buf)
891 return -ENOMEM;
892
893 puts("partitions : ");
894 /* initialize the selected device */
895 for (i = 0; i < data->dev_nb; i++) {
896 /* create gpt partition support only for full update on MMC */
897 if (data->dev[i].target != STM32PROG_MMC ||
898 !data->dev[i].full_update)
899 continue;
900
901 offset = 0;
902 rootfs_found = false;
903 memset(buf, 0, buflen);
904
905 list_for_each_entry(part, &data->dev[i].part_list, list) {
906 /* skip eMMC boot partitions */
907 if (part->part_id < 0)
908 continue;
909 /* skip Raw Image */
910 if (part->part_type == RAW_IMAGE)
911 continue;
912
913 if (offset + 100 > buflen) {
914 log_debug("\n%s: buffer too small, %s skippped",
915 __func__, part->name);
916 continue;
917 }
918
919 if (!offset)
920 offset += sprintf(buf, "gpt write mmc %d \"",
921 data->dev[i].dev_id);
922
923 offset += snprintf(buf + offset, buflen - offset,
924 "name=%s,start=0x%llx,size=0x%llx",
925 part->name,
926 part->addr,
927 part->size);
928
929 if (part->part_type == PART_BINARY)
930 offset += snprintf(buf + offset,
931 buflen - offset,
932 ",type="
933 LINUX_RESERVED_UUID);
934 else
935 offset += snprintf(buf + offset,
936 buflen - offset,
937 ",type=linux");
938
939 if (part->part_type == PART_SYSTEM)
940 offset += snprintf(buf + offset,
941 buflen - offset,
942 ",bootable");
943
944 if (!rootfs_found && !strcmp(part->name, "rootfs")) {
945 mmc_id = part->dev_id;
946 rootfs_found = true;
947 if (mmc_id < ARRAY_SIZE(uuid_mmc)) {
948 uuid_bin =
949 (unsigned char *)uuid_mmc[mmc_id].b;
950 uuid_bin_to_str(uuid_bin, uuid,
951 UUID_STR_FORMAT_GUID);
952 offset += snprintf(buf + offset,
953 buflen - offset,
954 ",uuid=%s", uuid);
955 }
956 }
957
958 offset += snprintf(buf + offset, buflen - offset, ";");
959 }
960
961 if (offset) {
962 offset += snprintf(buf + offset, buflen - offset, "\"");
963 log_debug("\ncmd: %s\n", buf);
964 if (run_command(buf, 0)) {
965 stm32prog_err("GPT partitionning fail: %s",
966 buf);
967 free(buf);
968
969 return -1;
970 }
971 }
972
973 if (data->dev[i].mmc)
974 part_init(mmc_get_blk_desc(data->dev[i].mmc));
975
976 #ifdef DEBUG
977 sprintf(buf, "gpt verify mmc %d", data->dev[i].dev_id);
978 log_debug("\ncmd: %s", buf);
979 if (run_command(buf, 0))
980 printf("fail !\n");
981 else
982 printf("OK\n");
983
984 sprintf(buf, "part list mmc %d", data->dev[i].dev_id);
985 run_command(buf, 0);
986 #endif
987 }
988 puts("done\n");
989
990 #ifdef DEBUG
991 run_command("mtd list", 0);
992 #endif
993 free(buf);
994
995 return 0;
996 }
997
stm32prog_alt_add(struct stm32prog_data * data,struct dfu_entity * dfu,struct stm32prog_part_t * part)998 static int stm32prog_alt_add(struct stm32prog_data *data,
999 struct dfu_entity *dfu,
1000 struct stm32prog_part_t *part)
1001 {
1002 int ret = 0;
1003 int offset = 0;
1004 char devstr[10];
1005 char dfustr[10];
1006 char buf[ALT_BUF_LEN];
1007 u32 size;
1008 char multiplier, type;
1009
1010 /* max 3 digit for sector size */
1011 if (part->size > SZ_1M) {
1012 size = (u32)(part->size / SZ_1M);
1013 multiplier = 'M';
1014 } else if (part->size > SZ_1K) {
1015 size = (u32)(part->size / SZ_1K);
1016 multiplier = 'K';
1017 } else {
1018 size = (u32)part->size;
1019 multiplier = 'B';
1020 }
1021 if (IS_SELECT(part) && !IS_EMPTY(part))
1022 type = 'e'; /*Readable and Writeable*/
1023 else
1024 type = 'a';/*Readable*/
1025
1026 memset(buf, 0, sizeof(buf));
1027 offset = snprintf(buf, ALT_BUF_LEN - offset,
1028 "@%s/0x%02x/1*%d%c%c ",
1029 part->name, part->id,
1030 size, multiplier, type);
1031
1032 if (part->target == STM32PROG_RAM) {
1033 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1034 "ram 0x%llx 0x%llx",
1035 part->addr, part->size);
1036 } else if (part->part_type == RAW_IMAGE) {
1037 u64 dfu_size;
1038
1039 if (part->dev->target == STM32PROG_MMC)
1040 dfu_size = part->size / part->dev->mmc->read_bl_len;
1041 else
1042 dfu_size = part->size;
1043 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1044 "raw 0x0 0x%llx", dfu_size);
1045 } else if (part->part_id < 0) {
1046 u64 nb_blk = part->size / part->dev->mmc->read_bl_len;
1047
1048 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1049 "raw 0x%llx 0x%llx",
1050 part->addr, nb_blk);
1051 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1052 " mmcpart %d;", -(part->part_id));
1053 } else {
1054 if (part->part_type == PART_SYSTEM &&
1055 (part->target == STM32PROG_NAND ||
1056 part->target == STM32PROG_NOR ||
1057 part->target == STM32PROG_SPI_NAND))
1058 offset += snprintf(buf + offset,
1059 ALT_BUF_LEN - offset,
1060 "partubi");
1061 else
1062 offset += snprintf(buf + offset,
1063 ALT_BUF_LEN - offset,
1064 "part");
1065 /* dev_id requested by DFU MMC */
1066 if (part->target == STM32PROG_MMC)
1067 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1068 " %d", part->dev_id);
1069 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1070 " %d;", part->part_id);
1071 }
1072 ret = -ENODEV;
1073 switch (part->target) {
1074 case STM32PROG_MMC:
1075 if (IS_ENABLED(CONFIG_MMC)) {
1076 ret = 0;
1077 sprintf(dfustr, "mmc");
1078 sprintf(devstr, "%d", part->dev_id);
1079 }
1080 break;
1081 case STM32PROG_NAND:
1082 case STM32PROG_NOR:
1083 case STM32PROG_SPI_NAND:
1084 if (IS_ENABLED(CONFIG_MTD)) {
1085 ret = 0;
1086 sprintf(dfustr, "mtd");
1087 get_mtd_by_target(devstr, part->target, part->dev_id);
1088 }
1089 break;
1090 case STM32PROG_RAM:
1091 ret = 0;
1092 sprintf(dfustr, "ram");
1093 sprintf(devstr, "0");
1094 break;
1095 default:
1096 break;
1097 }
1098 if (ret) {
1099 stm32prog_err("invalid target: %d", part->target);
1100 return ret;
1101 }
1102 log_debug("dfu_alt_add(%s,%s,%s)\n", dfustr, devstr, buf);
1103 ret = dfu_alt_add(dfu, dfustr, devstr, buf);
1104 log_debug("dfu_alt_add(%s,%s,%s) result %d\n",
1105 dfustr, devstr, buf, ret);
1106
1107 return ret;
1108 }
1109
stm32prog_alt_add_virt(struct dfu_entity * dfu,char * name,int phase,int size)1110 static int stm32prog_alt_add_virt(struct dfu_entity *dfu,
1111 char *name, int phase, int size)
1112 {
1113 int ret = 0;
1114 char devstr[4];
1115 char buf[ALT_BUF_LEN];
1116
1117 sprintf(devstr, "%d", phase);
1118 sprintf(buf, "@%s/0x%02x/1*%dBe", name, phase, size);
1119 ret = dfu_alt_add(dfu, "virt", devstr, buf);
1120 log_debug("dfu_alt_add(virt,%s,%s) result %d\n", devstr, buf, ret);
1121
1122 return ret;
1123 }
1124
dfu_init_entities(struct stm32prog_data * data)1125 static int dfu_init_entities(struct stm32prog_data *data)
1126 {
1127 int ret = 0;
1128 int phase, i, alt_id;
1129 struct stm32prog_part_t *part;
1130 struct dfu_entity *dfu;
1131 int alt_nb;
1132
1133 alt_nb = 3; /* number of virtual = CMD, OTP, PMIC*/
1134 if (data->part_nb == 0)
1135 alt_nb++; /* +1 for FlashLayout */
1136 else
1137 for (i = 0; i < data->part_nb; i++) {
1138 if (data->part_array[i].target != STM32PROG_NONE)
1139 alt_nb++;
1140 }
1141
1142 if (dfu_alt_init(alt_nb, &dfu))
1143 return -ENODEV;
1144
1145 puts("DFU alt info setting: ");
1146 if (data->part_nb) {
1147 alt_id = 0;
1148 for (phase = 1;
1149 (phase <= PHASE_LAST_USER) &&
1150 (alt_id < alt_nb) && !ret;
1151 phase++) {
1152 /* ordering alt setting by phase id */
1153 part = NULL;
1154 for (i = 0; i < data->part_nb; i++) {
1155 if (phase == data->part_array[i].id) {
1156 part = &data->part_array[i];
1157 break;
1158 }
1159 }
1160 if (!part)
1161 continue;
1162 if (part->target == STM32PROG_NONE)
1163 continue;
1164 part->alt_id = alt_id;
1165 alt_id++;
1166
1167 ret = stm32prog_alt_add(data, dfu, part);
1168 }
1169 } else {
1170 char buf[ALT_BUF_LEN];
1171
1172 sprintf(buf, "@FlashLayout/0x%02x/1*256Ke ram %x 40000",
1173 PHASE_FLASHLAYOUT, STM32_DDR_BASE);
1174 ret = dfu_alt_add(dfu, "ram", NULL, buf);
1175 log_debug("dfu_alt_add(ram, NULL,%s) result %d\n", buf, ret);
1176 }
1177
1178 if (!ret)
1179 ret = stm32prog_alt_add_virt(dfu, "virtual", PHASE_CMD, 512);
1180
1181 if (!ret)
1182 ret = stm32prog_alt_add_virt(dfu, "OTP", PHASE_OTP, 512);
1183
1184 if (!ret && CONFIG_IS_ENABLED(DM_PMIC))
1185 ret = stm32prog_alt_add_virt(dfu, "PMIC", PHASE_PMIC, 8);
1186
1187 if (ret)
1188 stm32prog_err("dfu init failed: %d", ret);
1189 puts("done\n");
1190
1191 #ifdef DEBUG
1192 dfu_show_entities();
1193 #endif
1194 return ret;
1195 }
1196
stm32prog_otp_write(struct stm32prog_data * data,u32 offset,u8 * buffer,long * size)1197 int stm32prog_otp_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
1198 long *size)
1199 {
1200 log_debug("%s: %x %lx\n", __func__, offset, *size);
1201
1202 if (!data->otp_part) {
1203 data->otp_part = memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
1204 if (!data->otp_part)
1205 return -ENOMEM;
1206 }
1207
1208 if (!offset)
1209 memset(data->otp_part, 0, OTP_SIZE);
1210
1211 if (offset + *size > OTP_SIZE)
1212 *size = OTP_SIZE - offset;
1213
1214 memcpy((void *)((u32)data->otp_part + offset), buffer, *size);
1215
1216 return 0;
1217 }
1218
stm32prog_otp_read(struct stm32prog_data * data,u32 offset,u8 * buffer,long * size)1219 int stm32prog_otp_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
1220 long *size)
1221 {
1222 int result = 0;
1223
1224 if (!IS_ENABLED(CONFIG_ARM_SMCCC)) {
1225 stm32prog_err("OTP update not supported");
1226
1227 return -1;
1228 }
1229
1230 log_debug("%s: %x %lx\n", __func__, offset, *size);
1231 /* alway read for first packet */
1232 if (!offset) {
1233 if (!data->otp_part)
1234 data->otp_part =
1235 memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
1236
1237 if (!data->otp_part) {
1238 result = -ENOMEM;
1239 goto end_otp_read;
1240 }
1241
1242 /* init struct with 0 */
1243 memset(data->otp_part, 0, OTP_SIZE);
1244
1245 /* call the service */
1246 result = stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_READ_ALL,
1247 (u32)data->otp_part, 0);
1248 if (result)
1249 goto end_otp_read;
1250 }
1251
1252 if (!data->otp_part) {
1253 result = -ENOMEM;
1254 goto end_otp_read;
1255 }
1256
1257 if (offset + *size > OTP_SIZE)
1258 *size = OTP_SIZE - offset;
1259 memcpy(buffer, (void *)((u32)data->otp_part + offset), *size);
1260
1261 end_otp_read:
1262 log_debug("%s: result %i\n", __func__, result);
1263
1264 return result;
1265 }
1266
stm32prog_otp_start(struct stm32prog_data * data)1267 int stm32prog_otp_start(struct stm32prog_data *data)
1268 {
1269 int result = 0;
1270 struct arm_smccc_res res;
1271
1272 if (!IS_ENABLED(CONFIG_ARM_SMCCC)) {
1273 stm32prog_err("OTP update not supported");
1274
1275 return -1;
1276 }
1277
1278 if (!data->otp_part) {
1279 stm32prog_err("start OTP without data");
1280 return -1;
1281 }
1282
1283 arm_smccc_smc(STM32_SMC_BSEC, STM32_SMC_WRITE_ALL,
1284 (u32)data->otp_part, 0, 0, 0, 0, 0, &res);
1285
1286 if (!res.a0) {
1287 switch (res.a1) {
1288 case 0:
1289 result = 0;
1290 break;
1291 case 1:
1292 stm32prog_err("Provisioning");
1293 result = 0;
1294 break;
1295 default:
1296 log_err("%s: OTP incorrect value (err = %ld)\n",
1297 __func__, res.a1);
1298 result = -EINVAL;
1299 break;
1300 }
1301 } else {
1302 log_err("%s: Failed to exec svc=%x op=%x in secure mode (err = %ld)\n",
1303 __func__, STM32_SMC_BSEC, STM32_SMC_WRITE_ALL, res.a0);
1304 result = -EINVAL;
1305 }
1306
1307 free(data->otp_part);
1308 data->otp_part = NULL;
1309 log_debug("%s: result %i\n", __func__, result);
1310
1311 return result;
1312 }
1313
stm32prog_pmic_write(struct stm32prog_data * data,u32 offset,u8 * buffer,long * size)1314 int stm32prog_pmic_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
1315 long *size)
1316 {
1317 log_debug("%s: %x %lx\n", __func__, offset, *size);
1318
1319 if (!offset)
1320 memset(data->pmic_part, 0, PMIC_SIZE);
1321
1322 if (offset + *size > PMIC_SIZE)
1323 *size = PMIC_SIZE - offset;
1324
1325 memcpy(&data->pmic_part[offset], buffer, *size);
1326
1327 return 0;
1328 }
1329
stm32prog_pmic_read(struct stm32prog_data * data,u32 offset,u8 * buffer,long * size)1330 int stm32prog_pmic_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
1331 long *size)
1332 {
1333 int result = 0, ret;
1334 struct udevice *dev;
1335
1336 if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
1337 stm32prog_err("PMIC update not supported");
1338
1339 return -EOPNOTSUPP;
1340 }
1341
1342 log_debug("%s: %x %lx\n", __func__, offset, *size);
1343 ret = uclass_get_device_by_driver(UCLASS_MISC,
1344 DM_DRIVER_GET(stpmic1_nvm),
1345 &dev);
1346 if (ret)
1347 return ret;
1348
1349 /* alway request PMIC for first packet */
1350 if (!offset) {
1351 /* init struct with 0 */
1352 memset(data->pmic_part, 0, PMIC_SIZE);
1353
1354 ret = uclass_get_device_by_driver(UCLASS_MISC,
1355 DM_DRIVER_GET(stpmic1_nvm),
1356 &dev);
1357 if (ret)
1358 return ret;
1359
1360 ret = misc_read(dev, 0xF8, data->pmic_part, PMIC_SIZE);
1361 if (ret < 0) {
1362 result = ret;
1363 goto end_pmic_read;
1364 }
1365 if (ret != PMIC_SIZE) {
1366 result = -EACCES;
1367 goto end_pmic_read;
1368 }
1369 }
1370
1371 if (offset + *size > PMIC_SIZE)
1372 *size = PMIC_SIZE - offset;
1373
1374 memcpy(buffer, &data->pmic_part[offset], *size);
1375
1376 end_pmic_read:
1377 log_debug("%s: result %i\n", __func__, result);
1378 return result;
1379 }
1380
stm32prog_pmic_start(struct stm32prog_data * data)1381 int stm32prog_pmic_start(struct stm32prog_data *data)
1382 {
1383 int ret;
1384 struct udevice *dev;
1385
1386 if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
1387 stm32prog_err("PMIC update not supported");
1388
1389 return -EOPNOTSUPP;
1390 }
1391
1392 ret = uclass_get_device_by_driver(UCLASS_MISC,
1393 DM_DRIVER_GET(stpmic1_nvm),
1394 &dev);
1395 if (ret)
1396 return ret;
1397
1398 return misc_write(dev, 0xF8, data->pmic_part, PMIC_SIZE);
1399 }
1400
1401 /* copy FSBL on NAND to improve reliability on NAND */
stm32prog_copy_fsbl(struct stm32prog_part_t * part)1402 static int stm32prog_copy_fsbl(struct stm32prog_part_t *part)
1403 {
1404 int ret, i;
1405 void *fsbl;
1406 struct image_header_s header;
1407 struct raw_header_s raw_header;
1408 struct dfu_entity *dfu;
1409 long size, offset;
1410
1411 if (part->target != STM32PROG_NAND &&
1412 part->target != STM32PROG_SPI_NAND)
1413 return -1;
1414
1415 dfu = dfu_get_entity(part->alt_id);
1416
1417 /* read header */
1418 dfu_transaction_cleanup(dfu);
1419 size = BL_HEADER_SIZE;
1420 ret = dfu->read_medium(dfu, 0, (void *)&raw_header, &size);
1421 if (ret)
1422 return ret;
1423 if (stm32prog_header_check(&raw_header, &header))
1424 return -1;
1425
1426 /* read header + payload */
1427 size = header.image_length + BL_HEADER_SIZE;
1428 size = round_up(size, part->dev->mtd->erasesize);
1429 fsbl = calloc(1, size);
1430 if (!fsbl)
1431 return -ENOMEM;
1432 ret = dfu->read_medium(dfu, 0, fsbl, &size);
1433 log_debug("%s read size=%lx ret=%d\n", __func__, size, ret);
1434 if (ret)
1435 goto error;
1436
1437 dfu_transaction_cleanup(dfu);
1438 offset = 0;
1439 for (i = part->bin_nb - 1; i > 0; i--) {
1440 offset += size;
1441 /* write to the next erase block */
1442 ret = dfu->write_medium(dfu, offset, fsbl, &size);
1443 log_debug("%s copy at ofset=%lx size=%lx ret=%d",
1444 __func__, offset, size, ret);
1445 if (ret)
1446 goto error;
1447 }
1448
1449 error:
1450 free(fsbl);
1451 return ret;
1452 }
1453
stm32prog_end_phase(struct stm32prog_data * data)1454 static void stm32prog_end_phase(struct stm32prog_data *data)
1455 {
1456 if (data->phase == PHASE_FLASHLAYOUT) {
1457 if (parse_flash_layout(data, STM32_DDR_BASE, 0))
1458 stm32prog_err("Layout: invalid FlashLayout");
1459 return;
1460 }
1461
1462 if (!data->cur_part)
1463 return;
1464
1465 if (data->cur_part->target == STM32PROG_RAM) {
1466 if (data->cur_part->part_type == PART_SYSTEM)
1467 data->uimage = data->cur_part->addr;
1468 if (data->cur_part->part_type == PART_FILESYSTEM)
1469 data->dtb = data->cur_part->addr;
1470 }
1471
1472 if (CONFIG_IS_ENABLED(MMC) &&
1473 data->cur_part->part_id < 0) {
1474 char cmdbuf[60];
1475
1476 sprintf(cmdbuf, "mmc bootbus %d 0 0 0; mmc partconf %d 1 %d 0",
1477 data->cur_part->dev_id, data->cur_part->dev_id,
1478 -(data->cur_part->part_id));
1479 if (run_command(cmdbuf, 0)) {
1480 stm32prog_err("commands '%s' failed", cmdbuf);
1481 return;
1482 }
1483 }
1484
1485 if (CONFIG_IS_ENABLED(MTD) &&
1486 data->cur_part->bin_nb > 1) {
1487 if (stm32prog_copy_fsbl(data->cur_part)) {
1488 stm32prog_err("%s (0x%x): copy of fsbl failed",
1489 data->cur_part->name, data->cur_part->id);
1490 return;
1491 }
1492 }
1493 }
1494
stm32prog_do_reset(struct stm32prog_data * data)1495 void stm32prog_do_reset(struct stm32prog_data *data)
1496 {
1497 if (data->phase == PHASE_RESET) {
1498 data->phase = PHASE_DO_RESET;
1499 puts("Reset requested\n");
1500 }
1501 }
1502
stm32prog_next_phase(struct stm32prog_data * data)1503 void stm32prog_next_phase(struct stm32prog_data *data)
1504 {
1505 int phase, i;
1506 struct stm32prog_part_t *part;
1507 bool found;
1508
1509 phase = data->phase;
1510 switch (phase) {
1511 case PHASE_RESET:
1512 case PHASE_END:
1513 case PHASE_DO_RESET:
1514 return;
1515 }
1516
1517 /* found next selected partition */
1518 data->dfu_seq = 0;
1519 data->cur_part = NULL;
1520 data->phase = PHASE_END;
1521 found = false;
1522 do {
1523 phase++;
1524 if (phase > PHASE_LAST_USER)
1525 break;
1526 for (i = 0; i < data->part_nb; i++) {
1527 part = &data->part_array[i];
1528 if (part->id == phase) {
1529 if (IS_SELECT(part) && !IS_EMPTY(part)) {
1530 data->cur_part = part;
1531 data->phase = phase;
1532 found = true;
1533 }
1534 break;
1535 }
1536 }
1537 } while (!found);
1538
1539 if (data->phase == PHASE_END)
1540 puts("Phase=END\n");
1541 }
1542
part_delete(struct stm32prog_data * data,struct stm32prog_part_t * part)1543 static int part_delete(struct stm32prog_data *data,
1544 struct stm32prog_part_t *part)
1545 {
1546 int ret = 0;
1547 unsigned long blks, blks_offset, blks_size;
1548 struct blk_desc *block_dev = NULL;
1549 char cmdbuf[40];
1550 char devstr[10];
1551
1552 printf("Erasing %s ", part->name);
1553 switch (part->target) {
1554 case STM32PROG_MMC:
1555 if (!IS_ENABLED(CONFIG_MMC)) {
1556 ret = -1;
1557 stm32prog_err("%s (0x%x): erase invalid",
1558 part->name, part->id);
1559 break;
1560 }
1561 printf("on mmc %d: ", part->dev->dev_id);
1562 block_dev = mmc_get_blk_desc(part->dev->mmc);
1563 blks_offset = lldiv(part->addr, part->dev->mmc->read_bl_len);
1564 blks_size = lldiv(part->size, part->dev->mmc->read_bl_len);
1565 /* -1 or -2 : delete boot partition of MMC
1566 * need to switch to associated hwpart 1 or 2
1567 */
1568 if (part->part_id < 0)
1569 if (blk_select_hwpart_devnum(IF_TYPE_MMC,
1570 part->dev->dev_id,
1571 -part->part_id))
1572 return -1;
1573
1574 blks = blk_derase(block_dev, blks_offset, blks_size);
1575
1576 /* return to user partition */
1577 if (part->part_id < 0)
1578 blk_select_hwpart_devnum(IF_TYPE_MMC,
1579 part->dev->dev_id, 0);
1580 if (blks != blks_size) {
1581 ret = -1;
1582 stm32prog_err("%s (0x%x): MMC erase failed",
1583 part->name, part->id);
1584 }
1585 break;
1586 case STM32PROG_NOR:
1587 case STM32PROG_NAND:
1588 case STM32PROG_SPI_NAND:
1589 if (!IS_ENABLED(CONFIG_MTD)) {
1590 ret = -1;
1591 stm32prog_err("%s (0x%x): erase invalid",
1592 part->name, part->id);
1593 break;
1594 }
1595 get_mtd_by_target(devstr, part->target, part->dev->dev_id);
1596 printf("on %s: ", devstr);
1597 sprintf(cmdbuf, "mtd erase %s 0x%llx 0x%llx",
1598 devstr, part->addr, part->size);
1599 if (run_command(cmdbuf, 0)) {
1600 ret = -1;
1601 stm32prog_err("%s (0x%x): MTD erase commands failed (%s)",
1602 part->name, part->id, cmdbuf);
1603 }
1604 break;
1605 case STM32PROG_RAM:
1606 printf("on ram: ");
1607 memset((void *)(uintptr_t)part->addr, 0, (size_t)part->size);
1608 break;
1609 default:
1610 ret = -1;
1611 stm32prog_err("%s (0x%x): erase invalid", part->name, part->id);
1612 break;
1613 }
1614 if (!ret)
1615 printf("done\n");
1616
1617 return ret;
1618 }
1619
stm32prog_devices_init(struct stm32prog_data * data)1620 static void stm32prog_devices_init(struct stm32prog_data *data)
1621 {
1622 int i;
1623 int ret;
1624 struct stm32prog_part_t *part;
1625
1626 ret = treat_partition_list(data);
1627 if (ret)
1628 goto error;
1629
1630 /* initialize the selected device */
1631 for (i = 0; i < data->dev_nb; i++) {
1632 ret = init_device(data, &data->dev[i]);
1633 if (ret)
1634 goto error;
1635 }
1636
1637 /* delete RAW partition before create partition */
1638 for (i = 0; i < data->part_nb; i++) {
1639 part = &data->part_array[i];
1640
1641 if (part->part_type != RAW_IMAGE)
1642 continue;
1643
1644 if (!IS_SELECT(part) || !IS_DELETE(part))
1645 continue;
1646
1647 ret = part_delete(data, part);
1648 if (ret)
1649 goto error;
1650 }
1651
1652 if (IS_ENABLED(CONFIG_MMC)) {
1653 ret = create_gpt_partitions(data);
1654 if (ret)
1655 goto error;
1656 }
1657
1658 /* delete partition GPT or MTD */
1659 for (i = 0; i < data->part_nb; i++) {
1660 part = &data->part_array[i];
1661
1662 if (part->part_type == RAW_IMAGE)
1663 continue;
1664
1665 if (!IS_SELECT(part) || !IS_DELETE(part))
1666 continue;
1667
1668 ret = part_delete(data, part);
1669 if (ret)
1670 goto error;
1671 }
1672
1673 return;
1674
1675 error:
1676 data->part_nb = 0;
1677 }
1678
stm32prog_dfu_init(struct stm32prog_data * data)1679 int stm32prog_dfu_init(struct stm32prog_data *data)
1680 {
1681 /* init device if no error */
1682 if (data->part_nb)
1683 stm32prog_devices_init(data);
1684
1685 if (data->part_nb)
1686 stm32prog_next_phase(data);
1687
1688 /* prepare DFU for device read/write */
1689 dfu_free_entities();
1690 return dfu_init_entities(data);
1691 }
1692
stm32prog_init(struct stm32prog_data * data,ulong addr,ulong size)1693 int stm32prog_init(struct stm32prog_data *data, ulong addr, ulong size)
1694 {
1695 memset(data, 0x0, sizeof(*data));
1696 data->read_phase = PHASE_RESET;
1697 data->phase = PHASE_FLASHLAYOUT;
1698
1699 return parse_flash_layout(data, addr, size);
1700 }
1701
stm32prog_clean(struct stm32prog_data * data)1702 void stm32prog_clean(struct stm32prog_data *data)
1703 {
1704 /* clean */
1705 dfu_free_entities();
1706 free(data->part_array);
1707 free(data->otp_part);
1708 free(data->buffer);
1709 free(data->header_data);
1710 }
1711
1712 /* DFU callback: used after serial and direct DFU USB access */
dfu_flush_callback(struct dfu_entity * dfu)1713 void dfu_flush_callback(struct dfu_entity *dfu)
1714 {
1715 if (!stm32prog_data)
1716 return;
1717
1718 if (dfu->dev_type == DFU_DEV_VIRT) {
1719 if (dfu->data.virt.dev_num == PHASE_OTP)
1720 stm32prog_otp_start(stm32prog_data);
1721 else if (dfu->data.virt.dev_num == PHASE_PMIC)
1722 stm32prog_pmic_start(stm32prog_data);
1723 return;
1724 }
1725
1726 if (dfu->dev_type == DFU_DEV_RAM) {
1727 if (dfu->alt == 0 &&
1728 stm32prog_data->phase == PHASE_FLASHLAYOUT) {
1729 stm32prog_end_phase(stm32prog_data);
1730 /* waiting DFU DETACH for reenumeration */
1731 }
1732 }
1733
1734 if (!stm32prog_data->cur_part)
1735 return;
1736
1737 if (dfu->alt == stm32prog_data->cur_part->alt_id) {
1738 stm32prog_end_phase(stm32prog_data);
1739 stm32prog_next_phase(stm32prog_data);
1740 }
1741 }
1742
dfu_initiated_callback(struct dfu_entity * dfu)1743 void dfu_initiated_callback(struct dfu_entity *dfu)
1744 {
1745 if (!stm32prog_data)
1746 return;
1747
1748 if (!stm32prog_data->cur_part)
1749 return;
1750
1751 /* force the saved offset for the current partition */
1752 if (dfu->alt == stm32prog_data->cur_part->alt_id) {
1753 dfu->offset = stm32prog_data->offset;
1754 stm32prog_data->dfu_seq = 0;
1755 log_debug("dfu offset = 0x%llx\n", dfu->offset);
1756 }
1757 }
1758