1 /* SPDX-License-Identifier: ISC */
2 /* Copyright (C) 2020 MediaTek Inc. */
3
4 #ifndef __MT7915_H
5 #define __MT7915_H
6
7 #include <linux/interrupt.h>
8 #include <linux/ktime.h>
9 #include "../mt76.h"
10 #include "regs.h"
11
12 #define MT7915_MAX_INTERFACES 19
13 #define MT7915_MAX_WMM_SETS 4
14 #define MT7915_WTBL_SIZE 288
15 #define MT7915_WTBL_RESERVED (MT7915_WTBL_SIZE - 1)
16 #define MT7915_WTBL_STA (MT7915_WTBL_RESERVED - \
17 MT7915_MAX_INTERFACES)
18
19 #define MT7915_WATCHDOG_TIME (HZ / 10)
20 #define MT7915_RESET_TIMEOUT (30 * HZ)
21
22 #define MT7915_TX_RING_SIZE 2048
23 #define MT7915_TX_MCU_RING_SIZE 256
24 #define MT7915_TX_FWDL_RING_SIZE 128
25
26 #define MT7915_RX_RING_SIZE 1536
27 #define MT7915_RX_MCU_RING_SIZE 512
28
29 #define MT7915_FIRMWARE_WA "mediatek/mt7915_wa.bin"
30 #define MT7915_FIRMWARE_WM "mediatek/mt7915_wm.bin"
31 #define MT7915_ROM_PATCH "mediatek/mt7915_rom_patch.bin"
32
33 #define MT7915_EEPROM_SIZE 3584
34 #define MT7915_EEPROM_BLOCK_SIZE 16
35 #define MT7915_TOKEN_SIZE 8192
36
37 #define MT7915_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */
38 #define MT7915_CFEND_RATE_11B 0x03 /* 11B LP, 11M */
39
40 #define MT7915_THERMAL_THROTTLE_MAX 100
41
42 #define MT7915_SKU_RATE_NUM 161
43
44 #define MT7915_MAX_TWT_AGRT 16
45 #define MT7915_MAX_STA_TWT_AGRT 8
46
47 struct mt7915_vif;
48 struct mt7915_sta;
49 struct mt7915_dfs_pulse;
50 struct mt7915_dfs_pattern;
51
52 enum mt7915_txq_id {
53 MT7915_TXQ_FWDL = 16,
54 MT7915_TXQ_MCU_WM,
55 MT7915_TXQ_BAND0,
56 MT7915_TXQ_BAND1,
57 MT7915_TXQ_MCU_WA,
58 };
59
60 enum mt7915_rxq_id {
61 MT7915_RXQ_BAND0 = 0,
62 MT7915_RXQ_BAND1,
63 MT7915_RXQ_MCU_WM = 0,
64 MT7915_RXQ_MCU_WA,
65 MT7915_RXQ_MCU_WA_EXT,
66 };
67
68 struct mt7915_sta_key_conf {
69 s8 keyidx;
70 u8 key[16];
71 };
72
73 struct mt7915_twt_flow {
74 struct list_head list;
75 u64 start_tsf;
76 u64 tsf;
77 u32 duration;
78 u16 wcid;
79 __le16 mantissa;
80 u8 exp;
81 u8 table_id;
82 u8 id;
83 u8 protection:1;
84 u8 flowtype:1;
85 u8 trigger:1;
86 u8 sched:1;
87 };
88
89 struct mt7915_sta {
90 struct mt76_wcid wcid; /* must be first */
91
92 struct mt7915_vif *vif;
93
94 struct list_head poll_list;
95 struct list_head rc_list;
96 u32 airtime_ac[8];
97
98 unsigned long changed;
99 unsigned long jiffies;
100 unsigned long ampdu_state;
101
102 struct mt76_sta_stats stats;
103
104 struct mt7915_sta_key_conf bip;
105
106 struct {
107 u8 flowid_mask;
108 struct mt7915_twt_flow flow[MT7915_MAX_STA_TWT_AGRT];
109 } twt;
110 };
111
112 struct mt7915_vif_cap {
113 bool ldpc:1;
114 bool vht_su_ebfer:1;
115 bool vht_su_ebfee:1;
116 bool vht_mu_ebfer:1;
117 bool vht_mu_ebfee:1;
118 bool he_su_ebfer:1;
119 bool he_su_ebfee:1;
120 bool he_mu_ebfer:1;
121 };
122
123 struct mt7915_vif {
124 u16 idx;
125 u8 omac_idx;
126 u8 band_idx;
127 u8 wmm_idx;
128
129 struct mt7915_vif_cap cap;
130 struct mt7915_sta sta;
131 struct mt7915_phy *phy;
132
133 struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS];
134 struct cfg80211_bitrate_mask bitrate_mask;
135 };
136
137 /* per-phy stats. */
138 struct mib_stats {
139 u32 ack_fail_cnt;
140 u32 fcs_err_cnt;
141 u32 rts_cnt;
142 u32 rts_retries_cnt;
143 u32 ba_miss_cnt;
144 u32 tx_bf_cnt;
145 u32 tx_mu_mpdu_cnt;
146 u32 tx_mu_acked_mpdu_cnt;
147 u32 tx_su_acked_mpdu_cnt;
148 u32 tx_bf_ibf_ppdu_cnt;
149 u32 tx_bf_ebf_ppdu_cnt;
150
151 u32 tx_bf_rx_fb_all_cnt;
152 u32 tx_bf_rx_fb_he_cnt;
153 u32 tx_bf_rx_fb_vht_cnt;
154 u32 tx_bf_rx_fb_ht_cnt;
155
156 u32 tx_bf_rx_fb_bw; /* value of last sample, not cumulative */
157 u32 tx_bf_rx_fb_nc_cnt;
158 u32 tx_bf_rx_fb_nr_cnt;
159 u32 tx_bf_fb_cpl_cnt;
160 u32 tx_bf_fb_trig_cnt;
161
162 u32 tx_ampdu_cnt;
163 u32 tx_stop_q_empty_cnt;
164 u32 tx_mpdu_attempts_cnt;
165 u32 tx_mpdu_success_cnt;
166 u32 tx_pkt_ebf_cnt;
167 u32 tx_pkt_ibf_cnt;
168
169 u32 tx_rwp_fail_cnt;
170 u32 tx_rwp_need_cnt;
171
172 /* rx stats */
173 u32 rx_fifo_full_cnt;
174 u32 channel_idle_cnt;
175 u32 rx_vector_mismatch_cnt;
176 u32 rx_delimiter_fail_cnt;
177 u32 rx_len_mismatch_cnt;
178 u32 rx_mpdu_cnt;
179 u32 rx_ampdu_cnt;
180 u32 rx_ampdu_bytes_cnt;
181 u32 rx_ampdu_valid_subframe_cnt;
182 u32 rx_ampdu_valid_subframe_bytes_cnt;
183 u32 rx_pfdrop_cnt;
184 u32 rx_vec_queue_overflow_drop_cnt;
185 u32 rx_ba_cnt;
186
187 u32 tx_amsdu[8];
188 u32 tx_amsdu_cnt;
189 };
190
191 struct mt7915_hif {
192 struct list_head list;
193
194 struct device *dev;
195 void __iomem *regs;
196 int irq;
197 };
198
199 struct mt7915_phy {
200 struct mt76_phy *mt76;
201 struct mt7915_dev *dev;
202
203 struct ieee80211_sband_iftype_data iftype[2][NUM_NL80211_IFTYPES];
204
205 struct ieee80211_vif *monitor_vif;
206
207 struct thermal_cooling_device *cdev;
208 u8 throttle_state;
209 u32 throttle_temp[2]; /* 0: critical high, 1: maximum */
210
211 u32 rxfilter;
212 u64 omac_mask;
213
214 u16 noise;
215
216 s16 coverage_class;
217 u8 slottime;
218
219 u8 rdd_state;
220 int dfs_state;
221
222 u32 rx_ampdu_ts;
223 u32 ampdu_ref;
224
225 struct mib_stats mib;
226 struct mt76_channel_state state_ts;
227
228 #ifdef CONFIG_NL80211_TESTMODE
229 struct {
230 u32 *reg_backup;
231
232 s32 last_freq_offset;
233 u8 last_rcpi[4];
234 s8 last_ib_rssi[4];
235 s8 last_wb_rssi[4];
236 u8 last_snr;
237
238 u8 spe_idx;
239 } test;
240 #endif
241 };
242
243 struct mt7915_dev {
244 union { /* must be first */
245 struct mt76_dev mt76;
246 struct mt76_phy mphy;
247 };
248
249 struct mt7915_hif *hif2;
250
251 const struct mt76_bus_ops *bus_ops;
252 struct tasklet_struct irq_tasklet;
253 struct mt7915_phy phy;
254
255 u16 chainmask;
256 u32 hif_idx;
257
258 struct work_struct init_work;
259 struct work_struct rc_work;
260 struct work_struct reset_work;
261 wait_queue_head_t reset_wait;
262 u32 reset_state;
263
264 struct list_head sta_rc_list;
265 struct list_head sta_poll_list;
266 struct list_head twt_list;
267 spinlock_t sta_poll_lock;
268
269 u32 hw_pattern;
270
271 bool dbdc_support;
272 bool flash_mode;
273 bool ibf;
274 u8 fw_debug_wm;
275 u8 fw_debug_wa;
276
277 void *cal;
278
279 struct {
280 u8 table_mask;
281 u8 n_agrt;
282 } twt;
283 };
284
285 enum {
286 HW_BSSID_0 = 0x0,
287 HW_BSSID_1,
288 HW_BSSID_2,
289 HW_BSSID_3,
290 HW_BSSID_MAX = HW_BSSID_3,
291 EXT_BSSID_START = 0x10,
292 EXT_BSSID_1,
293 EXT_BSSID_15 = 0x1f,
294 EXT_BSSID_MAX = EXT_BSSID_15,
295 REPEATER_BSSID_START = 0x20,
296 REPEATER_BSSID_MAX = 0x3f,
297 };
298
299 enum {
300 MT_CTX0,
301 MT_HIF0 = 0x0,
302
303 MT_LMAC_AC00 = 0x0,
304 MT_LMAC_AC01,
305 MT_LMAC_AC02,
306 MT_LMAC_AC03,
307 MT_LMAC_ALTX0 = 0x10,
308 MT_LMAC_BMC0,
309 MT_LMAC_BCN0,
310 MT_LMAC_PSMP0,
311 };
312
313 enum {
314 MT_RX_SEL0,
315 MT_RX_SEL1,
316 };
317
318 enum mt7915_rdd_cmd {
319 RDD_STOP,
320 RDD_START,
321 RDD_DET_MODE,
322 RDD_RADAR_EMULATE,
323 RDD_START_TXQ = 20,
324 RDD_CAC_START = 50,
325 RDD_CAC_END,
326 RDD_NORMAL_START,
327 RDD_DISABLE_DFS_CAL,
328 RDD_PULSE_DBG,
329 RDD_READ_PULSE,
330 RDD_RESUME_BF,
331 RDD_IRQ_OFF,
332 };
333
334 static inline struct mt7915_phy *
mt7915_hw_phy(struct ieee80211_hw * hw)335 mt7915_hw_phy(struct ieee80211_hw *hw)
336 {
337 struct mt76_phy *phy = hw->priv;
338
339 return phy->priv;
340 }
341
342 static inline struct mt7915_dev *
mt7915_hw_dev(struct ieee80211_hw * hw)343 mt7915_hw_dev(struct ieee80211_hw *hw)
344 {
345 struct mt76_phy *phy = hw->priv;
346
347 return container_of(phy->dev, struct mt7915_dev, mt76);
348 }
349
350 static inline struct mt7915_phy *
mt7915_ext_phy(struct mt7915_dev * dev)351 mt7915_ext_phy(struct mt7915_dev *dev)
352 {
353 struct mt76_phy *phy = dev->mt76.phy2;
354
355 if (!phy)
356 return NULL;
357
358 return phy->priv;
359 }
360
mt7915_lmac_mapping(struct mt7915_dev * dev,u8 ac)361 static inline u8 mt7915_lmac_mapping(struct mt7915_dev *dev, u8 ac)
362 {
363 /* LMAC uses the reverse order of mac80211 AC indexes */
364 return 3 - ac;
365 }
366
367 extern const struct ieee80211_ops mt7915_ops;
368 extern const struct mt76_testmode_ops mt7915_testmode_ops;
369
370 u32 mt7915_reg_map(struct mt7915_dev *dev, u32 addr);
371 u64 __mt7915_get_tsf(struct ieee80211_hw *hw, struct mt7915_vif *mvif);
372 int mt7915_register_device(struct mt7915_dev *dev);
373 void mt7915_unregister_device(struct mt7915_dev *dev);
374 int mt7915_eeprom_init(struct mt7915_dev *dev);
375 void mt7915_eeprom_parse_band_config(struct mt7915_phy *phy);
376 int mt7915_eeprom_get_target_power(struct mt7915_dev *dev,
377 struct ieee80211_channel *chan,
378 u8 chain_idx);
379 s8 mt7915_eeprom_get_power_delta(struct mt7915_dev *dev, int band);
380 int mt7915_dma_init(struct mt7915_dev *dev);
381 void mt7915_dma_prefetch(struct mt7915_dev *dev);
382 void mt7915_dma_cleanup(struct mt7915_dev *dev);
383 int mt7915_mcu_init(struct mt7915_dev *dev);
384 int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev,
385 struct mt7915_vif *mvif,
386 struct mt7915_twt_flow *flow,
387 int cmd);
388 int mt7915_mcu_add_dev_info(struct mt7915_phy *phy,
389 struct ieee80211_vif *vif, bool enable);
390 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy,
391 struct ieee80211_vif *vif, int enable);
392 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif,
393 struct ieee80211_sta *sta, bool enable);
394 int mt7915_mcu_sta_update_hdr_trans(struct mt7915_dev *dev,
395 struct ieee80211_vif *vif,
396 struct ieee80211_sta *sta);
397 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev,
398 struct ieee80211_ampdu_params *params,
399 bool add);
400 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev,
401 struct ieee80211_ampdu_params *params,
402 bool add);
403 int mt7915_mcu_add_key(struct mt7915_dev *dev, struct ieee80211_vif *vif,
404 struct mt7915_sta *msta, struct ieee80211_key_conf *key,
405 enum set_key_cmd cmd);
406 int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif,
407 struct cfg80211_he_bss_color *he_bss_color);
408 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
409 int enable);
410 int mt7915_mcu_add_obss_spr(struct mt7915_dev *dev, struct ieee80211_vif *vif,
411 bool enable);
412 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif,
413 struct ieee80211_sta *sta, bool changed);
414 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif,
415 struct ieee80211_sta *sta);
416 int mt7915_set_channel(struct mt7915_phy *phy);
417 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd);
418 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif);
419 int mt7915_mcu_update_edca(struct mt7915_dev *dev, void *req);
420 int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev,
421 struct ieee80211_vif *vif,
422 struct ieee80211_sta *sta,
423 void *data, u32 field);
424 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev);
425 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset);
426 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band, bool enable,
427 bool hdr_trans);
428 int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode,
429 u8 en);
430 int mt7915_mcu_set_scs(struct mt7915_dev *dev, u8 band, bool enable);
431 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band);
432 int mt7915_mcu_set_rts_thresh(struct mt7915_phy *phy, u32 val);
433 int mt7915_mcu_set_pm(struct mt7915_dev *dev, int band, int enter);
434 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable);
435 int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy);
436 int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len);
437 int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action);
438 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val);
439 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev,
440 const struct mt7915_dfs_pulse *pulse);
441 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index,
442 const struct mt7915_dfs_pattern *pattern);
443 int mt7915_mcu_set_muru_ctrl(struct mt7915_dev *dev, u32 cmd, u32 val);
444 int mt7915_mcu_apply_group_cal(struct mt7915_dev *dev);
445 int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy);
446 int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch);
447 int mt7915_mcu_get_temperature(struct mt7915_phy *phy);
448 int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state);
449 int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif,
450 struct ieee80211_sta *sta, struct rate_info *rate);
451 int mt7915_mcu_rdd_cmd(struct mt7915_dev *dev, enum mt7915_rdd_cmd cmd,
452 u8 index, u8 rx_sel, u8 val);
453 int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3);
454 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl);
455 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level);
456 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb);
457 void mt7915_mcu_exit(struct mt7915_dev *dev);
458
is_mt7915(struct mt76_dev * dev)459 static inline bool is_mt7915(struct mt76_dev *dev)
460 {
461 return mt76_chip(dev) == 0x7915;
462 }
463
464 void mt7915_dual_hif_set_irq_mask(struct mt7915_dev *dev, bool write_reg,
465 u32 clear, u32 set);
466
mt7915_irq_enable(struct mt7915_dev * dev,u32 mask)467 static inline void mt7915_irq_enable(struct mt7915_dev *dev, u32 mask)
468 {
469 if (dev->hif2)
470 mt7915_dual_hif_set_irq_mask(dev, false, 0, mask);
471 else
472 mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
473
474 tasklet_schedule(&dev->irq_tasklet);
475 }
476
mt7915_irq_disable(struct mt7915_dev * dev,u32 mask)477 static inline void mt7915_irq_disable(struct mt7915_dev *dev, u32 mask)
478 {
479 if (dev->hif2)
480 mt7915_dual_hif_set_irq_mask(dev, true, mask, 0);
481 else
482 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0);
483 }
484
485 u32 mt7915_mac_wtbl_lmac_addr(struct mt7915_dev *dev, u16 wcid, u8 dw);
486 bool mt7915_mac_wtbl_update(struct mt7915_dev *dev, int idx, u32 mask);
487 void mt7915_mac_reset_counters(struct mt7915_phy *phy);
488 void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy);
489 void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool ext_phy);
490 void mt7915_mac_write_txwi(struct mt7915_dev *dev, __le32 *txwi,
491 struct sk_buff *skb, struct mt76_wcid *wcid, int pid,
492 struct ieee80211_key_conf *key, bool beacon);
493 void mt7915_mac_set_timing(struct mt7915_phy *phy);
494 int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
495 struct ieee80211_sta *sta);
496 void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
497 struct ieee80211_sta *sta);
498 void mt7915_mac_work(struct work_struct *work);
499 void mt7915_mac_reset_work(struct work_struct *work);
500 void mt7915_mac_sta_rc_work(struct work_struct *work);
501 void mt7915_mac_update_stats(struct mt7915_phy *phy);
502 int mt7915_mmio_init(struct mt76_dev *mdev, void __iomem *mem_base, int irq);
503 void mt7915_mac_twt_teardown_flow(struct mt7915_dev *dev,
504 struct mt7915_sta *msta,
505 u8 flowid);
506 void mt7915_mac_add_twt_setup(struct ieee80211_hw *hw,
507 struct ieee80211_sta *sta,
508 struct ieee80211_twt_setup *twt);
509 int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
510 enum mt76_txq_id qid, struct mt76_wcid *wcid,
511 struct ieee80211_sta *sta,
512 struct mt76_tx_info *tx_info);
513 void mt7915_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e);
514 void mt7915_tx_token_put(struct mt7915_dev *dev);
515 int mt7915_init_tx_queues(struct mt7915_phy *phy, int idx, int n_desc);
516 void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
517 struct sk_buff *skb);
518 void mt7915_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps);
519 void mt7915_stats_work(struct work_struct *work);
520 int mt76_dfs_start_rdd(struct mt7915_dev *dev, bool force);
521 int mt7915_dfs_init_radar_detector(struct mt7915_phy *phy);
522 void mt7915_set_stream_he_caps(struct mt7915_phy *phy);
523 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy);
524 void mt7915_update_channel(struct mt76_phy *mphy);
525 int mt7915_init_debugfs(struct mt7915_phy *phy);
526 #ifdef CONFIG_MAC80211_DEBUGFS
527 void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
528 struct ieee80211_sta *sta, struct dentry *dir);
529 #endif
530
531 #endif
532