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Searched refs:AR_SM_BASE (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/net/wireless/ath/ath9k/
A Dar9003_phy.h451 #define AR_SM_BASE 0xa200 macro
557 #define AR_PHY_TPC_1 (AR_SM_BASE + 0x1f8)
563 #define AR_PHY_TPC_4_B0 (AR_SM_BASE + 0x204)
564 #define AR_PHY_TPC_5_B0 (AR_SM_BASE + 0x208)
565 #define AR_PHY_TPC_6_B0 (AR_SM_BASE + 0x20c)
573 #define AR_PHY_TPC_12 (AR_SM_BASE + 0x224)
577 #define AR_PHY_TPC_18 (AR_SM_BASE + 0x23c)
583 #define AR_PHY_TPC_19 (AR_SM_BASE + 0x240)
625 #define AR_PHY_RTT_CTRL (AR_SM_BASE + 0x380)
986 AR_SM1_BASE : AR_SM_BASE))
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A Dreg_aic.h20 #define AR_SM_BASE 0xa200 macro
24 #define AR_PHY_AIC_CTRL_0_B0 (AR_SM_BASE + 0x4b0)
25 #define AR_PHY_AIC_CTRL_1_B0 (AR_SM_BASE + 0x4b4)
26 #define AR_PHY_AIC_CTRL_2_B0 (AR_SM_BASE + 0x4b8)
27 #define AR_PHY_AIC_CTRL_3_B0 (AR_SM_BASE + 0x4bc)
28 #define AR_PHY_AIC_CTRL_4_B0 (AR_SM_BASE + 0x4c0)
30 #define AR_PHY_AIC_STAT_0_B0 (AR_SM_BASE + 0x4c4)
31 #define AR_PHY_AIC_STAT_1_B0 (AR_SM_BASE + 0x4c8)
32 #define AR_PHY_AIC_STAT_2_B0 (AR_SM_BASE + 0x4cc)
42 #define AR_PHY_AIC_SRAM_ADDR_B0 (AR_SM_BASE + 0x5f0)
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