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/linux/drivers/gpu/drm/bridge/
A Dsil-sii8620.h46 #define BIT_DPD_PWRON_PLL BIT(7)
47 #define BIT_DPD_PDNTX12 BIT(6)
48 #define BIT_DPD_PDNRX12 BIT(5)
49 #define BIT_DPD_OSC_EN BIT(4)
50 #define BIT_DPD_PWRON_HSIC BIT(3)
51 #define BIT_DPD_PDIDCK_N BIT(2)
60 #define BIT_DCTL_TRANSCODE BIT(3)
149 #define BIT_DDC_CMD_DONE BIT(3)
219 #define BIT_BIST_TRANS BIT(2)
220 #define BIT_BIST_RESET BIT(1)
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/linux/drivers/net/ethernet/freescale/dpaa2/
A Ddpkg.h64 #define NH_FLD_ETH_DA BIT(0)
65 #define NH_FLD_ETH_SA BIT(1)
67 #define NH_FLD_ETH_TYPE BIT(3)
73 #define NH_FLD_VLAN_VPRI BIT(0)
85 #define NH_FLD_IP_VER BIT(0)
86 #define NH_FLD_IP_DSCP BIT(2)
87 #define NH_FLD_IP_ECN BIT(3)
89 #define NH_FLD_IP_SRC BIT(5)
90 #define NH_FLD_IP_DST BIT(6)
92 #define NH_FLD_IP_ID BIT(8)
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/linux/drivers/net/wireless/realtek/rtl8xxxu/
A Drtl8xxxu_regs.h121 #define EFUSE_CELL_SEL (BIT(8) | BIT(9))
281 #define HPON_FSM_BONDING_MASK (BIT(22) | BIT(23))
296 #define SYS_CFG_CHIP_VER (BIT(12) | BIT(13) | BIT(14) | BIT(15))
299 #define SYS_CFG_VENDOR_EXT_MASK (BIT(18) | BIT(19))
318 #define GPIO_EFS_HCI_SEL (BIT(0) | BIT(1))
319 #define GPIO_PAD_HCI_SEL (BIT(2) | BIT(3))
320 #define GPIO_HCI_SEL (BIT(4) | BIT(5))
337 #define GPIO_RF_RL_ID (BIT(31) | BIT(30) | BIT(29) | BIT(28))
762 #define WMAC_TRXPTCL_CTL_BW_MASK (BIT(7) | BIT(8))
947 #define CCK0_AFE_RX_ANT_B (BIT(24) | BIT(26))
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/linux/drivers/staging/r8188eu/include/
A Drtl8188e_spec.h788 #define EF_CELL_SEL (BIT(8)|BIT(9))
825 #define CHIP_VER (BIT(12)|BIT(13)|BIT(14)|BIT(15))
839 #define EFS_HCI_SEL (BIT(0)|BIT(1))
840 #define PAD_HCI_SEL (BIT(2)|BIT(3))
841 #define HCI_SEL (BIT(4)|BIT(5))
858 #define RF_RL_ID (BIT(31)|BIT(30)|BIT(29)|BIT(28))
1032 #define ACRC BIT(8)
1037 #define AAP BIT(0)
1038 #define APM BIT(1)
1039 #define AM BIT(2)
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/linux/drivers/staging/emxx_udc/
A Demxx_udc.h48 #define TEST_FORCE_ENABLE (BIT(18) | BIT(16))
76 #define UFRAME (BIT(14) | BIT(13) | BIT(12))
82 #define SQUSET (BIT(7) | BIT(6) | BIT(5) | BIT(4))
84 #define USB_SQUSET (BIT(6) | BIT(5) | BIT(4))
156 #define EP0_DW (BIT(6) | BIT(5))
158 #define EP0_DW3 (BIT(6) | BIT(5))
189 #define EP0_STATUS_RW_BIT (BIT(16) | BIT(15) | BIT(11) | 0xFF)
221 #define EPN_MODE (BIT(25) | BIT(24))
234 #define EPN_DW (BIT(6) | BIT(5))
236 #define EPN_DW3 (BIT(6) | BIT(5))
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/linux/drivers/staging/sm750fb/
A Dddk750_reg.h7 #define DE_STATE1_DE_ABORT BIT(0)
10 #define DE_STATE2_DE_FIFO_EMPTY BIT(3)
11 #define DE_STATE2_DE_STATUS_BUSY BIT(2)
12 #define DE_STATE2_DE_MEM_FIFO_EMPTY BIT(1)
20 #define SYSTEM_CTRL_PCI_BURST BIT(29)
21 #define SYSTEM_CTRL_PCI_MASTER BIT(25)
22 #define SYSTEM_CTRL_LATENCY_TIMER_OFF BIT(24)
23 #define SYSTEM_CTRL_DE_FIFO_EMPTY BIT(23)
24 #define SYSTEM_CTRL_DE_STATUS_BUSY BIT(22)
25 #define SYSTEM_CTRL_DE_MEM_FIFO_EMPTY BIT(21)
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/linux/arch/mips/include/asm/mach-ath79/
A Dar71xx_regs.h555 #define MISC_INT_ETHSW BIT(12)
557 #define MISC_INT_TIMER3 BIT(9)
558 #define MISC_INT_TIMER2 BIT(8)
559 #define MISC_INT_DMA BIT(7)
560 #define MISC_INT_OHCI BIT(6)
561 #define MISC_INT_PERFC BIT(5)
562 #define MISC_INT_WDOG BIT(4)
563 #define MISC_INT_UART BIT(3)
564 #define MISC_INT_GPIO BIT(2)
565 #define MISC_INT_ERROR BIT(1)
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/linux/drivers/gpu/drm/mcde/
A Dmcde_dsi_regs.h8 #define DSI_MCTL_MAIN_DATA_CTL_LINK_EN BIT(0)
9 #define DSI_MCTL_MAIN_DATA_CTL_IF1_MODE BIT(1)
10 #define DSI_MCTL_MAIN_DATA_CTL_VID_EN BIT(2)
11 #define DSI_MCTL_MAIN_DATA_CTL_TVG_SEL BIT(3)
66 #define DSI_MCTL_MAIN_EN_DAT1_EN BIT(4)
67 #define DSI_MCTL_MAIN_EN_DAT2_EN BIT(5)
71 #define DSI_MCTL_MAIN_EN_IF1_EN BIT(9)
72 #define DSI_MCTL_MAIN_EN_IF2_EN BIT(10)
182 #define DSI_VID_MAIN_CTL_VID_PIXEL_MODE_24BITS (BIT(12) | BIT(13))
189 #define DSI_VID_MAIN_CTL_REG_BLKLINE_MODE_LP_1 (BIT(17) | BIT(18))
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/linux/include/linux/soc/mediatek/
A Dinfracfg.h24 #define MT8192_TOP_AXI_PROT_EN_DISP (BIT(6) | BIT(23))
25 #define MT8192_TOP_AXI_PROT_EN_CONN (BIT(13) | BIT(18))
36 #define MT8192_TOP_AXI_PROT_EN_MM_CAM (BIT(0) | BIT(2))
38 BIT(10) | BIT(12) | \
39 BIT(14) | BIT(16) | \
40 BIT(24) | BIT(26))
43 BIT(15) | BIT(17) | \
44 BIT(25) | BIT(27))
76 #define MT8183_TOP_AXI_PROT_EN_MFG (BIT(21) | BIT(22))
84 BIT(9) | BIT(13))
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/linux/drivers/usb/dwc2/
A Dhw.h56 #define GOTGCTL_HNPREQ BIT(9)
64 #define GOTGCTL_SESREQ BIT(1)
173 #define GINTSTS_SOF BIT(3)
221 #define GI2CCTL_RW BIT(30)
226 #define GI2CCTL_ACK BIT(24)
748 #define HPRT0_PWR BIT(12)
751 #define HPRT0_RST BIT(8)
752 #define HPRT0_SUSP BIT(7)
753 #define HPRT0_RES BIT(6)
757 #define HPRT0_ENA BIT(2)
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/linux/drivers/net/dsa/microchip/
A Dksz9477_reg.h44 #define PME_ENABLE BIT(1)
45 #define PME_POLARITY BIT(0)
51 #define SW_AVB_ABLE BIT(4)
69 #define SW_QW_ABLE BIT(5)
75 #define LUE_INT BIT(31)
76 #define TRIG_TS_INT BIT(30)
168 #define SW_RESET BIT(1)
169 #define SW_START BIT(0)
605 #define GPIO_IN BIT(7)
606 #define GPIO_OUT BIT(6)
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/linux/drivers/comedi/drivers/
A Dni_stc.h26 #define NISTC_INTA_ACK_G0_TC BIT(14)
27 #define NISTC_INTA_ACK_AI_ERR BIT(13)
144 #define NISTC_DIO_SDIN BIT(4)
145 #define NISTC_DIO_SDOUT BIT(0)
256 #define NISTC_RTSI_TRIG_DIR(_c, _m) ((_m) ? BIT(8 + (_c)) : BIT(7 + (_c)))
360 #define NISTC_RESET_G1 BIT(3)
361 #define NISTC_RESET_G0 BIT(2)
362 #define NISTC_RESET_AO BIT(1)
363 #define NISTC_RESET_AI BIT(0)
671 #define CS5529_CMD_CB BIT(7)
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/linux/drivers/net/wireless/realtek/rtw89/
A Dreg.h9 #define B_AX_AUTOLOAD_SUS BIT(5)
13 #define B_AX_FEN_BBRSTB BIT(0)
19 #define B_AX_CPU_CLK_EN BIT(14)
22 #define B_AX_R_DIS_PRST BIT(6)
27 #define B_AX_EF_RDT BIT(27)
31 #define B_AX_EF_POR BIT(10)
39 #define B_AX_EF_RDY BIT(29)
49 #define B_AX_ENHTP BIT(14)
51 #define B_AX_ENSIC BIT(12)
59 #define B_AX_ENBT BIT(5)
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/linux/include/linux/mfd/abx500/
A Dab8500-sysctrl.h83 #define AB8500_TURNONSTATUS_PORNVBAT BIT(0)
86 #define AB8500_TURNONSTATUS_RTCALARM BIT(3)
87 #define AB8500_TURNONSTATUS_MAINCHDET BIT(4)
88 #define AB8500_TURNONSTATUS_VBUSDET BIT(5)
106 #define AB8500_STW4500CTRL1_SWOFF BIT(0)
122 #define AB8500_STW4500CTRL3_THSDENA BIT(3)
131 #define AB8500_LOWBAT_LOWBATENA BIT(0)
184 #define AB8500_SYSCLKCTRL_USBCLKENA BIT(2)
237 #define AB8500_SWATCTRL_UPDATERF BIT(0)
238 #define AB8500_SWATCTRL_SWATENABLE BIT(1)
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/linux/drivers/net/ethernet/asix/
A Dax88796c_main.h121 #define AX_FC_RX BIT(0)
122 #define AX_FC_TX BIT(1)
159 #define FER_DCRC BIT(1)
160 #define FER_RH3M BIT(2)
171 #define ISR_MDQ BIT(4)
172 #define ISR_TXT BIT(5)
175 #define ISR_LINK BIT(9)
178 #define IMR_MDQ BIT(4)
179 #define IMR_TXT BIT(5)
182 #define IMR_LINK BIT(9)
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/linux/drivers/scsi/
A Dnsp32.h239 # define SD0 BIT(0)
240 # define SD1 BIT(1)
241 # define SD2 BIT(2)
242 # define SD3 BIT(3)
243 # define SD4 BIT(4)
244 # define SD5 BIT(5)
245 # define SD6 BIT(6)
246 # define SD7 BIT(7)
282 # define MSGOUT_COUNT_MASK (BIT(0)|BIT(1))
392 # define SCL BIT(0)
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/linux/sound/soc/fsl/
A Dfsl_xcvr.h71 #define FSL_XCVR_EXT_CTRL_CMDC_RESET(t) (t ? BIT(29) : BIT(30))
75 #define FSL_XCVR_EXT_CTRL_DPTH_RESET(t) (t ? BIT(27) : BIT(28))
80 #define FSL_XCVR_EXT_CTRL_DMA_DIS(t) (t ? BIT(24) : BIT(25))
112 #define FSL_XCVR_IRQ_NEW_CS BIT(0)
113 #define FSL_XCVR_IRQ_NEW_UD BIT(1)
114 #define FSL_XCVR_IRQ_MUTE BIT(2)
116 #define FSL_XCVR_IRQ_ECC_ERR BIT(4)
120 #define FSL_XCVR_IRQ_HOST_OHPD BIT(8)
125 #define FSL_XCVR_IRQ_TEMP_UPD BIT(13)
143 #define FSL_XCVR_ISR_HPD_TGL BIT(15)
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/linux/drivers/usb/typec/tcpm/
A Dfusb302_reg.h30 #define FUSB_REG_MEASURE_MDAC5 BIT(7)
31 #define FUSB_REG_MEASURE_MDAC4 BIT(6)
32 #define FUSB_REG_MEASURE_MDAC3 BIT(5)
33 #define FUSB_REG_MEASURE_MDAC2 BIT(4)
34 #define FUSB_REG_MEASURE_MDAC1 BIT(3)
35 #define FUSB_REG_MEASURE_MDAC0 BIT(2)
36 #define FUSB_REG_MEASURE_VBUS BIT(1)
73 #define FUSB_REG_MASK_VBUSOK BIT(7)
77 #define FUSB_REG_MASK_ALERT BIT(3)
78 #define FUSB_REG_MASK_WAKE BIT(2)
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/linux/drivers/net/ieee802154/
A Dmcr20a.h261 #define DAR_IRQSTS1_CCAIRQ BIT(3)
262 #define DAR_IRQSTS1_RXIRQ BIT(2)
263 #define DAR_IRQSTS1_TXIRQ BIT(1)
264 #define DAR_IRQSTS1_SEQIRQ BIT(0)
268 #define DAR_IRQSTS2_CCA BIT(6)
269 #define DAR_IRQSTS2_SRCADDR BIT(5)
270 #define DAR_IRQSTS2_PI BIT(4)
272 #define DAR_IRQSTS2_ASM_IRQ BIT(2)
340 #define DAR_ASM_CTRL1_CTR BIT(4)
341 #define DAR_ASM_CTRL1_CBC BIT(3)
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/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
A Dreg.h68 #define MAC0_ON BIT(7)
69 #define MAC1_ON BIT(0)
70 #define MAC0_READY BIT(0)
71 #define MAC1_READY BIT(0)
417 #define RATE_1M BIT(0)
418 #define RATE_2M BIT(1)
754 #define ENPDN BIT(4)
779 #define ANA8M BIT(1)
811 #define RF_EN BIT(0)
961 #define ACRC BIT(8)
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/linux/include/linux/mfd/
A Dlp873x.h98 #define LP873X_LDO0_CTRL_LDO0_EN BIT(0)
102 #define LP873X_LDO1_CTRL_LDO1_EN BIT(0)
126 #define LP873X_GPO_CTRL_GPO2_OD BIT(6)
128 #define LP873X_GPO_CTRL_GPO2_EN BIT(4)
129 #define LP873X_GPO_CTRL_GPO_OD BIT(2)
131 #define LP873X_GPO_CTRL_GPO_EN BIT(0)
136 #define LP873X_CONFIG_CLKIN_PD BIT(3)
137 #define LP873X_CONFIG_EN_PD BIT(2)
139 #define LP873X_EN_SPREAD_SPEC BIT(0)
141 #define LP873X_PLL_CTRL_EN_PLL BIT(6)
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A Drohm-bd71815.h263 #define LDO1_EN BIT(0)
264 #define LDO2_EN BIT(1)
265 #define LDO3_EN BIT(2)
266 #define DVREF_EN BIT(3)
315 #define OUT32K_EN BIT(0)
321 #define BAT_DET BIT(5)
324 #define VBAT_OV BIT(3)
325 #define DBAT_DET BIT(0)
328 #define VBUS_DET BIT(0)
334 #define A0_ONESEC BIT(7)
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/linux/drivers/net/wireless/realtek/rtw88/
A Dreg.h22 #define BIT_ANA8M BIT(1)
29 #define BITS_RFC_DIRECT (BIT(31) | BIT(30))
34 #define BIT_RF_EN BIT(0)
37 #define BIT_MAC_CLK_SEL (BIT(20) | BIT(21))
53 #define BIT_MASK_EFUSE_BANK_SEL (BIT(8) | BIT(9))
121 #define BIT_CHECK_SUM_OK (BIT(4) | BIT(6))
162 #define BIT_WLRF1_BBRF_EN (BIT(24) | BIT(25) | BIT(26))
344 #define BIT_BTCCA_CTRL (BIT(0) | BIT(1))
390 #define BIT_DIS_SECOND_CCA (BIT(0) | BIT(1))
394 #define BIT_TSFT_SEL_TIMER0 (BIT(4) | BIT(5) | BIT(6))
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/linux/drivers/media/i2c/
A Dtda1997x_regs.h164 #define RT_MAN_CTRL_RT BIT(6)
276 #define CLK_CFG_SEL_ACLK BIT(0)
342 #define MAN_DIS_OUT_BUF BIT(7)
343 #define MAN_DIS_ANA_PATH BIT(6)
344 #define MAN_DIS_HDCP BIT(5)
345 #define MAN_DIS_TMDS_ENC BIT(4)
346 #define MAN_DIS_TMDS_FLOW BIT(3)
347 #define MAN_RST_HDCP BIT(2)
348 #define MAN_RST_TMDS_ENC BIT(1)
380 #define EDID_ENABLE_B_EN BIT(1)
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/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
A Dreg.h378 #define LBK_MAC_LB (BIT(0) | BIT(1) | BIT(3))
379 #define LBK_MAC_DLB (BIT(0) | BIT(1))
380 #define LBK_DMA_LB (BIT(0) | BIT(1) | BIT(2))
392 #define FWALLRDY (BIT(0) | BIT(1) | BIT(2) | \
393 BIT(3) | BIT(4) | BIT(5) | \
394 BIT(6) | BIT(7))
397 #define IMEM BIT(5)
468 #define BTMODE (BIT(2) | BIT(1))
469 #define ENBT BIT(0)
472 #define BCNUM (BIT(6) | BIT(5) | BIT(4))
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