Searched refs:CLK_TOP_DXCC_SEL (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
A D	mt6765-clk.h	152 #define CLK_TOP_DXCC_SEL 117 macro
A D	mt8192-clk.h	54 #define CLK_TOP_DXCC_SEL 42 macro
/linux/drivers/clk/mediatek/
A D	clk-mt6765.c	435 MUX_GATE_CLR_SET_UPD(CLK_TOP_DXCC_SEL, "dxcc_sel", dxcc_parents,
A D	clk-mt8192.c	805 MUX_GATE_CLR_SET_UPD(CLK_TOP_DXCC_SEL, "dxcc_sel",

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