Searched refs:CLK_TOP_MFG_PLL_SEL (Results 1 – 2 of 2) sorted by relevance
| /linux/include/dt-bindings/clock/ | ||
| A D | mt8192-clk.h | 26 #define CLK_TOP_MFG_PLL_SEL 14 macro |
| /linux/drivers/clk/mediatek/ | ||
| A D | clk-mt8192.c | 742 MUX_CLR_SET_UPD(CLK_TOP_MFG_PLL_SEL, "mfg_pll_sel", |
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