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Searched refs:CLK_TOP_SENINF1 (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
A Dmt6779-clk.h149 #define CLK_TOP_SENINF1 139 macro
A Dmt8195-clk.h66 #define CLK_TOP_SENINF1 54 macro
/linux/drivers/clk/mediatek/
A Dclk-mt8195-topckgen.c986 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "top_seninf1",
A Dclk-mt6779.c735 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "seninf1_sel",

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