Searched refs:DP_TRAINING_LANE0_SET (Results 1 – 12 of 12) sorted by relevance
| /linux/drivers/gpu/drm/bridge/analogix/ |
| A D | analogix_dp_core.c | 319 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, buf, in analogix_dp_link_start()
530 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, in analogix_dp_process_clock_recovery()
604 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, in analogix_dp_process_equalizer_training()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | atombios_dp.c | 510 drm_dp_dpcd_write(dp_info->aux, DP_TRAINING_LANE0_SET, in amdgpu_atombios_dp_update_vs_emph()
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| /linux/drivers/gpu/drm/tegra/ |
| A D | dp.c | 489 err = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_SET, values, lanes); in drm_dp_link_apply_training()
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| /linux/drivers/gpu/drm/radeon/ |
| A D | atombios_dp.c | 561 drm_dp_dpcd_write(dp_info->aux, DP_TRAINING_LANE0_SET, in radeon_dp_update_vs_emph()
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| /linux/drivers/gpu/drm/i915/display/ |
| A D | intel_dp_link_training.c | 573 DP_TRAINING_LANE0_SET : in intel_dp_update_link_train()
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| A D | intel_dp.c | 3458 drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET, in intel_dp_process_phy_request()
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| /linux/include/drm/ |
| A D | drm_dp_helper.h | 583 #define DP_TRAINING_LANE0_SET 0x103 macro
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| /linux/drivers/gpu/drm/xlnx/ |
| A D | zynqmp_dp.c | 654 ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, dp->train_set, in zynqmp_dp_update_vs_emph()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_link_dp.c | 565 &dpcd_lt_buffer[DP_TRAINING_LANE0_SET - DP_TRAINING_PATTERN_SET], in dpcd_set_lt_pattern_and_lane_settings()
622 DP_TRAINING_LANE0_SET, in dpcd_set_lt_pattern_and_lane_settings()
953 lane0_set_address = DP_TRAINING_LANE0_SET; in dpcd_set_lane_settings()
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| /linux/drivers/gpu/drm/bridge/ |
| A D | tc358767.c | 1012 ret = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_SET, tmp, 2); in tc_main_link_enable()
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| /linux/drivers/gpu/drm/gma500/ |
| A D | cdv_intel_dp.c | 1390 DP_TRAINING_LANE0_SET, in cdv_intel_dplink_set_level()
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| /linux/drivers/gpu/drm/msm/dp/ |
| A D | dp_ctrl.c | 1036 ret = drm_dp_dpcd_write(ctrl->aux, DP_TRAINING_LANE0_SET, in dp_ctrl_update_vx_px()
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