Home
last modified time | relevance | path

Searched refs:EMC_CFG_2 (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/memory/tegra/
A Dtegra20-emc.c85 #define EMC_CFG_2 0x2b8 macro
605 emc_cfg = readl_relaxed(emc->regs + EMC_CFG_2); in emc_setup_hw()
620 writel_relaxed(emc_cfg, emc->regs + EMC_CFG_2); in emc_setup_hw()
A Dtegra124-emc.c137 #define EMC_CFG_2 0x2b8 macro
748 emc_ccfifo_writel(emc, val, EMC_CFG_2); in tegra_emc_prepare_timing_change()
812 emc_ccfifo_writel(emc, timing->emc_cfg_2, EMC_CFG_2); in tegra_emc_prepare_timing_change()
A Dtegra30-emc.c93 #define EMC_CFG_2 0x2b8 macro
1047 emc_cfg = readl_relaxed(emc->regs + EMC_CFG_2); in emc_setup_hw()
1065 writel_relaxed(emc_cfg, emc->regs + EMC_CFG_2); in emc_setup_hw()
A Dtegra210-emc.h140 #define EMC_CFG_2 0x2b8 macro
A Dtegra210-emc-cc-r21021.c866 emc_writel(emc, next->emc_cfg_2, EMC_CFG_2); in tegra210_emc_r21021_set_clock()
/linux/Documentation/devicetree/bindings/memory-controllers/
A Dnvidia,tegra124-emc.yaml108 value of the EMC_CFG_2 register for this set of timings

Completed in 28 milliseconds