| /linux/drivers/gpu/drm/omapdrm/dss/ |
| A D | dsi.c | 1971 dt = FLD_GET(val, 5, 0); in dsi_vc_flush_receive_data()
1977 FLD_GET(val, 23, 8)); in dsi_vc_flush_receive_data()
1980 FLD_GET(val, 23, 8)); in dsi_vc_flush_receive_data()
1983 FLD_GET(val, 23, 8)); in dsi_vc_flush_receive_data()
2242 dt = FLD_GET(val, 5, 0); in dsi_vc_read_rx_fifo()
2657 hbp = FLD_GET(r, 11, 0); in dsi_config_cmd_mode_interleaving()
2658 hfp = FLD_GET(r, 23, 12); in dsi_config_cmd_mode_interleaving()
2659 hsa = FLD_GET(r, 31, 24); in dsi_config_cmd_mode_interleaving()
2674 ths_exit = FLD_GET(r, 7, 0); in dsi_config_cmd_mode_interleaving()
2834 ths_exit = FLD_GET(r, 7, 0); in dsi_proto_timings()
[all …]
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| A D | hdmi4_cec.c | 143 if (FLD_GET(temp, 7, 7) == 0) in hdmi_cec_clear_tx_fifo()
160 if (FLD_GET(temp, 1, 0) == 0) in hdmi_cec_clear_rx_fifo()
234 if (FLD_GET(temp, 4, 4) != 0) { in hdmi_cec_adap_enable()
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| A D | pll.c | 338 if (FLD_GET(readl_relaxed(reg), bitnum, bitnum) == value) in wait_for_bit_change()
345 if (FLD_GET(readl_relaxed(reg), bitnum, bitnum) == value) in wait_for_bit_change()
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| A D | hdmi.h | 281 FLD_GET(hdmi_read_reg(base, idx), start, end)
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| A D | dss.c | 55 FLD_GET(dss_read_reg(dss, idx), start, end)
1415 pr_info("OMAP DSS rev %d.%d\n", FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0)); in dss_probe_hardware()
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| A D | dispc.c | 51 FLD_GET(dispc_read_reg(dispc, idx), start, end)
1232 if (FLD_GET(val, shift, shift) == 1) in dispc_ovl_get_channel_out()
1238 switch (FLD_GET(val, 31, 30)) { in dispc_ovl_get_channel_out()
3280 *lck_div = FLD_GET(l, 23, 16); in dispc_mgr_get_lcd_divisor()
3281 *pck_div = FLD_GET(l, 7, 0); in dispc_mgr_get_lcd_divisor()
3347 pcd = FLD_GET(l, 7, 0); in dispc_mgr_pclk_rate()
3435 lcd = FLD_GET(l, 23, 16); in dispc_dump_clocks()
4797 FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0)); in dispc_bind()
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| A D | dss.h | 66 #define FLD_GET(val, start, end) (((val) & FLD_MASK(start, end)) >> (end)) macro
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| /linux/drivers/video/fbdev/omap2/omapfb/dss/ |
| A D | dsi.c | 2563 dt = FLD_GET(val, 5, 0); in dsi_vc_flush_receive_data()
2569 FLD_GET(val, 23, 8)); in dsi_vc_flush_receive_data()
2572 FLD_GET(val, 23, 8)); in dsi_vc_flush_receive_data()
2575 FLD_GET(val, 23, 8)); in dsi_vc_flush_receive_data()
2948 dt = FLD_GET(val, 5, 0); in dsi_vc_read_rx_fifo()
3463 hbp = FLD_GET(r, 11, 0); in dsi_config_cmd_mode_interleaving()
3464 hfp = FLD_GET(r, 23, 12); in dsi_config_cmd_mode_interleaving()
3465 hsa = FLD_GET(r, 31, 24); in dsi_config_cmd_mode_interleaving()
3480 ths_exit = FLD_GET(r, 7, 0); in dsi_config_cmd_mode_interleaving()
3642 ths_exit = FLD_GET(r, 7, 0); in dsi_proto_timings()
[all …]
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| A D | pll.c | 196 if (FLD_GET(readl_relaxed(reg), bitnum, bitnum) == value) in wait_for_bit_change()
203 if (FLD_GET(readl_relaxed(reg), bitnum, bitnum) == value) in wait_for_bit_change()
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| A D | dss.c | 56 FLD_GET(dss_read_reg(idx), start, end)
1138 FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0)); in dss_bind()
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| A D | dispc.c | 49 FLD_GET(dispc_read_reg(idx), start, end)
986 if (FLD_GET(val, shift, shift) == 1) in dispc_ovl_get_channel_out()
992 switch (FLD_GET(val, 31, 30)) { in dispc_ovl_get_channel_out()
3195 *lck_div = FLD_GET(l, 23, 16); in dispc_mgr_get_lcd_divisor()
3196 *pck_div = FLD_GET(l, 7, 0); in dispc_mgr_get_lcd_divisor()
3240 lcd = FLD_GET(l, 23, 16); in dispc_mgr_lclk_rate()
3281 pcd = FLD_GET(l, 7, 0); in dispc_mgr_pclk_rate()
3366 lcd = FLD_GET(l, 23, 16); in dispc_dump_clocks()
3989 FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0)); in dispc_bind()
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| A D | hdmi.h | 262 FLD_GET(hdmi_read_reg(base, idx), start, end)
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| A D | dss.h | 61 #define FLD_GET(val, start, end) (((val) & FLD_MASK(start, end)) >> (end)) macro
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| /linux/drivers/gpu/drm/tidss/ |
| A D | tidss_dispc.c | 380 static u32 FLD_GET(u32 val, u32 start, u32 end) in FLD_GET() function
392 return FLD_GET(dispc_read(dispc, idx), start, end); in REG_GET()
405 return FLD_GET(dispc_vid_read(dispc, hw_plane, idx), start, end); in VID_REG_GET()
419 return FLD_GET(dispc_vp_read(dispc, vp, idx), start, end); in VP_REG_GET()
433 return FLD_GET(dispc_ovr_read(dispc, ovr, idx), start, end); in OVR_REG_GET()
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