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Searched refs:FLD_MOD (Results 1 – 24 of 24) sorted by relevance

/linux/drivers/video/fbdev/omap2/omapfb/dss/
A Dpll.c248 l = FLD_MOD(l, 1, 0, 0); /* PLL_STOPMODE */ in dss_pll_write_config_type_a()
276 l = FLD_MOD(l, f, 4, 1); /* PLL_FREQSEL */ in dss_pll_write_config_type_a()
282 l = FLD_MOD(l, 1, 13, 13); /* PLL_REFEN */ in dss_pll_write_config_type_a()
283 l = FLD_MOD(l, 0, 14, 14); /* PHY_CLKINEN */ in dss_pll_write_config_type_a()
284 l = FLD_MOD(l, 0, 16, 16); /* M4_CLOCK_EN */ in dss_pll_write_config_type_a()
285 l = FLD_MOD(l, 0, 18, 18); /* M5_CLOCK_EN */ in dss_pll_write_config_type_a()
286 l = FLD_MOD(l, 1, 20, 20); /* HSDIVBYPASS */ in dss_pll_write_config_type_a()
289 l = FLD_MOD(l, 0, 23, 23); /* M6_CLOCK_EN */ in dss_pll_write_config_type_a()
344 l = FLD_MOD(l, 0x1, 13, 13); /* PLL_REFEN */ in dss_pll_write_config_type_b()
351 l = FLD_MOD(l, 0x4, 3, 1); in dss_pll_write_config_type_b()
[all …]
A Dhdmi_wp.c155 r = FLD_MOD(r, vsync_pol, 7, 7); in hdmi_wp_video_config_interface()
156 r = FLD_MOD(r, hsync_pol, 6, 6); in hdmi_wp_video_config_interface()
157 r = FLD_MOD(r, timings->interlace, 3, 3); in hdmi_wp_video_config_interface()
218 r = FLD_MOD(r, aud_fmt->type, 4, 4); in hdmi_wp_audio_config_format()
219 r = FLD_MOD(r, aud_fmt->justification, 3, 3); in hdmi_wp_audio_config_format()
220 r = FLD_MOD(r, aud_fmt->sample_order, 2, 2); in hdmi_wp_audio_config_format()
222 r = FLD_MOD(r, aud_fmt->sample_size, 0, 0); in hdmi_wp_audio_config_format()
234 r = FLD_MOD(r, aud_dma->transfer_size, 15, 8); in hdmi_wp_audio_config_dma()
235 r = FLD_MOD(r, aud_dma->block_size, 7, 0); in hdmi_wp_audio_config_dma()
239 r = FLD_MOD(r, aud_dma->mode, 9, 9); in hdmi_wp_audio_config_dma()
[all …]
A Dhdmi4_core.c243 r = FLD_MOD(r, 1, 5, 5); in hdmi_core_video_config()
246 r = FLD_MOD(r, 0, 5, 5); in hdmi_core_video_config()
252 r = FLD_MOD(r, cfg->deep_color_pkt, 6, 6); in hdmi_core_video_config()
253 r = FLD_MOD(r, cfg->pkt_mode, 5, 3); in hdmi_core_video_config()
254 r = FLD_MOD(r, cfg->hdmi_dvi, 0, 0); in hdmi_core_video_config()
557 r = FLD_MOD(r, 0, 2, 2); in hdmi_core_audio_config()
559 r = FLD_MOD(r, cfg->en_acr_pkt, 1, 1); in hdmi_core_audio_config()
560 r = FLD_MOD(r, cfg->cts_mode, 0, 0); in hdmi_core_audio_config()
592 r = FLD_MOD(r, cfg->i2s_cfg.vbit, 4, 4); in hdmi_core_audio_config()
605 r = FLD_MOD(r, cfg->en_dsd_audio, 3, 3); in hdmi_core_audio_config()
[all …]
A Ddsi.c1918 r = FLD_MOD(r, ths_prepare, 31, 24); in dsi_cio_timings()
1920 r = FLD_MOD(r, ths_trail, 15, 8); in dsi_cio_timings()
1921 r = FLD_MOD(r, ths_exit, 7, 0); in dsi_cio_timings()
1925 r = FLD_MOD(r, tlpx_half, 20, 16); in dsi_cio_timings()
1926 r = FLD_MOD(r, tclk_trail, 15, 8); in dsi_cio_timings()
1927 r = FLD_MOD(r, tclk_zero, 7, 0); in dsi_cio_timings()
1938 r = FLD_MOD(r, tclk_prepare, 7, 0); in dsi_cio_timings()
3603 r = FLD_MOD(r, 0, 25, 25); in dsi_proto_config()
3666 r = FLD_MOD(r, ddr_clk_pre, 15, 8); in dsi_proto_timings()
3667 r = FLD_MOD(r, ddr_clk_post, 7, 0); in dsi_proto_timings()
[all …]
A Ddss.c59 dss_write_reg(idx, FLD_MOD(dss_read_reg(idx), val, start, end))
266 l = FLD_MOD(l, 0xf, 19, 15); /* SDI_PDIV */ in dss_sdi_init()
267 l = FLD_MOD(l, datapairs-1, 3, 2); /* SDI_PRSEL */ in dss_sdi_init()
268 l = FLD_MOD(l, 2, 1, 0); /* SDI_BWSEL */ in dss_sdi_init()
272 l = FLD_MOD(l, 0x7, 25, 22); /* SDI_PLL_FREQSEL */ in dss_sdi_init()
273 l = FLD_MOD(l, 0xb, 16, 11); /* SDI_PLL_REGN */ in dss_sdi_init()
274 l = FLD_MOD(l, 0xb4, 10, 1); /* SDI_PLL_REGM */ in dss_sdi_init()
A Dhdmi5_core.c320 r = FLD_MOD(r, vsync_pol, 6, 6); in hdmi_core_video_config()
321 r = FLD_MOD(r, hsync_pol, 5, 5); in hdmi_core_video_config()
322 r = FLD_MOD(r, cfg->data_enable_pol, 4, 4); in hdmi_core_video_config()
323 r = FLD_MOD(r, cfg->vblank_osc, 1, 1); in hdmi_core_video_config()
324 r = FLD_MOD(r, cfg->v_fc_config.timings.interlace, 0, 0); in hdmi_core_video_config()
A Ddispc.c956 val = FLD_MOD(val, chan, shift, shift); in dispc_ovl_set_channel_out()
957 val = FLD_MOD(val, chan2, 31, 30); in dispc_ovl_set_channel_out()
959 val = FLD_MOD(val, channel, shift, shift); in dispc_ovl_set_channel_out()
1083 val = FLD_MOD(val, enable, 9, 9); in dispc_ovl_set_vid_color_conv()
1147 v = FLD_MOD(v, 4, 2, 0); /* GFX BUF top to WB */ in dispc_init_fifos()
1148 v = FLD_MOD(v, 4, 5, 3); /* GFX BUF bottom to WB */ in dispc_init_fifos()
1149 v = FLD_MOD(v, 0, 26, 24); /* WB BUF top to GFX */ in dispc_init_fifos()
2941 l = FLD_MOD(l, gpout0, 15, 15); in dispc_mgr_set_io_pad_mode()
2942 l = FLD_MOD(l, gpout1, 16, 16); in dispc_mgr_set_io_pad_mode()
3724 l = FLD_MOD(l, 1, 0, 0); in _omap_dispc_initial_config()
[all …]
A Dvideo-pll.c28 writel_relaxed(FLD_MOD(readl_relaxed(reg), val, start, end), reg)
A Dhdmi5.c90 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */ in hdmi_irq_handler()
91 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */ in hdmi_irq_handler()
A Dhdmi.h259 hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\
A Ddss.h62 #define FLD_MOD(orig, val, start, end) \ macro
/linux/drivers/gpu/drm/omapdrm/dss/
A Dpll.c406 l = FLD_MOD(l, 1, 0, 0); /* PLL_STOPMODE */ in dss_pll_write_config_type_a()
434 l = FLD_MOD(l, f, 4, 1); /* PLL_FREQSEL */ in dss_pll_write_config_type_a()
440 l = FLD_MOD(l, 1, 13, 13); /* PLL_REFEN */ in dss_pll_write_config_type_a()
441 l = FLD_MOD(l, 0, 14, 14); /* PHY_CLKINEN */ in dss_pll_write_config_type_a()
442 l = FLD_MOD(l, 0, 16, 16); /* M4_CLOCK_EN */ in dss_pll_write_config_type_a()
443 l = FLD_MOD(l, 0, 18, 18); /* M5_CLOCK_EN */ in dss_pll_write_config_type_a()
444 l = FLD_MOD(l, 1, 20, 20); /* HSDIVBYPASS */ in dss_pll_write_config_type_a()
447 l = FLD_MOD(l, 0, 23, 23); /* M6_CLOCK_EN */ in dss_pll_write_config_type_a()
538 l = FLD_MOD(l, 0x1, 13, 13); /* PLL_REFEN */ in dss_pll_write_config_type_b()
545 l = FLD_MOD(l, 0x4, 3, 1); in dss_pll_write_config_type_b()
[all …]
A Dhdmi_wp.c234 r = FLD_MOD(r, aud_fmt->stereo_channels, 26, 24); in hdmi_wp_audio_config_format()
237 r = FLD_MOD(r, aud_fmt->en_sig_blk_strt_end, 5, 5); in hdmi_wp_audio_config_format()
238 r = FLD_MOD(r, aud_fmt->type, 4, 4); in hdmi_wp_audio_config_format()
239 r = FLD_MOD(r, aud_fmt->justification, 3, 3); in hdmi_wp_audio_config_format()
240 r = FLD_MOD(r, aud_fmt->sample_order, 2, 2); in hdmi_wp_audio_config_format()
241 r = FLD_MOD(r, aud_fmt->samples_per_word, 1, 1); in hdmi_wp_audio_config_format()
242 r = FLD_MOD(r, aud_fmt->sample_size, 0, 0); in hdmi_wp_audio_config_format()
254 r = FLD_MOD(r, aud_dma->transfer_size, 15, 8); in hdmi_wp_audio_config_dma()
255 r = FLD_MOD(r, aud_dma->block_size, 7, 0); in hdmi_wp_audio_config_dma()
259 r = FLD_MOD(r, aud_dma->mode, 9, 9); in hdmi_wp_audio_config_dma()
[all …]
A Dhdmi4_core.c201 r = FLD_MOD(r, 1, 5, 5); in hdmi_core_video_config()
204 r = FLD_MOD(r, 0, 5, 5); in hdmi_core_video_config()
210 r = FLD_MOD(r, cfg->deep_color_pkt, 6, 6); in hdmi_core_video_config()
211 r = FLD_MOD(r, cfg->pkt_mode, 5, 3); in hdmi_core_video_config()
212 r = FLD_MOD(r, cfg->hdmi_dvi, 0, 0); in hdmi_core_video_config()
513 r = FLD_MOD(r, 0, 2, 2); in hdmi_core_audio_config()
515 r = FLD_MOD(r, cfg->en_acr_pkt, 1, 1); in hdmi_core_audio_config()
516 r = FLD_MOD(r, cfg->cts_mode, 0, 0); in hdmi_core_audio_config()
548 r = FLD_MOD(r, cfg->i2s_cfg.vbit, 4, 4); in hdmi_core_audio_config()
561 r = FLD_MOD(r, cfg->en_dsd_audio, 3, 3); in hdmi_core_audio_config()
[all …]
A Ddsi.c1391 r = FLD_MOD(r, ths_prepare, 31, 24); in dsi_cio_timings()
1393 r = FLD_MOD(r, ths_trail, 15, 8); in dsi_cio_timings()
1394 r = FLD_MOD(r, ths_exit, 7, 0); in dsi_cio_timings()
1398 r = FLD_MOD(r, tlpx_half, 20, 16); in dsi_cio_timings()
1399 r = FLD_MOD(r, tclk_trail, 15, 8); in dsi_cio_timings()
1400 r = FLD_MOD(r, tclk_zero, 7, 0); in dsi_cio_timings()
1411 r = FLD_MOD(r, tclk_prepare, 7, 0); in dsi_cio_timings()
2796 r = FLD_MOD(r, 0, 25, 25); in dsi_proto_config()
2858 r = FLD_MOD(r, ddr_clk_pre, 15, 8); in dsi_proto_timings()
2859 r = FLD_MOD(r, ddr_clk_post, 7, 0); in dsi_proto_timings()
[all …]
A Ddss.c59 FLD_MOD(dss_read_reg(dss, idx), val, start, end))
250 l = FLD_MOD(l, 0xf, 19, 15); /* SDI_PDIV */ in dss_sdi_init()
251 l = FLD_MOD(l, datapairs-1, 3, 2); /* SDI_PRSEL */ in dss_sdi_init()
252 l = FLD_MOD(l, 2, 1, 0); /* SDI_BWSEL */ in dss_sdi_init()
256 l = FLD_MOD(l, 0x7, 25, 22); /* SDI_PLL_FREQSEL */ in dss_sdi_init()
257 l = FLD_MOD(l, 0xb, 16, 11); /* SDI_PLL_REGN */ in dss_sdi_init()
258 l = FLD_MOD(l, 0xb4, 10, 1); /* SDI_PLL_REGM */ in dss_sdi_init()
A Dhdmi5_core.c285 r = FLD_MOD(r, vsync_pol, 6, 6); in hdmi_core_video_config()
286 r = FLD_MOD(r, hsync_pol, 5, 5); in hdmi_core_video_config()
287 r = FLD_MOD(r, cfg->data_enable_pol, 4, 4); in hdmi_core_video_config()
288 r = FLD_MOD(r, cfg->vblank_osc, 1, 1); in hdmi_core_video_config()
289 r = FLD_MOD(r, !!(vm->flags & DISPLAY_FLAGS_INTERLACED), 0, 0); in hdmi_core_video_config()
A Dhdmi4_cec.c235 temp = FLD_MOD(temp, 0, 4, 4); in hdmi_cec_adap_enable()
244 temp = FLD_MOD(0x0, 0x5, 2, 0); in hdmi_cec_adap_enable()
A Ddispc.c55 FLD_MOD(dispc_read_reg(dispc, idx), val, start, end))
1202 val = FLD_MOD(val, chan, shift, shift); in dispc_ovl_set_channel_out()
1203 val = FLD_MOD(val, chan2, 31, 30); in dispc_ovl_set_channel_out()
1205 val = FLD_MOD(val, channel, shift, shift); in dispc_ovl_set_channel_out()
1342 val = FLD_MOD(val, enable, 9, 9); in dispc_ovl_set_vid_color_conv()
2864 l = FLD_MOD(l, 1, 26, 24); /* CAPTUREMODE */ in dispc_wb_setup()
2866 l = FLD_MOD(l, 0, 26, 24); /* CAPTUREMODE */ in dispc_wb_setup()
3057 l = FLD_MOD(l, gpout0, 15, 15); in dispc_mgr_set_io_pad_mode()
3058 l = FLD_MOD(l, gpout1, 16, 16); in dispc_mgr_set_io_pad_mode()
3930 l = FLD_MOD(l, 1, 0, 0); in _omap_dispc_initial_config()
[all …]
A Dvideo-pll.c26 writel_relaxed(FLD_MOD(readl_relaxed(reg), val, start, end), reg)
A Dhdmi5.c91 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */ in hdmi_irq_handler()
92 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */ in hdmi_irq_handler()
A Dhdmi.h278 hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\
A Ddss.h67 #define FLD_MOD(orig, val, start, end) \ macro
/linux/drivers/gpu/drm/tidss/
A Dtidss_dispc.c385 static u32 FLD_MOD(u32 orig, u32 val, u32 start, u32 end) in FLD_MOD() function
398 dispc_write(dispc, idx, FLD_MOD(dispc_read(dispc, idx), val, in REG_FLD_MOD()
412 FLD_MOD(dispc_vid_read(dispc, hw_plane, idx), in VID_REG_FLD_MOD()
425 dispc_vp_write(dispc, vp, idx, FLD_MOD(dispc_vp_read(dispc, vp, idx), in VP_REG_FLD_MOD()
440 FLD_MOD(dispc_ovr_read(dispc, ovr, idx), in OVR_REG_FLD_MOD()
926 oldi_cfg = FLD_MOD(oldi_cfg, fmt->oldi_mode_reg_val, 3, 1); in dispc_enable_oldi()

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