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Searched refs:GCC_DISP_GPLL0_DIV_CLK_SRC (Results 1 – 12 of 12) sorted by relevance

/linux/include/dt-bindings/clock/
A Dqcom,gcc-sc7180.h35 #define GCC_DISP_GPLL0_DIV_CLK_SRC 25 macro
A Dqcom,gcc-qcm2290.h83 #define GCC_DISP_GPLL0_DIV_CLK_SRC 73 macro
A Dqcom,gcc-sm6115.h70 #define GCC_DISP_GPLL0_DIV_CLK_SRC 62 macro
A Dqcom,gcc-sm6125.h112 #define GCC_DISP_GPLL0_DIV_CLK_SRC 103 macro
A Dqcom,gcc-sdm845.h32 #define GCC_DISP_GPLL0_DIV_CLK_SRC 22 macro
/linux/Documentation/devicetree/bindings/clock/
A Dqcom,sdm845-dispcc.yaml81 <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>,
/linux/drivers/clk/qcom/
A Dgcc-sc7180.c2277 [GCC_DISP_GPLL0_DIV_CLK_SRC] = &gcc_disp_gpll0_div_clk_src.clkr,
A Dgcc-qcm2290.c2844 [GCC_DISP_GPLL0_DIV_CLK_SRC] = &gcc_disp_gpll0_div_clk_src.clkr,
A Dgcc-sdm845.c3335 [GCC_DISP_GPLL0_DIV_CLK_SRC] = &gcc_disp_gpll0_div_clk_src.clkr,
A Dgcc-sm6115.c3331 [GCC_DISP_GPLL0_DIV_CLK_SRC] = &gcc_disp_gpll0_div_clk_src.clkr,
A Dgcc-sm6125.c3968 [GCC_DISP_GPLL0_DIV_CLK_SRC] = &gcc_disp_gpll0_div_clk_src.clkr,
/linux/arch/arm64/boot/dts/qcom/
A Dsdm845.dtsi4558 <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>,

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