Home
last modified time | relevance | path

Searched refs:HDMI_CONTROL (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_dio_stream_encoder.c582 REG_UPDATE_6(HDMI_CONTROL, in enc3_stream_encoder_hdmi_set_stream_attribute()
593 REG_UPDATE(HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 0); in enc3_stream_encoder_hdmi_set_stream_attribute()
597 REG_UPDATE_2(HDMI_CONTROL, in enc3_stream_encoder_hdmi_set_stream_attribute()
601 REG_UPDATE_2(HDMI_CONTROL, in enc3_stream_encoder_hdmi_set_stream_attribute()
608 REG_UPDATE_2(HDMI_CONTROL, in enc3_stream_encoder_hdmi_set_stream_attribute()
612 REG_UPDATE_2(HDMI_CONTROL, in enc3_stream_encoder_hdmi_set_stream_attribute()
618 REG_UPDATE_2(HDMI_CONTROL, in enc3_stream_encoder_hdmi_set_stream_attribute()
631 REG_UPDATE_2(HDMI_CONTROL, in enc3_stream_encoder_hdmi_set_stream_attribute()
643 REG_UPDATE_2(HDMI_CONTROL, in enc3_stream_encoder_hdmi_set_stream_attribute()
A Ddcn30_dio_stream_encoder.h51 SRI(HDMI_CONTROL, DIG, id), \
/linux/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_stream_encoder.c576 REG_UPDATE_3(HDMI_CONTROL, in dce110_stream_encoder_hdmi_set_stream_attribute()
581 REG_UPDATE_5(HDMI_CONTROL, in dce110_stream_encoder_hdmi_set_stream_attribute()
595 REG_UPDATE_2(HDMI_CONTROL, in dce110_stream_encoder_hdmi_set_stream_attribute()
599 REG_UPDATE_2(HDMI_CONTROL, in dce110_stream_encoder_hdmi_set_stream_attribute()
606 REG_UPDATE_2(HDMI_CONTROL, in dce110_stream_encoder_hdmi_set_stream_attribute()
610 REG_UPDATE_2(HDMI_CONTROL, in dce110_stream_encoder_hdmi_set_stream_attribute()
616 REG_UPDATE_2(HDMI_CONTROL, in dce110_stream_encoder_hdmi_set_stream_attribute()
630 REG_UPDATE_2(HDMI_CONTROL, in dce110_stream_encoder_hdmi_set_stream_attribute()
642 REG_UPDATE_2(HDMI_CONTROL, in dce110_stream_encoder_hdmi_set_stream_attribute()
1049 REG_UPDATE_5(HDMI_CONTROL, in dce110_reset_hdmi_stream_attribute()
[all …]
A Ddce_stream_encoder.h68 SRI(HDMI_CONTROL, DIG, id), \
136 SE_SF(HDMI_CONTROL, HDMI_PACKET_GEN_VERSION, mask_sh),\
137 SE_SF(HDMI_CONTROL, HDMI_KEEPOUT_MODE, mask_sh),\
138 SE_SF(HDMI_CONTROL, HDMI_DEEP_COLOR_ENABLE, mask_sh),\
139 SE_SF(HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, mask_sh),\
302 SE_SF(HDMI_CONTROL, HDMI_CLOCK_CHANNEL_RATE, mask_sh),\
303 SE_SF(HDMI_CONTROL, HDMI_DATA_SCRAMBLE_EN, mask_sh),\
312 SE_SF(HDMI_CONTROL, HDMI_CLOCK_CHANNEL_RATE, mask_sh),\
313 SE_SF(HDMI_CONTROL, HDMI_DATA_SCRAMBLE_EN, mask_sh),\
669 uint32_t HDMI_CONTROL; member
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_stream_encoder.c516 REG_UPDATE_6(HDMI_CONTROL, in enc1_stream_encoder_hdmi_set_stream_attribute()
527 REG_UPDATE(HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 0); in enc1_stream_encoder_hdmi_set_stream_attribute()
532 REG_UPDATE_2(HDMI_CONTROL, in enc1_stream_encoder_hdmi_set_stream_attribute()
538 REG_UPDATE_2(HDMI_CONTROL, in enc1_stream_encoder_hdmi_set_stream_attribute()
547 REG_UPDATE_2(HDMI_CONTROL, in enc1_stream_encoder_hdmi_set_stream_attribute()
553 REG_UPDATE_2(HDMI_CONTROL, in enc1_stream_encoder_hdmi_set_stream_attribute()
561 REG_UPDATE_2(HDMI_CONTROL, in enc1_stream_encoder_hdmi_set_stream_attribute()
576 REG_UPDATE_2(HDMI_CONTROL, in enc1_stream_encoder_hdmi_set_stream_attribute()
588 REG_UPDATE_2(HDMI_CONTROL, in enc1_stream_encoder_hdmi_set_stream_attribute()
1047 REG_UPDATE_5(HDMI_CONTROL, in enc1_reset_hdmi_stream_attribute()
A Ddcn10_stream_encoder.h56 SRI(HDMI_CONTROL, DIG, id), \
144 uint32_t HDMI_CONTROL; member
/linux/drivers/gpu/drm/radeon/
A Devergreen_hdmi.c325 val = RREG32(HDMI_CONTROL + offset); in dce4_hdmi_set_color_depth()
352 WREG32(HDMI_CONTROL + offset, val); in dce4_hdmi_set_color_depth()
A Drv770d.h681 #define HDMI_CONTROL 0x7400 macro
A Devergreend.h520 #define HDMI_CONTROL 0x7030 macro
/linux/drivers/gpu/drm/amd/amdgpu/
A Ddce_v10_0.c1615 tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_ENABLE, 0); in dce_v10_0_afmt_setmode()
1616 tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 0); in dce_v10_0_afmt_setmode()
1621 tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_ENABLE, 1); in dce_v10_0_afmt_setmode()
1622 tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 1); in dce_v10_0_afmt_setmode()
1627 tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_ENABLE, 1); in dce_v10_0_afmt_setmode()
1628 tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 2); in dce_v10_0_afmt_setmode()
A Ddce_v11_0.c1657 tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_ENABLE, 0); in dce_v11_0_afmt_setmode()
1658 tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 0); in dce_v11_0_afmt_setmode()
1663 tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_ENABLE, 1); in dce_v11_0_afmt_setmode()
1664 tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 1); in dce_v11_0_afmt_setmode()
1669 tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_ENABLE, 1); in dce_v11_0_afmt_setmode()
1670 tmp = REG_SET_FIELD(tmp, HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 2); in dce_v11_0_afmt_setmode()

Completed in 51 milliseconds