Searched refs:HostCtrl (Results 1 – 4 of 4) sorted by relevance
189 &rrpriv->regs->HostCtrl); in rr_init_one()764 ®s->HostCtrl); in rr_handle_event()771 ®s->HostCtrl); in rr_handle_event()795 ®s->HostCtrl); in rr_handle_event()807 ®s->HostCtrl); in rr_handle_event()814 ®s->HostCtrl); in rr_handle_event()821 ®s->HostCtrl); in rr_handle_event()1219 writel(readl(®s->HostCtrl)|HALT_NIC|RR_CLEAR_INT, ®s->HostCtrl); in rr_open()1220 readl(®s->HostCtrl); in rr_open()1245 writel(readl(®s->HostCtrl)|HALT_NIC|RR_CLEAR_INT, ®s->HostCtrl); in rr_open()[all …]
16 u32 HostCtrl; member
34 u32 HostCtrl; /* 0x40 */ member749 writel(readl(®s->HostCtrl) | MASK_INTS, ®s->HostCtrl); in ace_mask_irq()763 writel(readl(®s->HostCtrl) & ~MASK_INTS, ®s->HostCtrl); in ace_unmask_irq()
564 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) { in acenic_probe_one()884 writel(HW_RESET | (HW_RESET << 24), ®s->HostCtrl); in ace_init()885 readl(®s->HostCtrl); /* PCI write posting */ in ace_init()897 ®s->HostCtrl); in ace_init()900 ®s->HostCtrl); in ace_init()902 readl(®s->HostCtrl); /* PCI write posting */ in ace_init()911 tig_ver = readl(®s->HostCtrl) >> 28; in ace_init()1556 dev->name, (unsigned int)readl(®s->HostCtrl)); in ace_watchdog()2112 if (!(readl(®s->HostCtrl) & IN_INT)) in ace_interrupt()
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