Searched refs:ID_AA64PFR0_SVE_SHIFT (Results 1 – 5 of 5) sorted by relevance
| /linux/arch/arm64/include/asm/ |
| A D | el2_setup.h | 135 ubfx x1, x1, #ID_AA64PFR0_SVE_SHIFT, #4
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| A D | cpufeature.h | 617 u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_SVE_SHIFT); in id_aa64pfr0_sve()
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| A D | sysreg.h | 781 #define ID_AA64PFR0_SVE_SHIFT 32 macro
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| /linux/arch/arm64/kernel/ |
| A D | cpufeature.c | 236 FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR0_SVE_SHIFT, 4, 0),
2074 .field_pos = ID_AA64PFR0_SVE_SHIFT,
2455 …HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_SVE_SHIFT, FTR_UNSIGNED, ID_AA64PFR0_SVE, CAP_HWCAP, KE…
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| /linux/tools/arch/arm64/include/asm/ |
| A D | sysreg.h | 774 #define ID_AA64PFR0_SVE_SHIFT 32 macro
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