Searched refs:L1I (Results 1 – 25 of 32) sorted by relevance
12
/linux/arch/alpha/kernel/ |
A D | setup.c | 1280 int L1I, L1D, L2, L3; in determine_cpu_caches() local 1287 L1I = CSHAPE(8*1024, 5, 1); in determine_cpu_caches() 1289 L1I = CSHAPE(16*1024, 5, 1); in determine_cpu_caches() 1290 L1D = L1I; in determine_cpu_caches() 1311 L1I = L1D = CSHAPE(8*1024, 5, 1); in determine_cpu_caches() 1326 L1I = L1D = CSHAPE(8*1024, 5, 1); in determine_cpu_caches() 1351 L1I = CSHAPE(16*1024, 6, 1); in determine_cpu_caches() 1354 L1I = CSHAPE(32*1024, 6, 2); in determine_cpu_caches() 1378 L1I = L1D = CSHAPE(64*1024, 6, 2); in determine_cpu_caches() 1392 L1I = L1D = L2 = L3 = 0; in determine_cpu_caches() [all …]
|
/linux/arch/arm/kernel/ |
A D | perf_event_v7.c | 185 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, 234 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, 273 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, 274 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, 323 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, 324 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, 373 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, 422 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, 478 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = KRAIT_PERFCTR_L1_ICACHE_MISS, 517 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = SCORPION_ICACHE_ACCESS, [all …]
|
A D | perf_event_v6.c | 101 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV6_PERFCTR_ICACHE_MISS, 164 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV6MPCORE_PERFCTR_ICACHE_MISS,
|
/linux/arch/mips/kernel/ |
A D | perf_event_mipsxx.c | 1026 [C(L1I)] = { 1107 [C(L1I)] = { 1176 [C(L1I)] = { 1220 [C(L1I)] = { 1276 [C(L1I)] = { 1340 [C(L1I)] = { 1393 [C(L1I)] = { 1444 [C(L1I)] = {
|
/linux/arch/powerpc/perf/ |
A D | e6500-pmu.c | 42 [C(L1I)] = {
|
A D | e500-pmu.c | 44 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
A D | power10-pmu.c | 362 [C(L1I)] = { 463 [C(L1I)] = {
|
A D | generic-compat-pmu.c | 190 [ C(L1I) ] = {
|
A D | mpc7450-pmu.c | 371 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
A D | power8-pmu.c | 271 [ C(L1I) ] = {
|
A D | ppc970-pmu.c | 444 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
A D | power7-pmu.c | 345 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
A D | power6-pmu.c | 493 [C(L1I)] = { /* RESULT_ACCESS RESULT_MISS */
|
/linux/arch/x86/events/zhaoxin/ |
A D | core.c | 65 [C(L1I)] = { 169 [C(L1I)] = {
|
/linux/arch/arc/include/asm/ |
A D | perf_event.h | 141 [C(L1I)] = {
|
/linux/arch/sh/kernel/cpu/sh4/ |
A D | perf_event.c | 106 [ C(L1I) ] = {
|
/linux/arch/sh/kernel/cpu/sh4a/ |
A D | perf_event.c | 131 [ C(L1I) ] = {
|
/linux/arch/x86/events/intel/ |
A D | p6.c | 42 [ C(L1I ) ] = {
|
A D | knc.c | 45 [ C(L1I ) ] = {
|
A D | core.c | 458 [ C(L1I ) ] = { 609 [ C(L1I ) ] = { 837 [ C(L1I ) ] = { 993 [ C(L1I ) ] = { 1145 [ C(L1I ) ] = { 1328 [ C(L1I ) ] = { 1443 [ C(L1I ) ] = { 1534 [ C(L1I ) ] = { 1685 [ C(L1I ) ] = { 1819 [C(L1I)] = { [all …]
|
/linux/arch/arm64/kernel/ |
A D | perf_event.c | 63 [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_PMUV3_PERFCTR_L1I_CACHE, 64 [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_PMUV3_PERFCTR_L1I_CACHE_REFILL, 128 [C(L1I)][C(OP_PREFETCH)][C(RESULT_ACCESS)] = ARMV8_THUNDER_PERFCTR_L1I_CACHE_PREF_ACCESS, 129 [C(L1I)][C(OP_PREFETCH)][C(RESULT_MISS)] = ARMV8_THUNDER_PERFCTR_L1I_CACHE_PREF_MISS,
|
/linux/arch/x86/events/amd/ |
A D | core.c | 40 [ C(L1I ) ] = { 144 [C(L1I)] = {
|
/linux/arch/sparc/kernel/ |
A D | perf_event.c | 235 [C(L1I)] = { 373 [C(L1I)] = { 508 [C(L1I)] = { 645 [C(L1I)] = {
|
/linux/arch/nds32/include/asm/ |
A D | pmu.h | 264 [C(L1I)] = {
|
/linux/arch/riscv/kernel/ |
A D | perf_event.c | 70 [C(L1I)] = {
|
Completed in 66 milliseconds
12