Searched refs:MI_LOAD_REGISTER_IMM (Results 1 – 17 of 17) sorted by relevance
| /linux/drivers/gpu/drm/i915/gt/ |
| A D | intel_ring_submission.c | 654 *cs++ = MI_LOAD_REGISTER_IMM(1); in load_pd_dir()
658 *cs++ = MI_LOAD_REGISTER_IMM(1); in load_pd_dir()
668 *cs++ = MI_LOAD_REGISTER_IMM(1); in load_pd_dir()
712 *cs++ = MI_LOAD_REGISTER_IMM(num_engines); in mi_set_context()
766 *cs++ = MI_LOAD_REGISTER_IMM(num_engines); in mi_set_context()
812 *cs++ = MI_LOAD_REGISTER_IMM(L3LOG_DW); in remap_l3_slice()
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| A D | gen8_engine_cs.c | 193 *cs++ = MI_LOAD_REGISTER_IMM(1); in gen12_emit_aux_table_inv()
316 *cs++ = MI_LOAD_REGISTER_IMM(hweight32(aux_inv)); in gen12_emit_flush_xcs()
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| A D | intel_gpu_commands.h | 144 #define MI_LOAD_REGISTER_IMM(x) MI_INSTR(0x22, 2*(x)-1) macro
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| A D | intel_lrc.c | 47 *regs = MI_LOAD_REGISTER_IMM(count); in set_offsets()
1379 *batch++ = MI_LOAD_REGISTER_IMM(1); in gen8_emit_flush_coherentl3_wa()
1454 *batch++ = MI_LOAD_REGISTER_IMM(count); in emit_lri()
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| A D | selftest_workarounds.c | 583 *cs++ = MI_LOAD_REGISTER_IMM(1); in check_dirty_whitelist()
596 *cs++ = MI_LOAD_REGISTER_IMM(1); in check_dirty_whitelist()
915 *cs++ = MI_LOAD_REGISTER_IMM(whitelist_writable_count(engine)); in scrub_whitelisted_registers()
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| A D | gen7_renderclear.c | 398 batch_add(&cmds, MI_LOAD_REGISTER_IMM(2)); in emit_batch()
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| A D | selftest_rps.c | 97 *cs++ = MI_LOAD_REGISTER_IMM(__NGPR__ * 2); in create_spin_counter()
105 *cs++ = MI_LOAD_REGISTER_IMM(1); in create_spin_counter()
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| A D | selftest_lrc.c | 506 *cs++ = MI_LOAD_REGISTER_IMM(NUM_GPR_DW); in gpr_make_dirty()
1118 *cs++ = MI_LOAD_REGISTER_IMM(len); in load_context()
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| A D | intel_workarounds.c | 783 *cs++ = MI_LOAD_REGISTER_IMM(wal->count); in intel_engine_emit_ctx_wa()
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| A D | selftest_execlists.c | 3075 *cs++ = MI_LOAD_REGISTER_IMM(1); in create_gpr_user()
4256 *cs++ = MI_LOAD_REGISTER_IMM(1); in preserved_virtual_engine()
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| A D | intel_execlists_submission.c | 2661 *cs++ = MI_LOAD_REGISTER_IMM(2 * GEN8_3LVL_PDPES) | MI_LRI_FORCE_POSTED; in emit_pdps()
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| /linux/drivers/gpu/drm/i915/gvt/ |
| A D | mmio_context.c | 219 *cs++ = MI_LOAD_REGISTER_IMM(count); in restore_context_mmio_for_inhibit()
252 *cs++ = MI_LOAD_REGISTER_IMM(GEN9_MOCS_SIZE); in restore_render_mocs_control_for_inhibit()
279 *cs++ = MI_LOAD_REGISTER_IMM(GEN9_MOCS_SIZE / 2); in restore_render_mocs_l3cc_for_inhibit()
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| /linux/drivers/gpu/drm/i915/ |
| A D | i915_cmd_parser.c | 220 CMD( MI_LOAD_REGISTER_IMM(1), SMI, !F, 0xFF, W,
477 CMD( MI_LOAD_REGISTER_IMM(1), SMI, !F, 0xFF, W,
1280 if (cmd_desc_is(desc, MI_LOAD_REGISTER_IMM(1)) && in check_cmd()
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| A D | i915_perf.c | 1696 *cs++ = MI_LOAD_REGISTER_IMM(1); in alloc_noa_wait()
1714 *cs++ = MI_LOAD_REGISTER_IMM(1); in alloc_noa_wait()
1756 *cs++ = MI_LOAD_REGISTER_IMM(2); in alloc_noa_wait()
1832 *cs++ = MI_LOAD_REGISTER_IMM(n_lri); in write_cs_mi_lri()
2183 *cs++ = MI_LOAD_REGISTER_IMM(count); in gen8_load_flex()
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| /linux/drivers/gpu/drm/i915/selftests/ |
| A D | i915_perf.c | 336 *cs++ = MI_LOAD_REGISTER_IMM(32); in live_noa_gpr()
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| /linux/drivers/gpu/drm/i915/gem/selftests/ |
| A D | i915_gem_client_blt.c | 60 *cs++ = MI_LOAD_REGISTER_IMM(1); in prepare_blit()
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| /linux/drivers/gpu/drm/i915/gem/ |
| A D | i915_gem_execbuffer.c | 2044 *cs++ = MI_LOAD_REGISTER_IMM(4); in i915_reset_gen7_sol_offsets()
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