Searched refs:OTP (Results 1 – 25 of 37) sorted by relevance
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| /linux/drivers/mtd/nand/onenand/ |
| A D | Kconfig | 44 bool "OneNAND OTP Support"
48 Also, 1st Block of NAND Flash Array can be used as OTP.
50 The OTP block can be read, programmed and locked using the same
52 OTP block cannot be erased.
54 OTP block is fully-guaranteed to be a valid block.
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| /linux/Documentation/devicetree/bindings/nvmem/ |
| A D | nintendo-otp.yaml | 7 title: Nintendo Wii and Wii U OTP Device Tree Bindings
10 This binding represents the OTP memory as found on a Nintendo Wii or Wii U,
14 See https://wiiubrew.org/wiki/Hardware/OTP
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| A D | vf610-ocotp.txt | 1 On-Chip OTP Memory for Freescale Vybrid
8 reg : Address and length of OTP controller and fuse map registers
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| A D | lpc1850-otp.txt | 1 * NXP LPC18xx OTP memory
3 Internal OTP (One Time Programmable) memory for NXP LPC18xx/43xx devices.
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| A D | brcm,ocotp.txt | 1 Broadcom OTP memory controller
8 - reg: Base address of the OTP controller.
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| A D | imx-ocotp.yaml | 7 title: Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
13 This binding represents the on-chip eFuse OTP controller found on
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| A D | mxs-ocotp.yaml | 7 title: On-Chip OTP Memory for Freescale i.MX23/i.MX28
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| A D | rockchip-otp.txt | 1 Rockchip internal OTP (One Time Programmable) memory device tree bindings
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| A D | st,stm32-romem.yaml | 11 flash, OTP, read-only HW regs... This contains various information such as:
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| /linux/drivers/nvmem/ |
| A D | Kconfig | 36 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
40 This is a driver for the On-Chip OTP Controller (OCOTP) available on
48 tristate "i.MX8 SCU On-Chip OTP Controller support"
52 This is a driver for the SCU On-Chip OTP Controller (OCOTP)
78 tristate "NXP LPC18XX OTP Memory Support"
82 Say Y here to include support for NXP LPC18xx OTP memory found on
88 tristate "Freescale MXS On-Chip OTP Memory Support"
111 tristate "Nintendo Wii and Wii U OTP Support"
153 tristate "Rockchip OTP controller support"
164 tristate "Broadcom On-Chip OTP Controller support"
[all …]
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| /linux/Documentation/devicetree/bindings/regulator/ |
| A D | palmas-pmic.txt | 3 The tps659038 for the AM57x class have OTP spins that
5 is not a need to add the OTP spins to the palmas driver. The
35 For ti,palmas-pmic - smps12, smps123, smps3 depending on OTP,
50 ti,smps-range - OTP has the wrong range set for the hardware so override
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| /linux/Documentation/devicetree/bindings/net/ |
| A D | microchip,lan78xx.txt | 3 The LAN78XX devices are usually configured by programming their OTP or with
5 The Device Tree properties, if present, override the OTP and EEPROM.
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| /linux/Documentation/devicetree/bindings/mfd/ |
| A D | rohm,bd71847-pmic.yaml | 46 # power outputs go down and OTP is reload. At the SNVS state all other logic
49 # state. When a reset is done via SNVS state the PMIC OTP data is not reload.
52 # power outputs will be returned to HW control by OTP loading. Thus the reset
69 # bootloader or OTP) is not touched.
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| A D | rohm,bd71837-pmic.yaml | 46 # down and OTP is reload. At the SNVS state all other logic and external
49 # reset is done via SNVS state the PMIC OTP data is not reload. This causes
52 # outputs will be returned to HW control by OTP loading. Thus the reset
69 # bootloader or OTP) is not touched.
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| A D | palmas.txt | 31 hardware, if not set will use muxing in OTP.
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| /linux/Documentation/hwmon/ |
| A D | sht15.rst | 48 The humidity calibration coefficients are programmed into an OTP memory on the
67 flag to indicate not to reload from OTP (default to false).
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| /linux/Documentation/ABI/testing/ |
| A D | debugfs-turris-mox-rwtm | 9 device's OTP. The message must be exactly 64 bytes
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| /linux/drivers/mtd/chips/ |
| A D | Kconfig | 156 bool "Protection Registers aka one-time programmable (OTP) bits"
166 programmable (OTP) bits; when programmed, register bits cannot be
173 because the Lock Register bits themselves are OTP, when programmed,
178 in the programming of OTP bits will waste them.
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| /linux/Documentation/devicetree/bindings/arm/samsung/ |
| A D | exynos-chipid.yaml | 25 is missing in the CHIPID registers or in the OTP memory.
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| /linux/Documentation/devicetree/bindings/net/wireless/ |
| A D | mediatek,mt76.yaml | 68 Merge EEPROM data with OTP data. Can be used on boards where the flash
70 pulled from the OTP ROM
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| /linux/Documentation/devicetree/bindings/input/ |
| A D | ti,palmas-pwrbutton.txt | 18 NOTE: This depends on OTP support and POWERHOLD signal configuration
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| /linux/Documentation/w1/slaves/ |
| A D | w1_ds2406.rst | 15 These chips also provide 128 bytes of OTP EPROM, but reading/writing it is
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| /linux/Documentation/devicetree/bindings/mtd/ |
| A D | mtd.yaml | 30 An OTP memory region. Some flashes provide a one-time-programmable
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| /linux/arch/arm/boot/dts/ |
| A D | berlin2cd-valve-steamlink.dts | 42 * less depending on leakage value in OTP), and buck2 likely used for
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| A D | imx6q-gk802.dts | 66 /* SDMC DM2016 1024 bit EEPROM + 128 bit OTP */
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