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/linux/drivers/ata/
A Data_piix.c105 P0 = 0, /* port 0 */ enumerator
343 { P0, NA, P1, NA }, /* 000b */
344 { P1, NA, P0, NA }, /* 001b */
359 { P0, P2, P1, P3 }, /* 00b */
361 { P0, P2, IDE, IDE }, /* 10b */
376 { P0, P2, NA, NA }, /* 00b */
378 { P0, P2, IDE, IDE }, /* 10b */
400 { P0, NA, P1, NA }, /* 00b */
412 { P0, NA, NA, NA }, /* 00b */
414 { P0, P2, IDE, IDE }, /* 10b */
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/linux/tools/memory-model/litmus-tests/
A DISA2+pooncerelease+poacquirerelease+poacquireonce.litmus7 * to order P0()'s initial write against P2()'s final read. The reason
9 * case (P2() to P0()), each process reads from the preceding process's
16 P0(int *x, int *y)
A DZ6.0+pooncerelease+poacquirerelease+fencembonceonce.litmus9 * P0's write, which means that there are two non-rf links: P1() to P2()
11 * to P0() is a read-to-write link (AKA a "from-reads" or just "fr" link).
19 P0(int *x, int *y)
A DREADME184 P0(int *x, int *y)
208 P0()'s WRITE_ONCE() is read by its first READ_ONCE(), which is a
209 reads-from link (rf) and internal to the P0() process. This is
215 P0()'s second access is a READ_ONCE(), as opposed to (for example)
218 P0()'s third access is also a READ_ONCE(), but to y rather than x.
219 This is related to P0()'s second access by program order ("po"),
221 The resulting descriptor is "PodRR". Because P0()'s third access is
224 A from-read ("fre") relation links P0()'s third to P1()'s first
229 The remainder of P1() is similar to P0(), which means we add
231 P0()'s first access, which is WRITE_ONCE(), so we add "Fre Once".
A DS+poonceonces.litmus6 * Starting with a two-process release-acquire chain ordering P0()'s
14 P0(int *x, int *y)
A DISA2+pooncelock+pooncelock+pombonce.litmus7 * (in P0() and P1()) is visible to external process P2().
12 P0(int *x, int *y, spinlock_t *mylock)
A DCoWW+poonceonce.litmus12 P0(int *x)
A DCoRR+poonceonce+Once.litmus12 P0(int *x)
A DLB+poonceonces.litmus12 P0(int *x, int *y)
A DS+fencewmbonceonce+poacquireonce.litmus12 P0(int *x, int *y)
A DCoRW+poonceonce+Once.litmus12 P0(int *x)
A DCoWR+poonceonce+Once.litmus12 P0(int *x)
A DMP+poonceonces.litmus12 P0(int *buf, int *flag) // Producer
A DMP+pooncerelease+poacquireonce.litmus13 P0(int *buf, int *flag) // Producer
A DR+poonceonces.litmus13 P0(int *x, int *y)
A DLB+poacquireonce+pooncerelease.litmus13 P0(int *x, int *y)
A DSB+poonceonces.litmus13 P0(int *x, int *y)
A DMP+fencewmbonceonce+fencermbonceonce.litmus13 P0(int *buf, int *flag) // Producer
A DSB+rfionceonce-poonceonces.litmus11 P0(int *x, int *y)
A DR+fencembonceonces.litmus14 P0(int *x, int *y)
/linux/arch/hexagon/kernel/
A Dvm_entry.S284 P0 = tstbit(R0, #HVM_VMEST_UM_SFT); define
285 if (!P0.new) jump:nt restore_all;
307 P0 = cmp.eq(R0, #0); if (!P0.new) jump:nt check_work_pending; define
368 P0 = cmp.eq(R24, #0); define
372 if (P0) jump check_work_pending
/linux/tools/memory-model/Documentation/
A Dexplanation.txt115 P0()
227 P0()
512 P0()
535 P0()
614 P0()
628 P0()
644 P0()
696 P0()
1082 P0()
1203 P0()
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A Dlitmus-tests.txt72 5 P0(int *x, int *y)
128 by reference, hence "P0(int *x, int *y)", but *never* "P0(int x, int y)".
262 8 P0(int *x, int *y)
323 5 P0(int *x, int *y)
390 5 P0(int *x, int *y)
443 5 P0(int *x, int *y)
517 6 P0(int *sl, int *x0, int *x1)
628 7 P0(int *sl, int *x0, int *x1)
694 8 P0(int *x, int **y)
783 12 P0(int *x, int **y) // F
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/linux/arch/arm/boot/dts/
A Daspeed-bmc-amd-ethanolx.dts125 /*P0-P7*/ "P0_VDD_CORE_RUN_VRHOT","P0_VDD_SOC_RUN_VRHOT",
144 //APML for P0
169 //P0 Power regulators
179 //P0/P1 Thermal diode
/linux/Documentation/litmus-tests/atomic/
A DAtomic-RMW-ops-are-atomic-WRT-atomic_set.litmus14 P0(atomic_t *v)

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