Searched refs:PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER (Results 1 – 3 of 3) sorted by relevance

/linux/include/dt-bindings/clock/
A D	exynos7-clk.h	136 #define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER 6 macro
/linux/arch/arm64/boot/dts/exynos/
A D	exynos7.dtsi	666 <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER>,
/linux/drivers/clk/samsung/
A D	clk-exynos7.c	951 GATE(PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER,

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