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Searched refs:PHYDSYMCLK_CLOCK_CNTL (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_dccg.h44 SR(PHYDSYMCLK_CLOCK_CNTL),\
90 DCCG_SF(PHYDSYMCLK_CLOCK_CNTL, PHYDSYMCLK_FORCE_EN, mask_sh),\
91 DCCG_SF(PHYDSYMCLK_CLOCK_CNTL, PHYDSYMCLK_FORCE_SRC_SEL, mask_sh),\
A Ddcn31_dccg.c440 REG_UPDATE_2(PHYDSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
444 REG_UPDATE_2(PHYDSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
/linux/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_dccg.h218 uint32_t PHYDSYMCLK_CLOCK_CNTL; member

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