Searched refs:PLL_P2_DIVIDE_BY_4 (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/gma500/
A D	psb_intel_display.c	356 if (dpll & PLL_P2_DIVIDE_BY_4) in psb_intel_crtc_clock_get()
A D	psb_intel_reg.h	255 #define PLL_P2_DIVIDE_BY_4 (1 << 23) /* i830, required macro
A D	cdv_intel_display.c	891 if (dpll & PLL_P2_DIVIDE_BY_4) in cdv_intel_crtc_clock_get()
/linux/drivers/gpu/drm/i915/display/
A D	intel_dpll.c	903 dpll |= PLL_P2_DIVIDE_BY_4; in i8xx_compute_dpll()
A D	intel_display.c	5860 if (dpll & PLL_P2_DIVIDE_BY_4) in i9xx_crtc_clock_get() 11134 PLL_P2_DIVIDE_BY_4 | in i830_enable_pipe()
/linux/drivers/gpu/drm/i915/
A D	i915_reg.h	3569 #define PLL_P2_DIVIDE_BY_4 (1 << 23) macro

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