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Searched refs:QM_PEH_AXUSER_CFG (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/crypto/hisilicon/
A Dqm.h50 #define QM_PEH_AXUSER_CFG 0x1000cc macro
/linux/drivers/crypto/hisilicon/hpre/
A Dhpre_main.c383 val = readl(qm->io_base + QM_PEH_AXUSER_CFG); in disable_flr_of_bme()
386 writel(val, qm->io_base + QM_PEH_AXUSER_CFG); in disable_flr_of_bme()
/linux/drivers/crypto/hisilicon/zip/
A Dzip_main.c356 writel(PEH_AXUSER_CFG, base + QM_PEH_AXUSER_CFG); in hisi_zip_set_user_domain_and_cache()
/linux/drivers/crypto/hisilicon/sec2/
A Dsec_main.c477 writel(PEH_AXUSER_CFG, qm->io_base + QM_PEH_AXUSER_CFG); in sec_set_user_domain_and_cache()

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