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Searched refs:R9A07G044_SSI1_PCLK2 (Results 1 – 3 of 3) sorted by relevance

/linux/include/dt-bindings/clock/
A Dr9a07g044-cpg.h98 #define R9A07G044_SSI1_PCLK2 62 macro
/linux/drivers/clk/renesas/
A Dr9a07g044-cpg.c172 DEF_MOD("ssi1_pclk", R9A07G044_SSI1_PCLK2, R9A07G044_CLK_P0,
/linux/arch/arm64/boot/dts/renesas/
A Dr9a07g044.dtsi125 clocks = <&cpg CPG_MOD R9A07G044_SSI1_PCLK2>,

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