Searched refs:REG_CON0 (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/clk/mediatek/
A D	clk-pll.c	17 #define REG_CON0 0 macro 258 r = readl(pll->base_addr + REG_CON0) | div_en_mask; in mtk_pll_prepare() 259 writel(r, pll->base_addr + REG_CON0); in mtk_pll_prepare() 267 r = readl(pll->base_addr + REG_CON0); in mtk_pll_prepare() 269 writel(r, pll->base_addr + REG_CON0); in mtk_pll_prepare() 282 r = readl(pll->base_addr + REG_CON0); in mtk_pll_unprepare() 284 writel(r, pll->base_addr + REG_CON0); in mtk_pll_unprepare() 291 r = readl(pll->base_addr + REG_CON0) & ~div_en_mask; in mtk_pll_unprepare() 292 writel(r, pll->base_addr + REG_CON0); in mtk_pll_unprepare() 341 pll->en_addr = pll->base_addr + REG_CON0; in mtk_clk_register_pll()

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