| /linux/Documentation/devicetree/bindings/leds/ |
| A D | richtek,rt8515.yaml | 16 RFS and RTS.
42 description: The resistance value of the RTS resistor. This
44 for the property torch-max-microamp to work, the RTS resistor
71 is hardwired to the component using the RTS resistor to
73 according to the formula Imax = 5500 / RTS. The lowest
77 current below the hardware limit. This requires the RTS
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| /linux/Documentation/driver-api/serial/ |
| A D | serial-rs485.rst | 20 toggling RTS or DTR signals. That can be used to control external
68 /* Set logical level for RTS pin equal to 1 when sending: */
70 /* or, set logical level for RTS pin equal to 0 when sending: */
73 /* Set logical level for RTS pin equal to 1 after sending: */
75 /* or, set logical level for RTS pin equal to 0 after sending: */
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| /linux/arch/arm/boot/dts/ |
| A D | am335x-netcom-plus-2xx.dts | 26 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* RTS */
39 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* RTS */
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| A D | imx6ul-ccimx6ulsbcpro.dts | 62 /* CAN2 is multiplexed with UART2 RTS/CTS */
201 /* UART2 RTS/CTS muxed with CAN2 */
209 /* UART3 RTS/CTS muxed with CAN 1 */
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| A D | ste-dbx5x0-pinctrl.dtsi | 21 pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
32 pins = "GPIO1_AJ3"; /* RTS */
79 pins = "GPIO7_AG5"; /* RTS */
90 pins = "GPIO7_AG5"; /* RTS */
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| A D | stm32mp157a-iot-box.dts | 57 /* Note: HW flow control is broken, hence using custom CTS/RTS gpios */
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| /linux/Documentation/devicetree/bindings/serial/ |
| A D | rs485.yaml | 9 description: The RTS signal is capable of automatically controlling line
33 description: drive RTS low when sending (default is high).
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| A D | serial.yaml | 62 the UART's RTS line.
68 for RTS/CTS hardware flow control, and that they are available for use
78 description: CTS and RTS pins are swapped.
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| A D | cirrus,clps711x-uart.txt | 11 - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
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| /linux/drivers/net/hamradio/ |
| A D | scc.c | 523 if((scc->wreg[5] & RTS) && scc->kiss.fulldup == KISS_DUPLEX_HALF) in scc_rxint()
937 scc->wreg[R5] |= RTS; in scc_key_trx()
939 or(scc,R5,RTS|TxENAB); /* set the RTS line and enable TX */ in scc_key_trx()
942 cl(scc,R5,RTS|TxENAB); in scc_key_trx()
971 scc->wreg[R5] |= RTS; in scc_key_trx()
973 or(scc,R5,RTS|TxENAB); /* enable tx */ in scc_key_trx()
976 cl(scc,R5,RTS|TxENAB); /* disable tx */ in scc_key_trx()
1109 if ( (grp1 & TXGROUP) && (scc2->wreg[R5] & RTS) ) in is_grouped()
1154 if ( !(scc->wreg[R5] & RTS) ) in t_dwait()
1345 if ( !(scc->wreg[R5] & RTS) ) in scc_set_param()
[all …]
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| A D | z8530.h | 90 #define RTS 0x2 /* RTS */ macro
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| /linux/arch/arm64/boot/dts/allwinner/ |
| A D | sun50i-a64-orangepi-win.dts | 382 /* On Pi-2 connector, RTS/CTS optional */
389 /* On Pi-2 connector, RTS/CTS optional */
396 /* On Pi-2 connector (labeled for SPI1), RTS/CTS optional */
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| A D | sun50i-a64-pine64.dts | 285 /* On Wifi/BT connector, with RTS/CTS */
306 /* On Euler connector, RTS/CTS optional */
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| /linux/arch/arm64/boot/dts/freescale/ |
| A D | imx8mq-hummingboard-pulse.dts | 166 * reconfigured to enable RTS/CTS on UART3
209 * Header. To use RTS/CTS on UART3 comment them out
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| A D | imx8mm-venice-gw7902.dts | 797 MX8MM_IOMUXC_SAI1_TXFS_GPIO4_IO10 0x140 /* RTS */
828 MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x140 /* RTS */
837 MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x140 /* RTS */
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| /linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| A D | serial.txt | 14 CTS, RTS, DCD, DSR, DTR, and RI.
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| /linux/arch/arm64/boot/dts/qcom/ |
| A D | sc7280-idp.dtsi | 472 /* We'll drive RTS, so no pull */
529 * Configure pull-down on RTS. As RTS is active low
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| A D | sc7180-idp.dts | 556 /* We'll drive RTS, so no pull */
638 * Configure pull-down on RTS. As RTS is active low
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| /linux/drivers/tty/serial/ |
| A D | zs.h | 143 #define RTS 0x2 /* RTS */ macro
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| A D | ip22zilog.h | 125 #define RTS 0x2 /* RTS */ macro
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| A D | sunzilog.h | 117 #define RTS 0x2 /* RTS */ macro
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| A D | pmac_zilog.c | 554 set_bits |= RTS; in pmz_set_mctrl()
556 clear_bits |= RTS; in pmz_set_mctrl()
795 write_zsreg(uap, 5, Tx8 | RTS); in pmz_fix_zero_bug_scc()
859 uap->curregs[R5] = Tx8 | RTS; in __pmz_startup()
1967 write_zsreg(uap, R5, uap->curregs[5] | TxENABLE | RTS | DTR); in pmz_console_write()
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| /linux/Documentation/hwmon/ |
| A D | sbtsi_temp.rst | 38 and physical interface of a typical 8-pin remote temperature sensor (RTS) on
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| /linux/drivers/net/wan/ |
| A D | z85230.c | 204 5, TxCRC_ENAB | RTS | TxENAB | Tx8 | DTR,
226 5, TxCRC_ENAB | RTS | TxENAB | Tx8 | DTR,
282 c->regs[5] |= (RTS | DTR); in z8530_rtsdtr()
284 c->regs[5] &= ~(RTS | DTR); in z8530_rtsdtr()
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| A D | z85230.h | 111 #define RTS 0x2 /* RTS */ macro
|